Pub Date : 1998-05-24DOI: 10.1109/CCECE.1998.685640
M. Boulmalf, G. Delisle
The finite-difference time-domain (FDTD) method is used to analyse and optimize the broadband characteristics of an electromagnetically coupled microstrip antenna using a short tuning stub in the microstrip feedline as the optimizing device. Frequency domain parameters are calculated over the entire frequency of interest and extended to fast Fourier transforms. The electromagnetically coupled microstrip antenna is treated using the FDTD method.
{"title":"Optimization of coupled microstrip antenna in the 2.4 GHz ISM band","authors":"M. Boulmalf, G. Delisle","doi":"10.1109/CCECE.1998.685640","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685640","url":null,"abstract":"The finite-difference time-domain (FDTD) method is used to analyse and optimize the broadband characteristics of an electromagnetically coupled microstrip antenna using a short tuning stub in the microstrip feedline as the optimizing device. Frequency domain parameters are calculated over the entire frequency of interest and extended to fast Fourier transforms. The electromagnetically coupled microstrip antenna is treated using the FDTD method.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128934939","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-24DOI: 10.1109/CCECE.1998.685615
N. Chowdhury, B. Zhou
Total blackouts, though rare in a modern power system, could cause huge direct and indirect financial losses. Power system operators should be trained to restore their system from a total or a partial blackout condition in a relatively short period of time. A case-based reasoning approach has been utilized to develop a training simulator for the SaskPower network. System operators can use the simulator in an interactive manner to simulate a restoration process. The simulator can guide system operators through the steps of a restoration process and displays the outcome(s) of a restoration action in terms of system states. The interaction between the simulator and an operator has been achieved through an object-oriented graphical interface.
{"title":"An intelligent training agent for power system restoration","authors":"N. Chowdhury, B. Zhou","doi":"10.1109/CCECE.1998.685615","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685615","url":null,"abstract":"Total blackouts, though rare in a modern power system, could cause huge direct and indirect financial losses. Power system operators should be trained to restore their system from a total or a partial blackout condition in a relatively short period of time. A case-based reasoning approach has been utilized to develop a training simulator for the SaskPower network. System operators can use the simulator in an interactive manner to simulate a restoration process. The simulator can guide system operators through the steps of a restoration process and displays the outcome(s) of a restoration action in terms of system states. The interaction between the simulator and an operator has been achieved through an object-oriented graphical interface.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126067160","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-24DOI: 10.1109/CCECE.1998.682768
M. Leclere, J. Lambert, R. Lord, Y. Hebert
This paper describes a new adaptive algorithm which estimates the positive sequence voltage phasor in a series compensated network with a high precision. This measurement is used in a shunt reactor switching scheme which will control voltage profiles along the Hydro-Quebec transmission grid. The particular nature of the noise observed in the voltage wave forms is discussed. The noise particularities have been considered in the development of the algorithm. The real time implementation of the algorithm is briefly discussed.
{"title":"New adaptive algorithm for precise voltage phasor measurement in a series compensated network","authors":"M. Leclere, J. Lambert, R. Lord, Y. Hebert","doi":"10.1109/CCECE.1998.682768","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682768","url":null,"abstract":"This paper describes a new adaptive algorithm which estimates the positive sequence voltage phasor in a series compensated network with a high precision. This measurement is used in a shunt reactor switching scheme which will control voltage profiles along the Hydro-Quebec transmission grid. The particular nature of the noise observed in the voltage wave forms is discussed. The noise particularities have been considered in the development of the algorithm. The real time implementation of the algorithm is briefly discussed.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127065927","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-24DOI: 10.1109/CCECE.1998.682734
K. Ishikawa, O. Nakamura
An efficient video coding algorithm for coding the upper half of a human body is proposed. In the coding system, the facial area, which is a moving object in the image sequence, is extracted from both the sending and receiving side without any control information. The candidate areas of the person are segmented using color information and the moving areas. The color information, which represent skin color, is extracted with a modified HSV color system. The moving areas are estimated using the motion parameters of objects, which are utilized for constructing the previous frame. The face is then extracted by merging the candidate areas based on the hue element of the modified HSV color system. The standard "Claire" video is used for the computer simulation, and facial areas are accurately extracted in all frames. Furthermore, to improve the subjective evaluation, the eyes and mouth are extracted as the most important areas in the face and coded precisely.
{"title":"Very low bit-rate video coding based on a method of facial area specification","authors":"K. Ishikawa, O. Nakamura","doi":"10.1109/CCECE.1998.682734","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682734","url":null,"abstract":"An efficient video coding algorithm for coding the upper half of a human body is proposed. In the coding system, the facial area, which is a moving object in the image sequence, is extracted from both the sending and receiving side without any control information. The candidate areas of the person are segmented using color information and the moving areas. The color information, which represent skin color, is extracted with a modified HSV color system. The moving areas are estimated using the motion parameters of objects, which are utilized for constructing the previous frame. The face is then extracted by merging the candidate areas based on the hue element of the modified HSV color system. The standard \"Claire\" video is used for the computer simulation, and facial areas are accurately extracted in all frames. Furthermore, to improve the subjective evaluation, the eyes and mouth are extracted as the most important areas in the face and coded precisely.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"37 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114285151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-24DOI: 10.1109/CCECE.1998.682771
C. Robertson, J. Robinson
The VideoWriter is an investigation into applying a natural user interface to telewriting. It employs a computer-controlled video camera to capture images of the user's writing space: a desk with various pieces of paper. The images are processed to extract the written marks on the current page from the clutter of objects in the scene, including the user's moving hand and pen. The system compresses the extracted marks for transmission. The system is successful at extracting the marks as the user is writing and avoids digitizing most false marks. It incorporates update mechanisms that deal with false marks that do occur.
{"title":"The VideoWriter: towards active paper for a natural user interface","authors":"C. Robertson, J. Robinson","doi":"10.1109/CCECE.1998.682771","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682771","url":null,"abstract":"The VideoWriter is an investigation into applying a natural user interface to telewriting. It employs a computer-controlled video camera to capture images of the user's writing space: a desk with various pieces of paper. The images are processed to extract the written marks on the current page from the clutter of objects in the scene, including the user's moving hand and pen. The system compresses the extracted marks for transmission. The system is successful at extracting the marks as the user is writing and avoids digitizing most false marks. It incorporates update mechanisms that deal with false marks that do occur.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"16 6","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114017185","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-24DOI: 10.1109/CCECE.1998.685612
S. Madusuthanan, V. Filipovic-Gledja, N. Fernandopule, S. Panetta, R. Alden
This paper presents the implementation of a Windows-based interface to a program suite to study transient stability. The improvement to the suite involves developing a better user interface and making the suite portable across multiple operating system platforms that use an ANSI C++ compliant compiler. The original program suite was developed in a UNIX version of C with only a console mode interface.
{"title":"A Windows-based interface for power system transient stability studies","authors":"S. Madusuthanan, V. Filipovic-Gledja, N. Fernandopule, S. Panetta, R. Alden","doi":"10.1109/CCECE.1998.685612","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685612","url":null,"abstract":"This paper presents the implementation of a Windows-based interface to a program suite to study transient stability. The improvement to the suite involves developing a better user interface and making the suite portable across multiple operating system platforms that use an ANSI C++ compliant compiler. The original program suite was developed in a UNIX version of C with only a console mode interface.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"57 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121742213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-24DOI: 10.1109/CCECE.1998.682733
M. Margala, N. G. Durdle, N.L. Rodnunsky
This paper presents a new logic design, bipolar double pass-transistor logic (BiDPL), and its implementation into a full-adder. At 1.2 V and output loads of 0.1 to 0.7 pF the new logic style has up to 2.9 times better power efficiency than previously reported low-voltage BiCMOS styles and uses between 16 to 32 % less switching power. Under optimal conditions (V/sub dd/=1.6 V), the new design has up to 18% higher power efficiency than conventional CMOS logic for loads of 0.55 to 1 pF and up to 117 % better power efficiency compared to BiCMOS styles for output loads of 0.1 to 0.68 pF. When used to implement a full adder, it is more power-efficient at very low power supply voltages (1.1 to 2 V) than a conventional CMOS adder design and the best low-voltage low-power adder reported in the literature. The proposed BiDPL adder outperforms in power efficiency both designs at 1.5 V by as much as 61 % and 535 % respectively.
{"title":"Low-voltage power-efficient BiDPL logic design and applications","authors":"M. Margala, N. G. Durdle, N.L. Rodnunsky","doi":"10.1109/CCECE.1998.682733","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682733","url":null,"abstract":"This paper presents a new logic design, bipolar double pass-transistor logic (BiDPL), and its implementation into a full-adder. At 1.2 V and output loads of 0.1 to 0.7 pF the new logic style has up to 2.9 times better power efficiency than previously reported low-voltage BiCMOS styles and uses between 16 to 32 % less switching power. Under optimal conditions (V/sub dd/=1.6 V), the new design has up to 18% higher power efficiency than conventional CMOS logic for loads of 0.55 to 1 pF and up to 117 % better power efficiency compared to BiCMOS styles for output loads of 0.1 to 0.68 pF. When used to implement a full adder, it is more power-efficient at very low power supply voltages (1.1 to 2 V) than a conventional CMOS adder design and the best low-voltage low-power adder reported in the literature. The proposed BiDPL adder outperforms in power efficiency both designs at 1.5 V by as much as 61 % and 535 % respectively.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"58 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126848231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-24DOI: 10.1109/CCECE.1998.685631
G. Gilbert, D. Bouchard, A. Chikhani
The state of a power system and the methods of calculating this state are extremely important in evaluating the operation of the power system, the control of this system, and the determination of future expansion for the power system. The state of the power system is determined through load flow analysis that calculates the power flowing in the lines of the system. There are several different methods to determine the load flow of a given system. For the purposes of this paper, only three methods of load flow algorithms are evaluated: Gauss-Seidel, optimal load flow, and the DistFlow method.
{"title":"A comparison of load flow analysis using DistFlow, Gauss-Seidel, and optimal load flow algorithms","authors":"G. Gilbert, D. Bouchard, A. Chikhani","doi":"10.1109/CCECE.1998.685631","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685631","url":null,"abstract":"The state of a power system and the methods of calculating this state are extremely important in evaluating the operation of the power system, the control of this system, and the determination of future expansion for the power system. The state of the power system is determined through load flow analysis that calculates the power flowing in the lines of the system. There are several different methods to determine the load flow of a given system. For the purposes of this paper, only three methods of load flow algorithms are evaluated: Gauss-Seidel, optimal load flow, and the DistFlow method.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131502102","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-24DOI: 10.1109/CCECE.1998.682552
G.D. Sugavanam, M. Morcos, N. Dillman
A twelve-phase battery charger for electric vehicles (EVs) is presented. A microprocessor controls the charging profile of the battery. A constant-current charging method is used. Thyristors control the output voltage of the charger through digital control of the firing angle. A motor-generator set is used to simulate the load to the charger for test conditions. The charger creates less harmonic distortion compared to a typical power supply.
{"title":"Performance of multiphase microprocessor-based battery charger for electric vehicles","authors":"G.D. Sugavanam, M. Morcos, N. Dillman","doi":"10.1109/CCECE.1998.682552","DOIUrl":"https://doi.org/10.1109/CCECE.1998.682552","url":null,"abstract":"A twelve-phase battery charger for electric vehicles (EVs) is presented. A microprocessor controls the charging profile of the battery. A constant-current charging method is used. Thyristors control the output voltage of the charger through digital control of the firing angle. A motor-generator set is used to simulate the load to the charger for test conditions. The charger creates less harmonic distortion compared to a typical power supply.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121202686","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1998-05-24DOI: 10.1109/CCECE.1998.685563
F. Mo, W. Kinsner
This paper presents a scheme for predicting and modelling of nonstationary signals possessing fractal characteristics, using a resource-allocating network (RAN). One significant feature of a RAN is its ability to allocate resources corresponding to the complexity of nonstationary signals, thus tracking and matching the complexity of nonstationary signals can be achieved. The experimental results of predicting chaotic time series and short-term power load have shown RAN is suitable for modelling and predicting such nonstationary signals with the fundamental advantage of complexity matching and tracking capability.
{"title":"Predicting and modelling of nonstationary temporal signals with fractal characteristics","authors":"F. Mo, W. Kinsner","doi":"10.1109/CCECE.1998.685563","DOIUrl":"https://doi.org/10.1109/CCECE.1998.685563","url":null,"abstract":"This paper presents a scheme for predicting and modelling of nonstationary signals possessing fractal characteristics, using a resource-allocating network (RAN). One significant feature of a RAN is its ability to allocate resources corresponding to the complexity of nonstationary signals, thus tracking and matching the complexity of nonstationary signals can be achieved. The experimental results of predicting chaotic time series and short-term power load have shown RAN is suitable for modelling and predicting such nonstationary signals with the fundamental advantage of complexity matching and tracking capability.","PeriodicalId":177613,"journal":{"name":"Conference Proceedings. IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.98TH8341)","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1998-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117267746","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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