Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190531
T. Olatunji, Mahsa Montazeri, D. Huitink
The need to increase the power density in electronic devices is being limited by the reliability of power devices and its components. To counter this problem, devices will need to have nonconventional designs and features that can help mitigate thermal and mechanical stress concerns, in order to improve failure rates at critical locations within power devices and packages. A major problem plaguing power densification arises from the reliability of the device due to thermomechanical stresses and strains at interfaces that are amplified in harsh environment electronics such as in electric vehicle applications, where temperature extremes are common. One solution to enabling longer interconnect life lies in compliant interconnects, wherein various compliant geometries using photolithography-based approaches to fabricate suspended structures for allowing deflection between chip and substrate. These features reduce stress on the interconnection itself, resulting in improved lifetimes, particularly in solder joints. Yet these structures usually come at a cost of lateral many additional processing steps during interconnect fabrication. In this work, we present an additive approach to fabricate copper-plated compliant interconnects directly on printed circuit boards (PCBs). This approach can accomplish similar thermomechanical stress alleviation to formerly reported methods, but with fewer process steps, and new geometry availability. This work reports the fabrication procedure, process engineering and characterization in addition to the compliance evaluation for a semi-subtractive structure manufacturing process enabled through a novel additive manufacturing methodology.
{"title":"Fabrication of Copper Compliant Iinterconnects on a Printed Circuit Board: An Additive Approach","authors":"T. Olatunji, Mahsa Montazeri, D. Huitink","doi":"10.1109/ITherm45881.2020.9190531","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190531","url":null,"abstract":"The need to increase the power density in electronic devices is being limited by the reliability of power devices and its components. To counter this problem, devices will need to have nonconventional designs and features that can help mitigate thermal and mechanical stress concerns, in order to improve failure rates at critical locations within power devices and packages. A major problem plaguing power densification arises from the reliability of the device due to thermomechanical stresses and strains at interfaces that are amplified in harsh environment electronics such as in electric vehicle applications, where temperature extremes are common. One solution to enabling longer interconnect life lies in compliant interconnects, wherein various compliant geometries using photolithography-based approaches to fabricate suspended structures for allowing deflection between chip and substrate. These features reduce stress on the interconnection itself, resulting in improved lifetimes, particularly in solder joints. Yet these structures usually come at a cost of lateral many additional processing steps during interconnect fabrication. In this work, we present an additive approach to fabricate copper-plated compliant interconnects directly on printed circuit boards (PCBs). This approach can accomplish similar thermomechanical stress alleviation to formerly reported methods, but with fewer process steps, and new geometry availability. This work reports the fabrication procedure, process engineering and characterization in addition to the compliance evaluation for a semi-subtractive structure manufacturing process enabled through a novel additive manufacturing methodology.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"109 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115669910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190455
P. Lall, Jinesh Narangaparambil
Flexible and stretchable devices have attracted great interest in the printed electronics industry for health monitoring of critical infrastructure applications. Additive printing technology is gaining much popularity for fabrication of flexible circuits due to its ease of setup, cost-efficient and its ability of miniaturization. Aerosol Jet Printing is one of the methods of additive printing, which is a popular technology due to non-contact printing, precision and good quality print on flexible substrates, low setup time and reduction of fabrication cost. All these versatilities can be easily applied sensors for health monitoring. Ability to print sensors allows for a tighter integration into the underlying structures providing new opportunities for placement of sensor ever closer to the point of measurement than possible with discrete sensors. In this paper, the humidity sensor is designed and fabricated with the help of aerosol-jet printing on paper substrate. Two kinds of papers with different surface quality used in this study with varied number of passes of the printed conductive line. The printed sensors were tested under the controlled environment of 30°C and relative humidity varying in the range of 20% to 90%. The sensor was also tested for its performance in up sweep and down sweep of relative humidity to quantify the hysteresis. Long-term stability and repeatability have also been quantified.
{"title":"Process Development and Performance Analysis of Additively Printed Humidity Sensor using Aerosol Jet Printing","authors":"P. Lall, Jinesh Narangaparambil","doi":"10.1109/ITherm45881.2020.9190455","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190455","url":null,"abstract":"Flexible and stretchable devices have attracted great interest in the printed electronics industry for health monitoring of critical infrastructure applications. Additive printing technology is gaining much popularity for fabrication of flexible circuits due to its ease of setup, cost-efficient and its ability of miniaturization. Aerosol Jet Printing is one of the methods of additive printing, which is a popular technology due to non-contact printing, precision and good quality print on flexible substrates, low setup time and reduction of fabrication cost. All these versatilities can be easily applied sensors for health monitoring. Ability to print sensors allows for a tighter integration into the underlying structures providing new opportunities for placement of sensor ever closer to the point of measurement than possible with discrete sensors. In this paper, the humidity sensor is designed and fabricated with the help of aerosol-jet printing on paper substrate. Two kinds of papers with different surface quality used in this study with varied number of passes of the printed conductive line. The printed sensors were tested under the controlled environment of 30°C and relative humidity varying in the range of 20% to 90%. The sensor was also tested for its performance in up sweep and down sweep of relative humidity to quantify the hysteresis. Long-term stability and repeatability have also been quantified.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123133663","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190446
P. Lall, Ved Soni, Scott Miller
The major contributor to the boost in flexible power source research is the growing need for wearable devices, fitness accessories and biomedical equipment. Flexible batteries are required to sustain repetitive mechanical stresses during motion in addition to the usual desirable features such as high capacity, fast charge capability and low susceptibility towards degradation. The investigation of cyclic deformation of batteries is limited and the reported studies are conducted for a shorter number of flex cycles and that too with manual flexing instead of a deformation setup. The purpose of this research is to understand the degradation behavior of lithium ion batteries subjected to cyclic flexing deformation along with accelerated deep charge-discharge life cycling. Furthermore, the power sources are tested for the combined effect of mechanical and electrical loads by varying the charge C-Rate. By measuring the battery current and terminal voltage, assessment of its capacity and battery state of health is conducted. Finally, the state of health of the battery is correlated to these parameters with a regression model.
{"title":"Effect of Dynamic Folding with Varying Fold Orientations and C-rates on Flexible Power Source Capacity Degradation","authors":"P. Lall, Ved Soni, Scott Miller","doi":"10.1109/ITherm45881.2020.9190446","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190446","url":null,"abstract":"The major contributor to the boost in flexible power source research is the growing need for wearable devices, fitness accessories and biomedical equipment. Flexible batteries are required to sustain repetitive mechanical stresses during motion in addition to the usual desirable features such as high capacity, fast charge capability and low susceptibility towards degradation. The investigation of cyclic deformation of batteries is limited and the reported studies are conducted for a shorter number of flex cycles and that too with manual flexing instead of a deformation setup. The purpose of this research is to understand the degradation behavior of lithium ion batteries subjected to cyclic flexing deformation along with accelerated deep charge-discharge life cycling. Furthermore, the power sources are tested for the combined effect of mechanical and electrical loads by varying the charge C-Rate. By measuring the battery current and terminal voltage, assessment of its capacity and battery state of health is conducted. Finally, the state of health of the battery is correlated to these parameters with a regression model.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125398361","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190255
J. Nonneman, S. Schlimpert, I. T’Jollyn, M. Paepe
This paper presents the modelling and validation of an advanced thermal lumped parameter (LP) model for a stator tooth of a switched reluctance motor (SRM) with a dry lateral slot cooling method. Standard and simple lumped parameter models for electric motors can insufficiently predict the temperature distribution within the components of the motor. In standard LP models, only several nodes are used to model each component, while more accurate models are needed to predict the effect of different cooling methods on the thermal performance of the motor without the need for experiments. A fully 3D thermal finite element (FE) model could be used but this would increase effort, complexity and computing time unnecessarily. Therefore, an advanced 3D LP model including the dry lateral slot cooling method was developed and validated based on experiments on a real stator tooth cooled with the modelled cooling method. The 3D LP model is extracted from a 2D FE radial simulation of the stator tooth and extended axially in 3D to include axial heat transfer. Experiments were performed with a setup consisting of one tooth of a SRM without rotor, but including stator iron, one winding and two triangular stainless steel tubes in the slots at both sides of the winding cooled by a 60/40% mixture by mass of water-glycol. The setup is equipped with several thermocouples integrated within the components to determine the component temperatures. Three inlet temperatures (20, 35 and 50°C) and four flow rates (2, 6, 9 and 13 l/min) of the coolant were tested at three different heat losses in the winding (10, 30 and 50 W). A comparison between the simulated and measured temperatures showed generally higher temperatures in the experiment. The presence of imperfections in the manufacturing of the experimental setup was determined as the cause of this offset. These imperfections result in lower material thermal conductivities and higher contact resistances than expected from scientific literature. After fitting those thermal properties on the measurements, similar simulated temperatures could be obtained as in the experiments.
{"title":"Modelling and Validation of a Switched Reluctance Motor Stator Tooth with Direct Coil Cooling","authors":"J. Nonneman, S. Schlimpert, I. T’Jollyn, M. Paepe","doi":"10.1109/ITherm45881.2020.9190255","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190255","url":null,"abstract":"This paper presents the modelling and validation of an advanced thermal lumped parameter (LP) model for a stator tooth of a switched reluctance motor (SRM) with a dry lateral slot cooling method. Standard and simple lumped parameter models for electric motors can insufficiently predict the temperature distribution within the components of the motor. In standard LP models, only several nodes are used to model each component, while more accurate models are needed to predict the effect of different cooling methods on the thermal performance of the motor without the need for experiments. A fully 3D thermal finite element (FE) model could be used but this would increase effort, complexity and computing time unnecessarily. Therefore, an advanced 3D LP model including the dry lateral slot cooling method was developed and validated based on experiments on a real stator tooth cooled with the modelled cooling method. The 3D LP model is extracted from a 2D FE radial simulation of the stator tooth and extended axially in 3D to include axial heat transfer. Experiments were performed with a setup consisting of one tooth of a SRM without rotor, but including stator iron, one winding and two triangular stainless steel tubes in the slots at both sides of the winding cooled by a 60/40% mixture by mass of water-glycol. The setup is equipped with several thermocouples integrated within the components to determine the component temperatures. Three inlet temperatures (20, 35 and 50°C) and four flow rates (2, 6, 9 and 13 l/min) of the coolant were tested at three different heat losses in the winding (10, 30 and 50 W). A comparison between the simulated and measured temperatures showed generally higher temperatures in the experiment. The presence of imperfections in the manufacturing of the experimental setup was determined as the cause of this offset. These imperfections result in lower material thermal conductivities and higher contact resistances than expected from scientific literature. After fitting those thermal properties on the measurements, similar simulated temperatures could be obtained as in the experiments.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130583102","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190529
Weihao Li, Longguang Zhu, Feng Ji, Jinling Yu, Yufeng Jin, Wei Wang
In the study of chip heat dissipation, micro-channel heat sinks have been widely used. Microchannel heat sink have a variety of structures, among which the manifold structure is used more because of its better heat dissipation performance. However, the manifold structure has the problem of uneven flow distribution. In order to solve this problem, this paper uses the principle of similar flow resistance and resistance to establish the equivalent resistance model of the manifold microchannel. This model simulates the equivalent resistance network by MATLAB, simulates the change of the flow channel by changing Rr, simulates the change of the distribution channel by changing Rd, and simulates the outlet position by changing the position of the negative electrode of the power supply. The results of the circuit simulation are used as a direction guide, and thermal simulation is performed using COMSOLTM. The optimization of the reaction channel, the distribution channel and the outlet position of the manifold structure is completed. Finally, a uniform flow distribution was achieved, and the variance of the surface temperature of the heat source was reduced by 66%. It can be seen from experiments that the equivalent resistance model has an important role in guiding the optimization direction in the research of microchannel heat sink with manifold structure.
{"title":"Optimization of Manifold Mmicrochannel Heat Sink Based on Equivalent Resistance Model","authors":"Weihao Li, Longguang Zhu, Feng Ji, Jinling Yu, Yufeng Jin, Wei Wang","doi":"10.1109/ITherm45881.2020.9190529","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190529","url":null,"abstract":"In the study of chip heat dissipation, micro-channel heat sinks have been widely used. Microchannel heat sink have a variety of structures, among which the manifold structure is used more because of its better heat dissipation performance. However, the manifold structure has the problem of uneven flow distribution. In order to solve this problem, this paper uses the principle of similar flow resistance and resistance to establish the equivalent resistance model of the manifold microchannel. This model simulates the equivalent resistance network by MATLAB, simulates the change of the flow channel by changing Rr, simulates the change of the distribution channel by changing Rd, and simulates the outlet position by changing the position of the negative electrode of the power supply. The results of the circuit simulation are used as a direction guide, and thermal simulation is performed using COMSOLTM. The optimization of the reaction channel, the distribution channel and the outlet position of the manifold structure is completed. Finally, a uniform flow distribution was achieved, and the variance of the surface temperature of the heat source was reduced by 66%. It can be seen from experiments that the equivalent resistance model has an important role in guiding the optimization direction in the research of microchannel heat sink with manifold structure.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131065504","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190491
Sevket U. Yuruker, R. Mandel, P. McCluskey, M. Ohadi
Thermal management of electronics has been a major limiting factor in achieving high-power, high-performance systems. Isolating various heat dissipating components from each other becomes significantly difficult as increasingly higher packaging densities are targeted. Thus, components with different heat dissipation rates and allowable temperatures are thermally coupled due to increased proximity. The packaging configuration, positioning of the active components and the chosen heat removal techniques play an important role in determining the overall power consumption, efficiency, reliability and expected lifetime. Consequently, evaluation of the electro-thermal characteristics on the system-level becomes as critical as the component-level in order to adequately capture the effects that components have on each other. Also, through a system-level evaluation, limiting quantities such as the maximum ambient temperature, the cooling sequence of the components and the flow routing can be ascertained for a given assembly. Optimization of the design, selection of the appropriate working fluid and prevention of catastrophic failures such as thermal runaway, can be possible through utilization of a system-level thermal model. This study presents a MATLAB based system-level thermal model with an iterative solver that incorporates temperature dependent characteristics. The model is used to design and optimize the thermal management approach of a high-power full bridge DC-DC converter module. Comparison of various flow routing configurations and heat removal modes’ effect on overall performance, along with other advantageous conclusions drawn through several design iterations are performed using the system-level model and are illustrated in detail.
{"title":"System-Level Thermal Modeling and Its Significance in Electronics Packaging","authors":"Sevket U. Yuruker, R. Mandel, P. McCluskey, M. Ohadi","doi":"10.1109/ITherm45881.2020.9190491","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190491","url":null,"abstract":"Thermal management of electronics has been a major limiting factor in achieving high-power, high-performance systems. Isolating various heat dissipating components from each other becomes significantly difficult as increasingly higher packaging densities are targeted. Thus, components with different heat dissipation rates and allowable temperatures are thermally coupled due to increased proximity. The packaging configuration, positioning of the active components and the chosen heat removal techniques play an important role in determining the overall power consumption, efficiency, reliability and expected lifetime. Consequently, evaluation of the electro-thermal characteristics on the system-level becomes as critical as the component-level in order to adequately capture the effects that components have on each other. Also, through a system-level evaluation, limiting quantities such as the maximum ambient temperature, the cooling sequence of the components and the flow routing can be ascertained for a given assembly. Optimization of the design, selection of the appropriate working fluid and prevention of catastrophic failures such as thermal runaway, can be possible through utilization of a system-level thermal model. This study presents a MATLAB based system-level thermal model with an iterative solver that incorporates temperature dependent characteristics. The model is used to design and optimize the thermal management approach of a high-power full bridge DC-DC converter module. Comparison of various flow routing configurations and heat removal modes’ effect on overall performance, along with other advantageous conclusions drawn through several design iterations are performed using the system-level model and are illustrated in detail.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130388117","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190543
Tyler J. Shelly, J. Weibel, D. Ziviani, E. Groll
As vehicle electrification is expanding in response to more stringent emissions standards and shifting consumer preferences, extending the driving range remains critical to broadening the adoption of battery electric vehicles (BEV). This challenge can be addressed in part through more efficient operation of the thermal management system in BEVs, which has a significant influence on range and performance, especially under extreme weather conditions. This study develops a simulation framework for the analysis of a BEV thermal management systems under long-range test procedures defined by the Multi-Cycle Test (MCT). A baseline thermal management system configuration is defined to reflect those typically found in long-range BEVs, so as to provide insight into the design and performance of current systems. Parametric studies are conducted across a range of ambient conditions from 0 °C to 40 °C and drive cycles including urban/city (UDDS), highway (HFEDS), and constant speed cycles. Operating temperature setpoints for the cabin, battery, electronics, and other components are met using the standard system configuration, albeit with significant deleterious impacts on vehicle range and cycle control. At low ambient temperatures, a maximum 30% decrease in driving range is predicted. Across the parametric values investigated, the choice of cabin setpoint temperature affects the driving range on the order of ~10% across heating and cooling cases. The transient drive cycle response for representative cooling cases is presented and reveals oscillations in system behavior about the chosen setpoints; these oscillations are a direct result of the secondary loop liquid cooling architecture. As a result of the present study, perspectives on alternative system configurations that offer battery thermal management and cabin comfort as well as the integration of waste heat recovery are outlined as future work.
{"title":"A Dynamic Simulation Framework for the Analysis of Battery Electric Vehicle Thermal Management Systems","authors":"Tyler J. Shelly, J. Weibel, D. Ziviani, E. Groll","doi":"10.1109/ITherm45881.2020.9190543","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190543","url":null,"abstract":"As vehicle electrification is expanding in response to more stringent emissions standards and shifting consumer preferences, extending the driving range remains critical to broadening the adoption of battery electric vehicles (BEV). This challenge can be addressed in part through more efficient operation of the thermal management system in BEVs, which has a significant influence on range and performance, especially under extreme weather conditions. This study develops a simulation framework for the analysis of a BEV thermal management systems under long-range test procedures defined by the Multi-Cycle Test (MCT). A baseline thermal management system configuration is defined to reflect those typically found in long-range BEVs, so as to provide insight into the design and performance of current systems. Parametric studies are conducted across a range of ambient conditions from 0 °C to 40 °C and drive cycles including urban/city (UDDS), highway (HFEDS), and constant speed cycles. Operating temperature setpoints for the cabin, battery, electronics, and other components are met using the standard system configuration, albeit with significant deleterious impacts on vehicle range and cycle control. At low ambient temperatures, a maximum 30% decrease in driving range is predicted. Across the parametric values investigated, the choice of cabin setpoint temperature affects the driving range on the order of ~10% across heating and cooling cases. The transient drive cycle response for representative cooling cases is presented and reveals oscillations in system behavior about the chosen setpoints; these oscillations are a direct result of the secondary loop liquid cooling architecture. As a result of the present study, perspectives on alternative system configurations that offer battery thermal management and cabin comfort as well as the integration of waste heat recovery are outlined as future work.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129799853","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190593
Andrew Latulippe, Y. Ait-El-Aoud, R. Osgood, Hongwei Sun
Introduced is a low cost "cantilever" like device that is capable of generating heat and simultaneously measuring temperature. The device is fabricated on flexible polyimide substrate using a photolithography process to form thin gold heater patterns. Heat generation is concentrated at the tip of the cantilever using Joule heating from a direct current. The heater functions as an RTD capable of accurate temperature measurements. The device is used to measure the thermal conductivity of small, high aspect ratio structures such as fibers by measuring the thermal resistance using a parallel resistance model. Using a thin platinum wire as a reference material, accurate values for thermal conductivity are obtained.
{"title":"Fabrication of a Low Cost Flexible Micro-Device for Measuring Fiber Thermal Conductivity","authors":"Andrew Latulippe, Y. Ait-El-Aoud, R. Osgood, Hongwei Sun","doi":"10.1109/ITherm45881.2020.9190593","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190593","url":null,"abstract":"Introduced is a low cost \"cantilever\" like device that is capable of generating heat and simultaneously measuring temperature. The device is fabricated on flexible polyimide substrate using a photolithography process to form thin gold heater patterns. Heat generation is concentrated at the tip of the cantilever using Joule heating from a direct current. The heater functions as an RTD capable of accurate temperature measurements. The device is used to measure the thermal conductivity of small, high aspect ratio structures such as fibers by measuring the thermal resistance using a parallel resistance model. Using a thin platinum wire as a reference material, accurate values for thermal conductivity are obtained.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131040415","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, we analyze the heat generation characteristics of components in a multi-stack PCB (Printed Circuit Board) structure of smart phone and find the optimized structure of components placement to minimize system temperature. The PCB in a smart device is conventionally composed of a single layer, so that components are placed on one side or both sides of single PCB. However, as the performance of components goes up, power consumption and the battery size have been gradually increased in order to maximize the running time. Accordingly, in order to increase the battery size in limited space of the smart phone, it is necessary to reduce PCB area on which the components are mounted. Recently, mobile phone makers are gradually adopting a new structure in which PCBs are stacked in multiple layers to increase mounting area. As a result, the heat generation phenomenon needs to be examined from a different viewpoint than the existing single layer PCB structure. In case of existing single-layer PCB, components can be contacted to heat spreader (heat pipe, bracket, metal or graphite sheet) through TIM. On the other hand, in case of multi-layer PCB configuration, components in between two boards have no direct contact with heat spreader and it makes chip temperature higher than before. We analyze chip temperature for different board placement of multi-stacked PCB in smart phone considering thermal performance. The location of high power components such as AP (Application Processor), RF, PMIC, CP (Communication Processor), and Flash Memory was a parameter. Finally, we can find optimal configuration that minimizes the max junction temperature for multiple power scenario.
{"title":"Thermal Aware 3-D Floorplanning on Multi-stacked Board of Smart Phone","authors":"Youngsang Cho, Heejung Choi, Heeseok Lee, Yunkyeok Im, Hoi-Jin Lee, Youngmin Shin","doi":"10.1109/ITherm45881.2020.9190384","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190384","url":null,"abstract":"In this paper, we analyze the heat generation characteristics of components in a multi-stack PCB (Printed Circuit Board) structure of smart phone and find the optimized structure of components placement to minimize system temperature. The PCB in a smart device is conventionally composed of a single layer, so that components are placed on one side or both sides of single PCB. However, as the performance of components goes up, power consumption and the battery size have been gradually increased in order to maximize the running time. Accordingly, in order to increase the battery size in limited space of the smart phone, it is necessary to reduce PCB area on which the components are mounted. Recently, mobile phone makers are gradually adopting a new structure in which PCBs are stacked in multiple layers to increase mounting area. As a result, the heat generation phenomenon needs to be examined from a different viewpoint than the existing single layer PCB structure. In case of existing single-layer PCB, components can be contacted to heat spreader (heat pipe, bracket, metal or graphite sheet) through TIM. On the other hand, in case of multi-layer PCB configuration, components in between two boards have no direct contact with heat spreader and it makes chip temperature higher than before. We analyze chip temperature for different board placement of multi-stacked PCB in smart phone considering thermal performance. The location of high power components such as AP (Application Processor), RF, PMIC, CP (Communication Processor), and Flash Memory was a parameter. Finally, we can find optimal configuration that minimizes the max junction temperature for multiple power scenario.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122833148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190170
Mei-Ling Wu, Wei-Jhih Wong
As the electronic products, such as smart phones, notebooks, and micro-control parts for vehicles, are becoming increasingly popular and their size continues do decrease, there is also a need to reduce the volume of ultra-thin silicon wafers while improving their performance. At present, backside grinding is typically used for this purpose, and requires that the wafer is placed on the chuck of a self-rotating wheel, while controlling the feed rate in order to reduce wafer thickness. Although this process is efficient and effective, it may result in subsurface damage, surface cracks, micro-cracks, warpage, and other undesirable effects. One of its main drawbacks is residual stress, which becomes more pronounced in very thin wafers, as this increases rigidity. Stoney equation is widely used to examine the residual stress and curvature radius in a silicon wafer due to the backside grinding process. However, the relationship between the residual stress generated in the wafer during the grinding process and the process parameters is rarely analyzed through simulations. This gap is addressed in the present study, whereby the finite element method (FEM) is adopted to examine the effects of different process parameters, as well as wafer thickness, on the residual stress. As dynamic simulation is adopted, this allows the process parameters to be adjusted at runtime to predict the residual stress, while Stoney’s equation is employed to predict the influence of different process parameters on warpage. Based on the obtained results, the wafer warpage caused by the process can be predicted with acceptable accuracy, which can in turn be used to optimize the process parameter values to minimize wafer warpage.
{"title":"Simulation Method of Ultra-Thin Silicon Wafers Warpage","authors":"Mei-Ling Wu, Wei-Jhih Wong","doi":"10.1109/ITherm45881.2020.9190170","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190170","url":null,"abstract":"As the electronic products, such as smart phones, notebooks, and micro-control parts for vehicles, are becoming increasingly popular and their size continues do decrease, there is also a need to reduce the volume of ultra-thin silicon wafers while improving their performance. At present, backside grinding is typically used for this purpose, and requires that the wafer is placed on the chuck of a self-rotating wheel, while controlling the feed rate in order to reduce wafer thickness. Although this process is efficient and effective, it may result in subsurface damage, surface cracks, micro-cracks, warpage, and other undesirable effects. One of its main drawbacks is residual stress, which becomes more pronounced in very thin wafers, as this increases rigidity. Stoney equation is widely used to examine the residual stress and curvature radius in a silicon wafer due to the backside grinding process. However, the relationship between the residual stress generated in the wafer during the grinding process and the process parameters is rarely analyzed through simulations. This gap is addressed in the present study, whereby the finite element method (FEM) is adopted to examine the effects of different process parameters, as well as wafer thickness, on the residual stress. As dynamic simulation is adopted, this allows the process parameters to be adjusted at runtime to predict the residual stress, while Stoney’s equation is employed to predict the influence of different process parameters on warpage. Based on the obtained results, the wafer warpage caused by the process can be predicted with acceptable accuracy, which can in turn be used to optimize the process parameter values to minimize wafer warpage.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122416537","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}