Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190454
A. Parahovnik, Mostafa Asadzadzeh, Stephen Adeoye, Uday Manda, Y. Peles
The thermo-fluidic nature of water and supercritical carbon dioxide in a microchannel is experimentally studied. A test rig and microfluidic devices are constructed to enable precise control and measurements of temperature, pressure, heat and mass fluxes.. Wall temperature measurements, heat transfer coefficients, and pressure drops for both fluids were directly measured and compared.. Flow regimes and characteristic Rynolds numbers were discussed and were related to Dittos-Boelter and Gnielinski correlations. It was found that an exponential fit better predicted the wall temperature profile obtained for supercritical CO2. Moreover, for conditions close to the pseudo-critical point, the correlations failed to predict the supercritical heat transfer coefficient but fit well in the gas-like supercritical CO2 conditions. It was also found that water has a better ability to remove heat under the conditions studied in this paper with smaller pressure drop. However, for water the pressure drop was a significant portion of the operational pressure.
{"title":"Experimental Study of Heat Transfer Coefficient and Pressure Drop for Supercritical Carbon Dioxide and Water Inside a Microchannel","authors":"A. Parahovnik, Mostafa Asadzadzeh, Stephen Adeoye, Uday Manda, Y. Peles","doi":"10.1109/ITherm45881.2020.9190454","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190454","url":null,"abstract":"The thermo-fluidic nature of water and supercritical carbon dioxide in a microchannel is experimentally studied. A test rig and microfluidic devices are constructed to enable precise control and measurements of temperature, pressure, heat and mass fluxes.. Wall temperature measurements, heat transfer coefficients, and pressure drops for both fluids were directly measured and compared.. Flow regimes and characteristic Rynolds numbers were discussed and were related to Dittos-Boelter and Gnielinski correlations. It was found that an exponential fit better predicted the wall temperature profile obtained for supercritical CO2. Moreover, for conditions close to the pseudo-critical point, the correlations failed to predict the supercritical heat transfer coefficient but fit well in the gas-like supercritical CO2 conditions. It was also found that water has a better ability to remove heat under the conditions studied in this paper with smaller pressure drop. However, for water the pressure drop was a significant portion of the operational pressure.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"2015 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132950051","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190563
P. Lall, Padmanava Choudhury, J. Suhling, J. Williamson
Electronics in military applications increasingly rely on the use of commercial off-the-shelf components for enabling critical electrical functions. Defense electronics may often be subjected to high-g acceleration loads in addition to extremes of temperature, humidity and prolonged storage. Underfills are often used to provide protection and survivability expectations under extreme thermos-mechanical loading, CTE mismatches, moisture. There is a dearth of computational tools to allow for the prediction of the initiation of damage and the progression of damage at the underfill-interfaces under high-g shock loads. Defense electronics and military systems have longer lifetimes in the neighborhood of 20-40 years and higher reliability requirements. New packaging architectures, which often push the edge of the envelope in terms of miniaturization, cannot be compared with the prior generation electronic systems and lack decades of historical data to provide robust proof of their survivability. Tools and techniques are needed to determine the failure envelopes for new component technologies for operation under high acceleration loads in current and next generation military systems. In this paper, the interface fracture toughness of the PCB-UF interface has been studied under exposure to high temperature storage. A three-point composite beam specimen has been used to study the interface fracture toughness. The bi-material strips of PCB/Underfill were thermally aged for 10 days, 30 days and 60 days at temperatures ranging from 100°C to 150°C and then the sample specimens were subjected to quasi-static three-point bending to observe fracture parameters and to determine interfacial delamination of bi-material strips. A 2D Digital Image Correlation (DIC) method was also employed to understand the Crack tip opening displacement (CTOD), crack initiation and the fracture toughness, CTOD were compared with the aging schedule and temperature.
{"title":"Effect of Thermal Aging on the Interface Fracture Toughness of the PCB-UF Interface","authors":"P. Lall, Padmanava Choudhury, J. Suhling, J. Williamson","doi":"10.1109/ITherm45881.2020.9190563","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190563","url":null,"abstract":"Electronics in military applications increasingly rely on the use of commercial off-the-shelf components for enabling critical electrical functions. Defense electronics may often be subjected to high-g acceleration loads in addition to extremes of temperature, humidity and prolonged storage. Underfills are often used to provide protection and survivability expectations under extreme thermos-mechanical loading, CTE mismatches, moisture. There is a dearth of computational tools to allow for the prediction of the initiation of damage and the progression of damage at the underfill-interfaces under high-g shock loads. Defense electronics and military systems have longer lifetimes in the neighborhood of 20-40 years and higher reliability requirements. New packaging architectures, which often push the edge of the envelope in terms of miniaturization, cannot be compared with the prior generation electronic systems and lack decades of historical data to provide robust proof of their survivability. Tools and techniques are needed to determine the failure envelopes for new component technologies for operation under high acceleration loads in current and next generation military systems. In this paper, the interface fracture toughness of the PCB-UF interface has been studied under exposure to high temperature storage. A three-point composite beam specimen has been used to study the interface fracture toughness. The bi-material strips of PCB/Underfill were thermally aged for 10 days, 30 days and 60 days at temperatures ranging from 100°C to 150°C and then the sample specimens were subjected to quasi-static three-point bending to observe fracture parameters and to determine interfacial delamination of bi-material strips. A 2D Digital Image Correlation (DIC) method was also employed to understand the Crack tip opening displacement (CTOD), crack initiation and the fracture toughness, CTOD were compared with the aging schedule and temperature.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"87 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116639649","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190334
Jun Chen, J. Suhling, R. Jaeger
Piezoresistive stress sensors on silicon were developed for measuring in-situ stresses in electronic packages, but due to its relatively low bandgap energy, the upper temperature range of silicon is limited. Stress sensors made with wide bandgap semiconductors such as 4H silicon carbide (4H-SiC) offer the advantage of much higher temperature operation [1] and can be utilized to monitor stresses in high-voltage, high-power SiC devices. The piezoresistive behavior of such sensors is characterized by piezoresistive (pi) coefficients, which must be calibrated before the stress measurement. In the prior study [2], the piezoresistive coefficients of 4H-SiC were calibrated only at room temperature, but 4H-SiC tends to be operated at high temperature. Thus, the piezoresistive coefficients under different temperatures are required.This work focuses on experimental study of the piezoresistive coefficients at different temperatures, from 300k to 450k. Calibration has been performed using four-point bending method with strip on flex circuit [3] specimen. A special four-point bending apparatus integrated into an environmental chamber is utilized.
{"title":"Measurement of the Temperature Dependence of the Piezoresistive Coefficients of 4H Silicon Carbide","authors":"Jun Chen, J. Suhling, R. Jaeger","doi":"10.1109/ITherm45881.2020.9190334","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190334","url":null,"abstract":"Piezoresistive stress sensors on silicon were developed for measuring in-situ stresses in electronic packages, but due to its relatively low bandgap energy, the upper temperature range of silicon is limited. Stress sensors made with wide bandgap semiconductors such as 4H silicon carbide (4H-SiC) offer the advantage of much higher temperature operation [1] and can be utilized to monitor stresses in high-voltage, high-power SiC devices. The piezoresistive behavior of such sensors is characterized by piezoresistive (pi) coefficients, which must be calibrated before the stress measurement. In the prior study [2], the piezoresistive coefficients of 4H-SiC were calibrated only at room temperature, but 4H-SiC tends to be operated at high temperature. Thus, the piezoresistive coefficients under different temperatures are required.This work focuses on experimental study of the piezoresistive coefficients at different temperatures, from 300k to 450k. Calibration has been performed using four-point bending method with strip on flex circuit [3] specimen. A special four-point bending apparatus integrated into an environmental chamber is utilized.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"468 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116787958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190321
Xingxing Liu, Yongzhan He, Hongmei Liu, Jiajun Zhang, B. Liu, Xiangyu Peng, Jialiang Xu, Jun Zhang, Alex Zhou, Paul Sun, Kunye Zhu, Ahuja Nishi, Dayi Zhu, Ken Zhang
In recent years, Cloud Service has gradually been adopted by more and more end customers. Large amounts of applications from various businesses has been migrated to Cloud. Availability is one of the key considerations for end customers when adopting Cloud Service, so CSPs (Cloud Service Providers) are pursuing ever higher standard of SLA (Service-Level Agreement) to accommodate the need. Especially when considering VM (Virtual Machine) based Cloud Service, where resources in one physical server are virtualized and shared among multiple tenants, a server crash would be a huge impact to tenants' business. One solution is to establish an effective and accurate method to predict server crash in advance, so that workloads can be migrated to a healthy server before impacting the service. It is extremely challenging to deliver accurate prediction, since server crash occurs due to all kinds of failures with most of them occurring randomly and suddenly.This paper proposes a smart server crash prediction method for triggering early warning and migration in Cloud Service data center. The proposed server crash perdition is developed based on hardware, firmware and software system information collected from low-level hardware indicators and kernel status to upper-level system logs in OS (Operation System). Machine learning algorithms are adopted in logs analysis and failure prediction. Random Forests algorithm is chosen upon all providing the best precision. The final proposed method is deployed and evaluated in Baidu's data center, and it achieved 93.33% and 87.33% precision in providing Minutes-level and Hours-level ahead-of-time warning in server crash prediction.
{"title":"Smart Server Crash Prediction in Cloud Service Data Center","authors":"Xingxing Liu, Yongzhan He, Hongmei Liu, Jiajun Zhang, B. Liu, Xiangyu Peng, Jialiang Xu, Jun Zhang, Alex Zhou, Paul Sun, Kunye Zhu, Ahuja Nishi, Dayi Zhu, Ken Zhang","doi":"10.1109/ITherm45881.2020.9190321","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190321","url":null,"abstract":"In recent years, Cloud Service has gradually been adopted by more and more end customers. Large amounts of applications from various businesses has been migrated to Cloud. Availability is one of the key considerations for end customers when adopting Cloud Service, so CSPs (Cloud Service Providers) are pursuing ever higher standard of SLA (Service-Level Agreement) to accommodate the need. Especially when considering VM (Virtual Machine) based Cloud Service, where resources in one physical server are virtualized and shared among multiple tenants, a server crash would be a huge impact to tenants' business. One solution is to establish an effective and accurate method to predict server crash in advance, so that workloads can be migrated to a healthy server before impacting the service. It is extremely challenging to deliver accurate prediction, since server crash occurs due to all kinds of failures with most of them occurring randomly and suddenly.This paper proposes a smart server crash prediction method for triggering early warning and migration in Cloud Service data center. The proposed server crash perdition is developed based on hardware, firmware and software system information collected from low-level hardware indicators and kernel status to upper-level system logs in OS (Operation System). Machine learning algorithms are adopted in logs analysis and failure prediction. Random Forests algorithm is chosen upon all providing the best precision. The final proposed method is deployed and evaluated in Baidu's data center, and it achieved 93.33% and 87.33% precision in providing Minutes-level and Hours-level ahead-of-time warning in server crash prediction.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"68 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124850905","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190389
J. Tompkins, D. Huitink
In this study, CFD analysis and experimental validation of additively manufactured air cooling channels with enhanced heat rejection through flow inversion was investigated for use in a medium voltage solar inverter. Design methodology implemented revolved around flow isolation in channel groupings divided vertically in orientation to the heat source. By interchanging the flow paths of the top and bottom groups of channels halfway through the length of the channel, relatively cooler air is allowed to flow over the heat source contact region on the back end of the channel. Preliminary CFD analysis was performed, and two designs demonstrating the greatest enhancement of heat removal, as well as a comparable straight channel design for comparison, were manufactured from AlSi10Mg powder using direct metal laser sintering. Experimental validation was performed using a custom air channel to deliver consistent flow conditions with ceramic AC strip heaters providing thermal dissipation into the channel. Thermal profiles were determined through temperature readings taken with type-K thermocouples at key locations on the channel and flow path. Flow inversion channels showed reduced thermal gradients across the simulated dies, over the straight channel design. However, this enhancement of heat removal comes at the cost of additional pressure drop.
{"title":"Air Flow Inversion for Enhanced Electronics Cooling in Additively Manufactured Air Channels","authors":"J. Tompkins, D. Huitink","doi":"10.1109/ITherm45881.2020.9190389","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190389","url":null,"abstract":"In this study, CFD analysis and experimental validation of additively manufactured air cooling channels with enhanced heat rejection through flow inversion was investigated for use in a medium voltage solar inverter. Design methodology implemented revolved around flow isolation in channel groupings divided vertically in orientation to the heat source. By interchanging the flow paths of the top and bottom groups of channels halfway through the length of the channel, relatively cooler air is allowed to flow over the heat source contact region on the back end of the channel. Preliminary CFD analysis was performed, and two designs demonstrating the greatest enhancement of heat removal, as well as a comparable straight channel design for comparison, were manufactured from AlSi10Mg powder using direct metal laser sintering. Experimental validation was performed using a custom air channel to deliver consistent flow conditions with ceramic AC strip heaters providing thermal dissipation into the channel. Thermal profiles were determined through temperature readings taken with type-K thermocouples at key locations on the channel and flow path. Flow inversion channels showed reduced thermal gradients across the simulated dies, over the straight channel design. However, this enhancement of heat removal comes at the cost of additional pressure drop.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125492651","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190230
Zhenghui Wu, Xiaojin Fan, Jie Zhao, Feng Deng, Hechun Zhang, Gang Chen, Hongmei Liu, Jiajun Zhang, Jun Zhang, Min Wu, Yuyang Xia, Chris Du, Chao Zhou, Feng Jiang, Jialiang Xu, Dan Liu, Carrie Chen, Candy He, Sean Kuo, Liwen Guo, Jiahong Wu, Tzuchun Hung, Minghua Duan, Lianjun Zhao, Chiming Jao, Vinson Lin, R. Yuan
Along with quickly emerging applications, including 5G, IOT (Internet of Things), Auto Piloting, etc., in industry, demands for local large-scale data analysis and AI (Artificial Intelligence) processing on edge is growing rapidly. As a result, hardware power consumption for edge computing is increasing fast. At the same time, high-power edge computing products are supposed to fit into non-data center scenarios such as 5G edge network, Roads Side Control Unit (RSCU), smart factory, etc. This paper introduces a typical edge server, investigates the environmental requirements for non-data center scenarios and studies on technical feasibility of further extending working temperature, dustproof, waterproof, anti-condensation, etc., and proposed a completed, environmental reliable solution for edge hardware products. The proposed Cloud Edge Server also extends AI server products and environmental adaptability on edge. The same PCB (Printed Circuit Board) can support flexible AI hardware accelerators and storage configurations for diverse applications. And, it can fit into different outdoor and indoor scenarios with only changing chassis design which helps dramatically reducing total deployment cost and achieve better ROI (Return on Investment).
{"title":"A Novel Extended Temperature Edge Server System Architecture and Design for ITS RSCU","authors":"Zhenghui Wu, Xiaojin Fan, Jie Zhao, Feng Deng, Hechun Zhang, Gang Chen, Hongmei Liu, Jiajun Zhang, Jun Zhang, Min Wu, Yuyang Xia, Chris Du, Chao Zhou, Feng Jiang, Jialiang Xu, Dan Liu, Carrie Chen, Candy He, Sean Kuo, Liwen Guo, Jiahong Wu, Tzuchun Hung, Minghua Duan, Lianjun Zhao, Chiming Jao, Vinson Lin, R. Yuan","doi":"10.1109/ITherm45881.2020.9190230","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190230","url":null,"abstract":"Along with quickly emerging applications, including 5G, IOT (Internet of Things), Auto Piloting, etc., in industry, demands for local large-scale data analysis and AI (Artificial Intelligence) processing on edge is growing rapidly. As a result, hardware power consumption for edge computing is increasing fast. At the same time, high-power edge computing products are supposed to fit into non-data center scenarios such as 5G edge network, Roads Side Control Unit (RSCU), smart factory, etc. This paper introduces a typical edge server, investigates the environmental requirements for non-data center scenarios and studies on technical feasibility of further extending working temperature, dustproof, waterproof, anti-condensation, etc., and proposed a completed, environmental reliable solution for edge hardware products. The proposed Cloud Edge Server also extends AI server products and environmental adaptability on edge. The same PCB (Printed Circuit Board) can support flexible AI hardware accelerators and storage configurations for diverse applications. And, it can fit into different outdoor and indoor scenarios with only changing chassis design which helps dramatically reducing total deployment cost and achieve better ROI (Return on Investment).","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129077669","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190345
A. Elkholy, R. Kempers
Surface condition has been shown to be the main parameter impacting pool boiling heat transfer performance, namely heat transfer coefficient (HTC) and the critical heat flux (CHF). Many surface modification methods have been developed and studied to improve boiling heat transfer performance by creating nano/micro-scale surface topologies to induce more nucleation sites that can be activated at lower wall superheat, hence improving the HTC.In the current work, the effect of the boiling surface aging on pool boiling performance enhancement is investigated through a repeatability study. First, the design, development, and calibration of a high-accuracy pool boiling apparatus with a relatively large boiling surface area is detailed. This apparatus was subsequently used to investigate the effect of the surface oxidation and contamination on the pool boiling performance for bare copper surfaces. Tests were performed at the saturated conditions using deionized water at atmospheric pressure. The surfaces were tested seven times which amounted to 40 hours of testing. The experiment results demonstrated that the surface aging had a significant effect on the HTC, which reached up to 22% of improvement compared to the freshly prepared surface. However, its effect on CHF is minimal with at least 25 hours of tests are required to get repeatable results within 5%.
{"title":"Investigation of Surface Aging Effects on the Repeatability of Saturated Pool Boiling Heat Transfer","authors":"A. Elkholy, R. Kempers","doi":"10.1109/ITherm45881.2020.9190345","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190345","url":null,"abstract":"Surface condition has been shown to be the main parameter impacting pool boiling heat transfer performance, namely heat transfer coefficient (HTC) and the critical heat flux (CHF). Many surface modification methods have been developed and studied to improve boiling heat transfer performance by creating nano/micro-scale surface topologies to induce more nucleation sites that can be activated at lower wall superheat, hence improving the HTC.In the current work, the effect of the boiling surface aging on pool boiling performance enhancement is investigated through a repeatability study. First, the design, development, and calibration of a high-accuracy pool boiling apparatus with a relatively large boiling surface area is detailed. This apparatus was subsequently used to investigate the effect of the surface oxidation and contamination on the pool boiling performance for bare copper surfaces. Tests were performed at the saturated conditions using deionized water at atmospheric pressure. The surfaces were tested seven times which amounted to 40 hours of testing. The experiment results demonstrated that the surface aging had a significant effect on the HTC, which reached up to 22% of improvement compared to the freshly prepared surface. However, its effect on CHF is minimal with at least 25 hours of tests are required to get repeatable results within 5%.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129113766","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190519
J. Lan, Mei-Ling Wu
The fan-out package is considered as the mature and advanced technology because of low cost, great thermal management, high electrical performance and reliability. However, the warpage is still an issue when the fan-out panel level packaging is becoming larger and thinner. In this research, the size 510 mm x 410 mm of the fan-out panel level packaging is investigated to analyze the warpage performance during the compression molding process, carrier de-bonding process, redistribution layer (RDL) process, and grinding process. The finite element modeling is conducted to calculate the warpage behavior with a continues step of fan-out manufacture process. The fan-out panel level packaging with support core carrier and without support core carrier are discussed in this paper. The structure with support core carrier is designed to control the warpage during the manufacture process. It is found that elastic modulus and coefficient of thermal expansion (CTE) of EMC are the important factors to reduce the warpage. In the EMC formation, the increasing filler content of EMC can enhance the elastic modulus, the thermal conductivity, and decreasing CTE. Therefore, we can select the appropriate EMC materials or design the formation of EMC to decrease the thermal mismatch between EMC/Si and EMC/RDL. The results also revealed that the carrier material could affect the warpage due to the residual stress. To decrease the residual stress for achieving the flat warpage, the different types of carriers are also studied. Eventually, the structure with support core carrier, EMC materials, and carrier materials are presented to obtain the optimal warpage performance in the fan-out panel level packaging.
扇出封装具有成本低、热管理好、电气性能高、可靠性高等特点，被认为是成熟的先进技术。然而，翘曲仍然是一个问题，当扇出面板级封装变得更大和更薄。本研究以尺寸为510 mm x 410 mm的扇形面板级封装为研究对象，分析了其在压缩成型过程、载流子脱键过程、再分布层(RDL)过程和研磨过程中的翘曲性能。采用有限元模型计算了扇形成形过程中连续阶跃的翘曲行为。讨论了带支撑芯载体和不带支撑芯载体的扇出式面板级封装。设计了带支撑芯载体的结构，以控制制造过程中的翘曲。研究发现，弹性模量和热膨胀系数是降低电磁干扰翘曲的重要因素。在电磁兼容结构中，随着电磁兼容填料含量的增加，电磁兼容材料的弹性模量增大，导热系数增大，CTE降低。因此，我们可以选择合适的EMC材料或设计EMC的形成，以减少EMC/Si和EMC/RDL之间的热失配。结果还表明，载体材料会由于残余应力而影响翘曲。为了降低残余应力，实现翘曲平整，还研究了不同类型的载体。最后，提出了支撑芯载流子、电磁兼容材料和载流子材料的结构，以获得扇形板级封装的最佳翘曲性能。
{"title":"Warpage Simulation and Analysis for Panel Level Fan-out Package","authors":"J. Lan, Mei-Ling Wu","doi":"10.1109/ITherm45881.2020.9190519","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190519","url":null,"abstract":"The fan-out package is considered as the mature and advanced technology because of low cost, great thermal management, high electrical performance and reliability. However, the warpage is still an issue when the fan-out panel level packaging is becoming larger and thinner. In this research, the size 510 mm x 410 mm of the fan-out panel level packaging is investigated to analyze the warpage performance during the compression molding process, carrier de-bonding process, redistribution layer (RDL) process, and grinding process. The finite element modeling is conducted to calculate the warpage behavior with a continues step of fan-out manufacture process. The fan-out panel level packaging with support core carrier and without support core carrier are discussed in this paper. The structure with support core carrier is designed to control the warpage during the manufacture process. It is found that elastic modulus and coefficient of thermal expansion (CTE) of EMC are the important factors to reduce the warpage. In the EMC formation, the increasing filler content of EMC can enhance the elastic modulus, the thermal conductivity, and decreasing CTE. Therefore, we can select the appropriate EMC materials or design the formation of EMC to decrease the thermal mismatch between EMC/Si and EMC/RDL. The results also revealed that the carrier material could affect the warpage due to the residual stress. To decrease the residual stress for achieving the flat warpage, the different types of carriers are also studied. Eventually, the structure with support core carrier, EMC materials, and carrier materials are presented to obtain the optimal warpage performance in the fan-out panel level packaging.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130120182","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190267
P. Lall, Jinesh Narangaparambil, Ved Soni, Scott Miller
Flexible electronics has emerged as a new form-factor in the consumer and defense applications. Aerosol-Jet Printing technology has shown potential for additive printing of flexible electronics on both planar and non-planar surfaces. The width of the needed lines can varied through control of the process parameters allowing the printing of very narrow traces of the order of 5-10μm in width. Reported research till date primarily concentrates on the single-layer printing with consideration of various parameters like humidity, temperature and strain rate. However, conventional PCBs are multi-layered and for the flexible PCB to be used in real-world it is important to have multi-layer stacking of interconnects and establish z-axis interconnections through vias as currently in the conventional PCBs. Use of additive methods such as aerosol printing method provides a great amount of design freedom without the need for specialized masks to establish the interconnects for different inks available like silver, copper, and carbon. In this paper, the objective is to establish z-axis interconnections with the help of Aerosol printable silver ink and dielectric polyimide ink. The silver ink would be using the ultrasonic atomizer to print, and the pneumatic atomizer has to be used for the polyimide ink. The printed conductive lines have been subjected to different sintering conditions and then tested for the parameters like resistance across the interconnects and shear load to failure.
{"title":"Sintering Process Conditions for Additive Printing of Multi-Layer Circuitry Aerosol-Jet Process in Conjunction with Nanoparticle Ink","authors":"P. Lall, Jinesh Narangaparambil, Ved Soni, Scott Miller","doi":"10.1109/ITherm45881.2020.9190267","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190267","url":null,"abstract":"Flexible electronics has emerged as a new form-factor in the consumer and defense applications. Aerosol-Jet Printing technology has shown potential for additive printing of flexible electronics on both planar and non-planar surfaces. The width of the needed lines can varied through control of the process parameters allowing the printing of very narrow traces of the order of 5-10μm in width. Reported research till date primarily concentrates on the single-layer printing with consideration of various parameters like humidity, temperature and strain rate. However, conventional PCBs are multi-layered and for the flexible PCB to be used in real-world it is important to have multi-layer stacking of interconnects and establish z-axis interconnections through vias as currently in the conventional PCBs. Use of additive methods such as aerosol printing method provides a great amount of design freedom without the need for specialized masks to establish the interconnects for different inks available like silver, copper, and carbon. In this paper, the objective is to establish z-axis interconnections with the help of Aerosol printable silver ink and dielectric polyimide ink. The silver ink would be using the ultrasonic atomizer to print, and the pneumatic atomizer has to be used for the polyimide ink. The printed conductive lines have been subjected to different sintering conditions and then tested for the parameters like resistance across the interconnects and shear load to failure.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129794637","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190515
Thirumalesha Adarsh Gudluru, A. Upadhyay, Soruchukwu Okam, Fabio Battaglia, Farah Singer, M. Ohadi
The main goals of the work presented here were to investigate the energy consumption profiles in data centers and server rooms on the campus of the University of Maryland, College Park, and identify energy conservation measures and the potential savings they can represent. The energy audit process conducted for this study investigated the server rooms’ infrastructure, operational issues, the EnergyConservation Measures (ECMs), and consolidation/co-location opportunities. The identified ECMs were carried out starting with high-reward/low-cost/no-cost investments, such as optimization of the server rooms’ layout, rearrangement of the tile configuration and the racks, removal of unnecessary items and equipment from the data center rooms, increasing the set point temperatures of the cooling units, and installing hot aisle/cold aisle containment. The server rooms were modeled using commercially available software, and temperature sensors and relative humidity sensors used throughout the energy audit study were instrumental in identifying and validating the implemented ECMs. Selected case studies of the audited campus server rooms are also presented in this paper and the learned lessons of their Energy Conservation Measures implementation are also discussed.
{"title":"Energy Audit of Data Centers and Server Rooms on an Academic Campus: Impact of Energy Conservation Measures","authors":"Thirumalesha Adarsh Gudluru, A. Upadhyay, Soruchukwu Okam, Fabio Battaglia, Farah Singer, M. Ohadi","doi":"10.1109/ITherm45881.2020.9190515","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190515","url":null,"abstract":"The main goals of the work presented here were to investigate the energy consumption profiles in data centers and server rooms on the campus of the University of Maryland, College Park, and identify energy conservation measures and the potential savings they can represent. The energy audit process conducted for this study investigated the server rooms’ infrastructure, operational issues, the EnergyConservation Measures (ECMs), and consolidation/co-location opportunities. The identified ECMs were carried out starting with high-reward/low-cost/no-cost investments, such as optimization of the server rooms’ layout, rearrangement of the tile configuration and the racks, removal of unnecessary items and equipment from the data center rooms, increasing the set point temperatures of the cooling units, and installing hot aisle/cold aisle containment. The server rooms were modeled using commercially available software, and temperature sensors and relative humidity sensors used throughout the energy audit study were instrumental in identifying and validating the implemented ECMs. Selected case studies of the audited campus server rooms are also presented in this paper and the learned lessons of their Energy Conservation Measures implementation are also discussed.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"96 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128902404","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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