Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190396
M. Bergendahl, D. Goldfarb, Dishit P. Parekh, R. Bonam, I. Saraf, Hongqing Zhang, Ed Cropp, K. Sikka
Traditional machining techniques limit the flow channel and fin wall dimensions of high thermal conductivity metallic cold plates. Even though the thermal conductivity of silicon is lower compared to copper or aluminum, silicon micromachining techniques allow smaller flow channel and fin wall dimensions to enhance the heat transfer. However, the silicon fin height is limited by the standard wafer thickness. In this study, we develop stacked silicon microcoolers to increase the fin heights. An analytical method is used to identify the optimal fin wall and flow channel dimensions. A method of fabricating the stacked silicon microcoolers is then described.Stacked silicon microcoolers of various flow channel and fin wall dimensions are fabricated and integrated into thermal test packages. Experimental results of thermal resistance and pressure, spanning a wide range of chip power and fluid flow rates, are presented. The results demonstrate the high-performance envelope of the stacked silicon microcoolers. Directions for further thermal performance enhancement are also identified.
{"title":"Stacked Silicon Microcoolers","authors":"M. Bergendahl, D. Goldfarb, Dishit P. Parekh, R. Bonam, I. Saraf, Hongqing Zhang, Ed Cropp, K. Sikka","doi":"10.1109/ITherm45881.2020.9190396","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190396","url":null,"abstract":"Traditional machining techniques limit the flow channel and fin wall dimensions of high thermal conductivity metallic cold plates. Even though the thermal conductivity of silicon is lower compared to copper or aluminum, silicon micromachining techniques allow smaller flow channel and fin wall dimensions to enhance the heat transfer. However, the silicon fin height is limited by the standard wafer thickness. In this study, we develop stacked silicon microcoolers to increase the fin heights. An analytical method is used to identify the optimal fin wall and flow channel dimensions. A method of fabricating the stacked silicon microcoolers is then described.Stacked silicon microcoolers of various flow channel and fin wall dimensions are fabricated and integrated into thermal test packages. Experimental results of thermal resistance and pressure, spanning a wide range of chip power and fluid flow rates, are presented. The results demonstrate the high-performance envelope of the stacked silicon microcoolers. Directions for further thermal performance enhancement are also identified.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134167039","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190280
Shohei Ohashi, T. Ogawa, Qiang Yu
It is known that the fatigue life of automotive electronic components ensures safety of the system. Electronic components are joined by the solder but this joint is one of the vulnerable point in the electronic components. Therefore, in order to know the life of electronic components [1], it is needed to investigate the reliability of solder joints. However, it takes an enormous amount of time to actually use parts and determine the life under actual use conditions. In order to shorten the testing time, there is a method called accelerated test [2]. This test can evaluate the life by calculating the acceleration factor using empirical formula but there are multiple formulas for the acceleration factor in this accelerated test. Therefore, it must have known which empirical formula can calculate the relationship between accelerated test and actual use conditions more accurately. Additionally, it is necessary to consider whether it is possible to discuss using the same empirical formula.In this study, using the Computer Aided Engineering models, the fatigue crack initiation, propagation, and fracture are reproduced under various temperature conditions to determine the acceleration factor. Then, the accuracy of the empirical formula is verified by comparing it with the acceleration factor obtained from the empirical formula.
{"title":"Comparison and Verification of Acceleration Factor of Temperature Cycle Test by Empirical Formula and CAE Analysis","authors":"Shohei Ohashi, T. Ogawa, Qiang Yu","doi":"10.1109/ITherm45881.2020.9190280","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190280","url":null,"abstract":"It is known that the fatigue life of automotive electronic components ensures safety of the system. Electronic components are joined by the solder but this joint is one of the vulnerable point in the electronic components. Therefore, in order to know the life of electronic components [1], it is needed to investigate the reliability of solder joints. However, it takes an enormous amount of time to actually use parts and determine the life under actual use conditions. In order to shorten the testing time, there is a method called accelerated test [2]. This test can evaluate the life by calculating the acceleration factor using empirical formula but there are multiple formulas for the acceleration factor in this accelerated test. Therefore, it must have known which empirical formula can calculate the relationship between accelerated test and actual use conditions more accurately. Additionally, it is necessary to consider whether it is possible to discuss using the same empirical formula.In this study, using the Computer Aided Engineering models, the fatigue crack initiation, propagation, and fracture are reproduced under various temperature conditions to determine the acceleration factor. Then, the accuracy of the empirical formula is verified by comparing it with the acceleration factor obtained from the empirical formula.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131014184","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190410
P. Lall, A. Pandurangan, Kalyan Dornala, J. Suhling, John Deep
Commercial off-the-shelf components are increasingly being used in defense and aerospace applications. Harsh environment applications expose the electronic components to high-g shock forces. In order to assess the accelerated test reliability, most of the tests are performed at a zero degree drop angle as the worst case scenario. However, the drop angle in the actual environment is not always exactly zero degree and systems may be subjected to angular impact. With the variation in the drop angle, the effect of drop on the board changes. The reliability of the electronic components and the solder-joint interconnects, may depend on the effect of drop angle on the test vehicle. Tools for assessment of the effect of drop-orientation will provide insights into the detrimental shock-orientations and create accelerated tests more relatable to actual shock environments in real life. A potted circular PCB is used as the test vehicle, potting is done to understand the effect of drop angle on restraint mechanisms. Results on a circular PCB have been reported for three different drop angles of shock 0-degree, 30-degree and 60-degree. The experiments are performed and reported for two different high-g shock levels of 10,000G and 25000G. An explicit finite element model has been created for the board assemblies and out-of-plane displacement contours are compared to verify trend observed in experiment on the effect of change in drop angles.
{"title":"Effect of Shock Angle on Solder-Joint Reliability of Potted Assemblies Under High-G Shock","authors":"P. Lall, A. Pandurangan, Kalyan Dornala, J. Suhling, John Deep","doi":"10.1109/ITherm45881.2020.9190410","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190410","url":null,"abstract":"Commercial off-the-shelf components are increasingly being used in defense and aerospace applications. Harsh environment applications expose the electronic components to high-g shock forces. In order to assess the accelerated test reliability, most of the tests are performed at a zero degree drop angle as the worst case scenario. However, the drop angle in the actual environment is not always exactly zero degree and systems may be subjected to angular impact. With the variation in the drop angle, the effect of drop on the board changes. The reliability of the electronic components and the solder-joint interconnects, may depend on the effect of drop angle on the test vehicle. Tools for assessment of the effect of drop-orientation will provide insights into the detrimental shock-orientations and create accelerated tests more relatable to actual shock environments in real life. A potted circular PCB is used as the test vehicle, potting is done to understand the effect of drop angle on restraint mechanisms. Results on a circular PCB have been reported for three different drop angles of shock 0-degree, 30-degree and 60-degree. The experiments are performed and reported for two different high-g shock levels of 10,000G and 25000G. An explicit finite element model has been created for the board assemblies and out-of-plane displacement contours are compared to verify trend observed in experiment on the effect of change in drop angles.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133672586","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190601
Chun Howe CH Sim, Chew Ching Lim, Vijay Hoskoti
This paper focus on Intel System on Chip (SoC) thermal analysis challenges and novel methods in addressing Intel SoC under Internet of Things Group (IoTG) unique workloads. The workload challenges are coming from embedded. industrial and PC client market segments; where customers from these segments have different workloads hence different power dissipation (both dynamic and static power) within SoC Core and IPs. Conventional Design Methodology and Practices - prototyping and testing. are time consuming and don’t scale well with fundamentally different and diverse Internet of Things (IoT) workloads. IoTG Markets has shorter Product Life Cycle (PLC) and needed Targeted Thermal Solution. thus requires a quick-turn around time for evaluating these solutions. IoTG emphasize on pre silicon Computational Fluid Dynamics (CFD) simulation and Co-development strategy to design and develop thermal solution and specifications. The thermal analysis was done in an incremental fashion. from lowest component level within the SoC. then platform and System level ingredients - considering heat flux. extended temperature. mutual heating and etc. This incremental process helped facilitate early validation of design decisions at every level (component. platform and system) and timely discovery of potential refinement leading to an optimal solution. Component level feasibility focuses on SoC power maps and heat-sink design. Platform level feasibility expands into form factor requirement and on-board component placements. System level feasibility envelope everything to fully capture the details of customer boundary conditions like operating ambient. system chassis and applications. Highlighting an example using CFD simulation start with component level analysis. then move on to platform level where board level components are introduced; and finally. system level where boundary conditions with specific use conditions are modeled. Iterations with pre-silicon use cases power assumption to assess thermal solution performance. Through this presentation. we would like to share a bottom up simulation design approach in solving complex thermal system.
{"title":"Systematic Approach in Intel SoC (System on Chip) Thermal Solution Design using CFD (Computational Fluid Dynamics) Simulation","authors":"Chun Howe CH Sim, Chew Ching Lim, Vijay Hoskoti","doi":"10.1109/ITherm45881.2020.9190601","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190601","url":null,"abstract":"This paper focus on Intel System on Chip (SoC) thermal analysis challenges and novel methods in addressing Intel SoC under Internet of Things Group (IoTG) unique workloads. The workload challenges are coming from embedded. industrial and PC client market segments; where customers from these segments have different workloads hence different power dissipation (both dynamic and static power) within SoC Core and IPs. Conventional Design Methodology and Practices - prototyping and testing. are time consuming and don’t scale well with fundamentally different and diverse Internet of Things (IoT) workloads. IoTG Markets has shorter Product Life Cycle (PLC) and needed Targeted Thermal Solution. thus requires a quick-turn around time for evaluating these solutions. IoTG emphasize on pre silicon Computational Fluid Dynamics (CFD) simulation and Co-development strategy to design and develop thermal solution and specifications. The thermal analysis was done in an incremental fashion. from lowest component level within the SoC. then platform and System level ingredients - considering heat flux. extended temperature. mutual heating and etc. This incremental process helped facilitate early validation of design decisions at every level (component. platform and system) and timely discovery of potential refinement leading to an optimal solution. Component level feasibility focuses on SoC power maps and heat-sink design. Platform level feasibility expands into form factor requirement and on-board component placements. System level feasibility envelope everything to fully capture the details of customer boundary conditions like operating ambient. system chassis and applications. Highlighting an example using CFD simulation start with component level analysis. then move on to platform level where board level components are introduced; and finally. system level where boundary conditions with specific use conditions are modeled. Iterations with pre-silicon use cases power assumption to assess thermal solution performance. Through this presentation. we would like to share a bottom up simulation design approach in solving complex thermal system.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114068897","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190313
P. Lall, Nakul Kothari, Kartik Goyal, Jinesh Narangaparambil, Scott Miller
Digital printing technologies are rapidly gaining importance for manufacturing electronic devices with their extremely low fabrication cost and be able to print on flexible and conformal substrates such as polyimide rather than conventional FR-4. One of the technologies, Aerosol Jet, works well when it comes to the wide selection of substrates and materials to be able to print. AJP process utilizes aerodynamic focusing to focus a collimated mist of Nano-particles onto a substrate using an inert carrier gas known as sheath gas, such as nitrogen. To account for the wide array of materials, the process further breaks down to two different types of atomization: UA for low viscosity materials (1 to 5cP) which utilizes ultrasonic waves to atomize; and PA for low and high viscosity materials (1 – 100°CP) which utilizes an inert carrier gas to atomize, thereby suspending the Nano-particles into air which travels through a mist tube and gets deposited. Aerosol-jet printing process requires the control of multiple parameters simultaneously for a fine print such as atomizer flow rate, sheath flow rate, nozzle size, print speed, base temperature, UA current, print height (distance between nozzle exit and the substrate), number of passes. Furthermore, for desired pattern, the print process requires a toolpath file to follow which can be generated from a 2D CAD model, implying there is no specification of the line width. The desired line width is obtained by changing the above-mentioned parameters accordingly, which can be time consuming since each material is of a different viscosity and varying metal and solvent composition. In this paper, a detailed approach for making a 2 layer and 5 layer micro-via using metallized silver Nano-particle ink and a dielectric adhesive is shown. Sintering of the nano-particle ink is one of the most important manufacturing step that governs the electrical and mechanical properties of the 3D printed micro-via. Prior data shows that sintering time and temperature have a big effect of the resistivity, shear load to failure and micro structure of the silver nano particles. In this paper, the most appropriate sintering profile for the conductive lines was found by progressively tracking the resistivity for varied candidate sintering profiles. For the best sintering profile obtained, progression of resistivity, shear load to failure and microstructure growth was monitored at each sintering step.
{"title":"Process Development for Additive Fabrication of Z-Axis Interconnects In Multilayer Circuits","authors":"P. Lall, Nakul Kothari, Kartik Goyal, Jinesh Narangaparambil, Scott Miller","doi":"10.1109/ITherm45881.2020.9190313","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190313","url":null,"abstract":"Digital printing technologies are rapidly gaining importance for manufacturing electronic devices with their extremely low fabrication cost and be able to print on flexible and conformal substrates such as polyimide rather than conventional FR-4. One of the technologies, Aerosol Jet, works well when it comes to the wide selection of substrates and materials to be able to print. AJP process utilizes aerodynamic focusing to focus a collimated mist of Nano-particles onto a substrate using an inert carrier gas known as sheath gas, such as nitrogen. To account for the wide array of materials, the process further breaks down to two different types of atomization: UA for low viscosity materials (1 to 5cP) which utilizes ultrasonic waves to atomize; and PA for low and high viscosity materials (1 – 100°CP) which utilizes an inert carrier gas to atomize, thereby suspending the Nano-particles into air which travels through a mist tube and gets deposited. Aerosol-jet printing process requires the control of multiple parameters simultaneously for a fine print such as atomizer flow rate, sheath flow rate, nozzle size, print speed, base temperature, UA current, print height (distance between nozzle exit and the substrate), number of passes. Furthermore, for desired pattern, the print process requires a toolpath file to follow which can be generated from a 2D CAD model, implying there is no specification of the line width. The desired line width is obtained by changing the above-mentioned parameters accordingly, which can be time consuming since each material is of a different viscosity and varying metal and solvent composition. In this paper, a detailed approach for making a 2 layer and 5 layer micro-via using metallized silver Nano-particle ink and a dielectric adhesive is shown. Sintering of the nano-particle ink is one of the most important manufacturing step that governs the electrical and mechanical properties of the 3D printed micro-via. Prior data shows that sintering time and temperature have a big effect of the resistivity, shear load to failure and micro structure of the silver nano particles. In this paper, the most appropriate sintering profile for the conductive lines was found by progressively tracking the resistivity for varied candidate sintering profiles. For the best sintering profile obtained, progression of resistivity, shear load to failure and microstructure growth was monitored at each sintering step.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114420435","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190391
Priyanka Tunuguntla, Guixiang Ellen Tan, E. Chenelly
With increased processor cores and performance for CPU/GPU, thermal design power (TDP) of these products are increasing. Traditional air-cooling solutions are sometimes insufficient to cool high density, high powered CPUs. Liquid cooling solutions can support higher power but would drive for significant initial capital investment and may not be the best solution for cooling if total cost of ownership (TCO) is high. Hence advanced air-cooling solutions like Extended Volume Air Cooling (EVAC) heat sinks are more ideal to adopt. These heat sinks use heat pipes or thermosiphon tubes to transfer the heat to regions where more physical volume is available for additional heat exchangers to deliver the best overall performance. With these extra cooling surfaces (outriggers), the thermal performance of the heat sink can be improved.The characterization of EVAC at the component level is much less straightforward than standard heat sinks due to the complexity of air flow distribution among different sections of an EVAC heat sink. This airflow distribution must be understood in order to determine effects by and on the surrounding system. This paper shows two methodologies to characterize EVAC heat sink performance at component level.The first one is to apply a thermal resistance network methodology with wind tunnel testing results of sections of the heat sink so that the cooling contribution of each section can be individually characterized for design optimization on EVAC heat sink as well as for cooling performance estimation for what-if scenario analysis in a system so that system trade-off can be investigated to optimize system trade-off to provide overall better system cooling performance. The thermal resistance network methodology described in this paper can accurately predict the EVAC heat sink thermal performance independent of system boundary conditions at different locations on the heatsink. It can also be used to optimize the overall EVAC performance. The network thermal resistance model predicts the thermal performance within 3-6% of error compared to the test results.The second methodology is to design a wind tunnel test setup with other key components (DIMM in this paper) included from a specific system so that the airflow is somewhat representative as in that system. This methodology is meant to provide a repeatable and easy-to-setup way to benchmark and compare EVAC HS performance across different designs, vendors and/or builds.This paper also shows the test results of an EVAC heat sink prototype in a spread core system to assess the cooling performance gain comparing to a non-EVAC HS. While EVAC improves CPU cooling, it could have negative impact on other system components depending on the placement of the outriggers. This paper showcased the system cooling balancing between CPU and DIMM, with different EVAC design. EVAC heatsink described in this paper can provide 20-30% improvement in thermal performance of CPU and reduces memory cooling ca
{"title":"Thermal Characterization Methodology and Cooling Performance of Extended Volume Air Cooling (EVAC) Heat Sinks","authors":"Priyanka Tunuguntla, Guixiang Ellen Tan, E. Chenelly","doi":"10.1109/ITherm45881.2020.9190391","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190391","url":null,"abstract":"With increased processor cores and performance for CPU/GPU, thermal design power (TDP) of these products are increasing. Traditional air-cooling solutions are sometimes insufficient to cool high density, high powered CPUs. Liquid cooling solutions can support higher power but would drive for significant initial capital investment and may not be the best solution for cooling if total cost of ownership (TCO) is high. Hence advanced air-cooling solutions like Extended Volume Air Cooling (EVAC) heat sinks are more ideal to adopt. These heat sinks use heat pipes or thermosiphon tubes to transfer the heat to regions where more physical volume is available for additional heat exchangers to deliver the best overall performance. With these extra cooling surfaces (outriggers), the thermal performance of the heat sink can be improved.The characterization of EVAC at the component level is much less straightforward than standard heat sinks due to the complexity of air flow distribution among different sections of an EVAC heat sink. This airflow distribution must be understood in order to determine effects by and on the surrounding system. This paper shows two methodologies to characterize EVAC heat sink performance at component level.The first one is to apply a thermal resistance network methodology with wind tunnel testing results of sections of the heat sink so that the cooling contribution of each section can be individually characterized for design optimization on EVAC heat sink as well as for cooling performance estimation for what-if scenario analysis in a system so that system trade-off can be investigated to optimize system trade-off to provide overall better system cooling performance. The thermal resistance network methodology described in this paper can accurately predict the EVAC heat sink thermal performance independent of system boundary conditions at different locations on the heatsink. It can also be used to optimize the overall EVAC performance. The network thermal resistance model predicts the thermal performance within 3-6% of error compared to the test results.The second methodology is to design a wind tunnel test setup with other key components (DIMM in this paper) included from a specific system so that the airflow is somewhat representative as in that system. This methodology is meant to provide a repeatable and easy-to-setup way to benchmark and compare EVAC HS performance across different designs, vendors and/or builds.This paper also shows the test results of an EVAC heat sink prototype in a spread core system to assess the cooling performance gain comparing to a non-EVAC HS. While EVAC improves CPU cooling, it could have negative impact on other system components depending on the placement of the outriggers. This paper showcased the system cooling balancing between CPU and DIMM, with different EVAC design. EVAC heatsink described in this paper can provide 20-30% improvement in thermal performance of CPU and reduces memory cooling ca","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131965374","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190941
Janhavi Chitale, A. Abdoli, G. Dulikravich, A. Sabau, James B. Black
Compact heat exchangers using supercritical fluids such as CO2 are preferred due to their high heat transfer capacity and smaller footprint. Three-dimensional conjugate forced convection heat transfer analysis was performed on several shell-and-tube counter-flow microchannel heat exchangers. Numerical simulations were conducted to test effect of change in mass flow rate, hydraulic diameter and various cross sections on the heat transfer. Increasing mass flow rate improved heat transfer up to a maximum value and then decreased downstream with increasing turbulence. Maximum heat transfer was obtained for the micro channel with the smallest hydraulic diameter. Amongst the cross sections analyzed (circular, square, circular with radial ribs, and square with radial ribs), the most uniform distribution of temperature and maximum heat transfer were obtained for circular cross section with radial ribs. An optimally efficient operation of such a heat exchanger can be attained by considering these factors during multi-objective constrained optimization of geometric parameters and requirements for additive manufacturing of such compact heat exchangers.
{"title":"Conjugate Heat Transfer Analysis of the Supercritical CO2 Based Counter Flow Compact 3D Heat Exchangers","authors":"Janhavi Chitale, A. Abdoli, G. Dulikravich, A. Sabau, James B. Black","doi":"10.1109/ITherm45881.2020.9190941","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190941","url":null,"abstract":"Compact heat exchangers using supercritical fluids such as CO2 are preferred due to their high heat transfer capacity and smaller footprint. Three-dimensional conjugate forced convection heat transfer analysis was performed on several shell-and-tube counter-flow microchannel heat exchangers. Numerical simulations were conducted to test effect of change in mass flow rate, hydraulic diameter and various cross sections on the heat transfer. Increasing mass flow rate improved heat transfer up to a maximum value and then decreased downstream with increasing turbulence. Maximum heat transfer was obtained for the micro channel with the smallest hydraulic diameter. Amongst the cross sections analyzed (circular, square, circular with radial ribs, and square with radial ribs), the most uniform distribution of temperature and maximum heat transfer were obtained for circular cross section with radial ribs. An optimally efficient operation of such a heat exchanger can be attained by considering these factors during multi-objective constrained optimization of geometric parameters and requirements for additive manufacturing of such compact heat exchangers.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134623574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190512
Yuanchen Hu, Xiangfei Yu, M. David, S. Ahladas, Noah Singer
Battery packs can be used to provide emergency during power outages to allow ride-through until restoration of backup power or alternatively, provide sufficient uptime allow the system to backup or save data and records and a safe shutdown. Using battery packs also contributes to more robust power design and higher immunity to power disturbance. Heat transfer in each battery cell as well battery packs remains a challenge because of the complex multi-physics phenomenon and heat transfer paths. temperatures rise with heat generated during both charging and discharging processes. A validated transient heat model can enable real-time temperature monitoring as well achieve better battery thermal management. A full flow and thermal transient simulation was built to investigate the heat transfer phenomenon during the discharging of forced air-cooled battery packs. This transient model is verified with experimental testing and could provide temperature predictions of air-cooled battery packs various battery powers and working conditions.
{"title":"Transient CFD Heat Transfer Simulation Model of Air-Cooled Battery Packs","authors":"Yuanchen Hu, Xiangfei Yu, M. David, S. Ahladas, Noah Singer","doi":"10.1109/ITherm45881.2020.9190512","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190512","url":null,"abstract":"Battery packs can be used to provide emergency during power outages to allow ride-through until restoration of backup power or alternatively, provide sufficient uptime allow the system to backup or save data and records and a safe shutdown. Using battery packs also contributes to more robust power design and higher immunity to power disturbance. Heat transfer in each battery cell as well battery packs remains a challenge because of the complex multi-physics phenomenon and heat transfer paths. temperatures rise with heat generated during both charging and discharging processes. A validated transient heat model can enable real-time temperature monitoring as well achieve better battery thermal management. A full flow and thermal transient simulation was built to investigate the heat transfer phenomenon during the discharging of forced air-cooled battery packs. This transient model is verified with experimental testing and could provide temperature predictions of air-cooled battery packs various battery powers and working conditions.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133603229","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190311
P. Shamberger, Alison Hoe, Michael E. Deckard, M. Barako
The dynamics of oscillatory melting-solidification fronts in finite thickness slabs are relevant for a variety of natural and engineered systems. In electronics packages, slabs of phase change materials (PCMs) are considered as a means of increasing the thermal capacitance and mitigate transient temperature rise within the package by melting and absorbing heat. In this context, the frequency-dependent dynamic response of a PCM reveals the rate at which it can effectively absorb and release heat and buffer a transient heat pulse. This study presents a numerical investigation of the transient thermal response of a slab to a harmonic heat flux boundary condition on one side and a constant temperature or convective cooling boundary condition on the opposite side. Within this particular regime, the internal temperature profile is strongly perturbed from the single-phase case due to heat being absorbed (released) during melting (solidification) at the solid-liquid interface. This results in a phase lag ∆ϕ and a depression in the peak temperature ∆T at the heat source. The magnitude and frequency dependence of this anti-resonance depends on the characteristics of the periodic heating function, material thermophysical properties, the thickness of the slab, and the nature of the applied cooling boundary condition.
{"title":"Effects of Boundary Conditions on the Dynamic Response of a Phase Change Material","authors":"P. Shamberger, Alison Hoe, Michael E. Deckard, M. Barako","doi":"10.1109/ITherm45881.2020.9190311","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190311","url":null,"abstract":"The dynamics of oscillatory melting-solidification fronts in finite thickness slabs are relevant for a variety of natural and engineered systems. In electronics packages, slabs of phase change materials (PCMs) are considered as a means of increasing the thermal capacitance and mitigate transient temperature rise within the package by melting and absorbing heat. In this context, the frequency-dependent dynamic response of a PCM reveals the rate at which it can effectively absorb and release heat and buffer a transient heat pulse. This study presents a numerical investigation of the transient thermal response of a slab to a harmonic heat flux boundary condition on one side and a constant temperature or convective cooling boundary condition on the opposite side. Within this particular regime, the internal temperature profile is strongly perturbed from the single-phase case due to heat being absorbed (released) during melting (solidification) at the solid-liquid interface. This results in a phase lag ∆ϕ and a depression in the peak temperature ∆T at the heat source. The magnitude and frequency dependence of this anti-resonance depends on the characteristics of the periodic heating function, material thermophysical properties, the thickness of the slab, and the nature of the applied cooling boundary condition.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133919206","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2020-07-01DOI: 10.1109/ITherm45881.2020.9190257
Yuqing Zhou, T. Nomura, E. Dede
The manifold microchannel (MMC) heat sink has been widely studied for liquid-cooling of power-dense electronic components. Conventionally, thermal-fluid performance of an MMC heat sink is analyzed via unit cell simulations and designed by varying the rectangular fin and channel geometries, namely size optimization. To further explore the performance potential of the MMC heat sink, this paper proposes topology optimization (TO) to design the optimal freeform fin/channel geometry to maximize heat transfer performance while minimizing the required pumping power. The heat transfer physics in an MMC heat sink is governed by conjugate heat transfer between an incompressible laminar fluid and a heated conductor. The MMC heat sink fin/channel geometry design is formulated as a material distribution problem in a periodic unit cell. Since TO describes the geometry non-parametrically, it facilitates innovative designs through the exploration of arbitrary shapes. The physics-governed design optimization problem is solved by mathematical programming using design sensitivities and an iterative gradient-based method. The thermal-fluid performance is presented for both conventional size optimization and the proposed TO approach, considering the heat transfer performance versus the required pumping power. It is demonstrated that the TO designed fin/channel geometries outperform those obtained through size optimization. Due to the shape complexity associated with the TO designed fin/channel geometries, they are not readily suitable for conventional manufacturing processes, e.g., machining and metal die-casting. However, such out-of-box designs fully exploit the flexibility offered by the latest advanced manufacturing processes, e.g., additive manufacturing and rapid investment casting.
{"title":"Topology Optimization of Manifold Microchannel Heat Sinks","authors":"Yuqing Zhou, T. Nomura, E. Dede","doi":"10.1109/ITherm45881.2020.9190257","DOIUrl":"https://doi.org/10.1109/ITherm45881.2020.9190257","url":null,"abstract":"The manifold microchannel (MMC) heat sink has been widely studied for liquid-cooling of power-dense electronic components. Conventionally, thermal-fluid performance of an MMC heat sink is analyzed via unit cell simulations and designed by varying the rectangular fin and channel geometries, namely size optimization. To further explore the performance potential of the MMC heat sink, this paper proposes topology optimization (TO) to design the optimal freeform fin/channel geometry to maximize heat transfer performance while minimizing the required pumping power. The heat transfer physics in an MMC heat sink is governed by conjugate heat transfer between an incompressible laminar fluid and a heated conductor. The MMC heat sink fin/channel geometry design is formulated as a material distribution problem in a periodic unit cell. Since TO describes the geometry non-parametrically, it facilitates innovative designs through the exploration of arbitrary shapes. The physics-governed design optimization problem is solved by mathematical programming using design sensitivities and an iterative gradient-based method. The thermal-fluid performance is presented for both conventional size optimization and the proposed TO approach, considering the heat transfer performance versus the required pumping power. It is demonstrated that the TO designed fin/channel geometries outperform those obtained through size optimization. Due to the shape complexity associated with the TO designed fin/channel geometries, they are not readily suitable for conventional manufacturing processes, e.g., machining and metal die-casting. However, such out-of-box designs fully exploit the flexibility offered by the latest advanced manufacturing processes, e.g., additive manufacturing and rapid investment casting.","PeriodicalId":193052,"journal":{"name":"2020 19th IEEE Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (ITherm)","volume":"43 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2020-07-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132720012","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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