Pub Date : 2000-05-23DOI: 10.1109/ITHERM.2000.866805
N. Dean, A. Gupta
A series of tests to characterize the suitability of a material as a thermal interface for burn-in applications were generated. These tests include thermal resistance at elevated temperature, thermal resistance as a function of cycle number, mechanical cycling with and without shear, extended high temperature exposure, residue measurements, mechanical compliance measurements, and tensile and shear strength measurements. Results from testing were used to optimize an in house thermal interface material to withstand repetitive burn-in cycles without requiring replacement.
{"title":"Characterization of a thermal interface material for burn-in application","authors":"N. Dean, A. Gupta","doi":"10.1109/ITHERM.2000.866805","DOIUrl":"https://doi.org/10.1109/ITHERM.2000.866805","url":null,"abstract":"A series of tests to characterize the suitability of a material as a thermal interface for burn-in applications were generated. These tests include thermal resistance at elevated temperature, thermal resistance as a function of cycle number, mechanical cycling with and without shear, extended high temperature exposure, residue measurements, mechanical compliance measurements, and tensile and shear strength measurements. Results from testing were used to optimize an in house thermal interface material to withstand repetitive burn-in cycles without requiring replacement.","PeriodicalId":201262,"journal":{"name":"ITHERM 2000. The Seventh Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.00CH37069)","volume":"290 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116241574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-05-23DOI: 10.1109/ITHERM.2000.866835
M. Gibbel, T. Larson
An Engineering-of-Failure approach to designing and executing an accelerated product qualification test was performed to support a risk assessment of a "work-around" necessitated by an on-orbit failure of another piece of hardware on the Mars Global Surveyor spacecraft. The proposed work-around involved exceeding the previous qualification experience both in terms of extreme cold exposure level and in terms of demonstrated low cycle fatigue life for the power shunt assemblies. An analysis was performed to identify potential failure sites, modes and associated failure mechanisms consistent with the new use conditions. A test was then designed and executed which accelerated the failure mechanisms identified by analysis. Verification of the resulting failure mechanism concluded the effort. MIL STD. 883C calls out several tests that are intended to assess the qualify of wire bonds used in packaged semiconductor devices. Unfortunately, these same tests do not necessarily assure the reliability of these same wirebonds under field use conditions. This is particularly true for missions that involve a significant number of thermal cycles either as a result of power cycles or environmentally induced thermal cycles. This paper concludes with a brief discussion of this and its implications.
{"title":"An engineering-of-failure approach to designing and executing an accelerated product qualification test","authors":"M. Gibbel, T. Larson","doi":"10.1109/ITHERM.2000.866835","DOIUrl":"https://doi.org/10.1109/ITHERM.2000.866835","url":null,"abstract":"An Engineering-of-Failure approach to designing and executing an accelerated product qualification test was performed to support a risk assessment of a \"work-around\" necessitated by an on-orbit failure of another piece of hardware on the Mars Global Surveyor spacecraft. The proposed work-around involved exceeding the previous qualification experience both in terms of extreme cold exposure level and in terms of demonstrated low cycle fatigue life for the power shunt assemblies. An analysis was performed to identify potential failure sites, modes and associated failure mechanisms consistent with the new use conditions. A test was then designed and executed which accelerated the failure mechanisms identified by analysis. Verification of the resulting failure mechanism concluded the effort. MIL STD. 883C calls out several tests that are intended to assess the qualify of wire bonds used in packaged semiconductor devices. Unfortunately, these same tests do not necessarily assure the reliability of these same wirebonds under field use conditions. This is particularly true for missions that involve a significant number of thermal cycles either as a result of power cycles or environmentally induced thermal cycles. This paper concludes with a brief discussion of this and its implications.","PeriodicalId":201262,"journal":{"name":"ITHERM 2000. The Seventh Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.00CH37069)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123775009","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-05-23DOI: 10.1109/ITHERM.2000.866841
K. Karimanal, R. Nair
Zero thickness conducting plates are CFD objects that may be used to model 3 dimensional conduction in thin objects used in electronic cooling applications. The use of zero thickness conducting plates, when applicable can result in significant reduction in finite volume element count. The validity of using these thin conducting plates for CFD modeling of certain objects frequently used in electronic systems was studied using ICEPAK, a CFD software for electronics cooling application.
{"title":"Use of zero thickness conducting plate object in electronics cooling applications of CFD","authors":"K. Karimanal, R. Nair","doi":"10.1109/ITHERM.2000.866841","DOIUrl":"https://doi.org/10.1109/ITHERM.2000.866841","url":null,"abstract":"Zero thickness conducting plates are CFD objects that may be used to model 3 dimensional conduction in thin objects used in electronic cooling applications. The use of zero thickness conducting plates, when applicable can result in significant reduction in finite volume element count. The validity of using these thin conducting plates for CFD modeling of certain objects frequently used in electronic systems was studied using ICEPAK, a CFD software for electronics cooling application.","PeriodicalId":201262,"journal":{"name":"ITHERM 2000. The Seventh Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.00CH37069)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130767213","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-05-23DOI: 10.1109/ITHERM.2000.866220
F. Sarvar, D. Whalley
This paper will discuss the design of semiconductor packages having integrated air cooled heatsinks for use in high power electronic systems. It will demonstrate how simple models of the heat transfer from the heatsink fins, which are based on empirical correlations, may be utilised in combination with either simple analytical models or two dimensional finite difference (FD) models of the heat conduction from the semiconductor die through the multilayer package structure to the base of the fins. These models allow the rapid evaluation of performance under both steady state and transient overload conditions, and can be used to rapidly explore a wide range of design options before selecting candidate layouts for more detailed evaluation using, for example, 3D FD analysis. Wind tunnel experiments, which will also be reported, have been carried out to verify the modelling results for different semiconductor device layouts. These trials demonstrate excellent agreement between the models and experimental results.
{"title":"IGBT package design for high power aircraft electronic systems","authors":"F. Sarvar, D. Whalley","doi":"10.1109/ITHERM.2000.866220","DOIUrl":"https://doi.org/10.1109/ITHERM.2000.866220","url":null,"abstract":"This paper will discuss the design of semiconductor packages having integrated air cooled heatsinks for use in high power electronic systems. It will demonstrate how simple models of the heat transfer from the heatsink fins, which are based on empirical correlations, may be utilised in combination with either simple analytical models or two dimensional finite difference (FD) models of the heat conduction from the semiconductor die through the multilayer package structure to the base of the fins. These models allow the rapid evaluation of performance under both steady state and transient overload conditions, and can be used to rapidly explore a wide range of design options before selecting candidate layouts for more detailed evaluation using, for example, 3D FD analysis. Wind tunnel experiments, which will also be reported, have been carried out to verify the modelling results for different semiconductor device layouts. These trials demonstrate excellent agreement between the models and experimental results.","PeriodicalId":201262,"journal":{"name":"ITHERM 2000. The Seventh Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.00CH37069)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131002753","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-05-23DOI: 10.1109/ITHERM.2000.866820
M. Iyengar, A. Bar-Cohen
The development of cost/effective heat sinks for microelectronic applications involves the achievement of a subtle balance between the thermal design, for maximum heat rejection, and "design for manufacturability," for lowest material and manufacturing costs. The study reported herein extends a previously reported methodology to forced convection cooled rectangular plate heat sinks. Using a well validated analytical model, the thermofluid performance of the side-inlet-side-exit (SISE) heat sink has been characterized, parametric optimization carried out, and the maximum heat transfer capabilities for a range of operating points has been determined. A least-material optimization has been performed to achieve optimal material use. The analysis indicates the least-material design to provide significant mass savings for a moderate penalty in thermal performance. Empirical criteria for manufacturability obtained from several heat sink manufacturers lead to qualitative guidelines.
{"title":"Design for manufacturability of SISE parallel plate forced convection heat sinks","authors":"M. Iyengar, A. Bar-Cohen","doi":"10.1109/ITHERM.2000.866820","DOIUrl":"https://doi.org/10.1109/ITHERM.2000.866820","url":null,"abstract":"The development of cost/effective heat sinks for microelectronic applications involves the achievement of a subtle balance between the thermal design, for maximum heat rejection, and \"design for manufacturability,\" for lowest material and manufacturing costs. The study reported herein extends a previously reported methodology to forced convection cooled rectangular plate heat sinks. Using a well validated analytical model, the thermofluid performance of the side-inlet-side-exit (SISE) heat sink has been characterized, parametric optimization carried out, and the maximum heat transfer capabilities for a range of operating points has been determined. A least-material optimization has been performed to achieve optimal material use. The analysis indicates the least-material design to provide significant mass savings for a moderate penalty in thermal performance. Empirical criteria for manufacturability obtained from several heat sink manufacturers lead to qualitative guidelines.","PeriodicalId":201262,"journal":{"name":"ITHERM 2000. The Seventh Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.00CH37069)","volume":"62 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127714190","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-05-23DOI: 10.1109/ITHERM.2000.866839
S. Dahlgren, H. T. Hall
Diamond is an ideal material for heat spreading applications; CVD PCD is many times more expensive than high pressure PCD because it grows much slower and the material cost is higher. High-pressure PCD can be produced in large quantities and molded into shapes at a reasonable price. Novatek's patented high pressure synthesis process produces PCD with a conductivity of 700 W/m/spl deg/K, almost twice that of copper. Diamond heat spreaders are most effective in applications producing high heat flux densities. Diamond becomes far more conductive than metals at cryogenic temperatures. The thermal junction between the IC and the heat sink is a predominant thermal resistance. High pressure diamond has favorable thermal expansion and stiffness coefficients and is easily pre-metalized insitu, making it a good material for direct bonding to the IC.
{"title":"High-pressure polycrystalline diamond as a cost effective heat spreader","authors":"S. Dahlgren, H. T. Hall","doi":"10.1109/ITHERM.2000.866839","DOIUrl":"https://doi.org/10.1109/ITHERM.2000.866839","url":null,"abstract":"Diamond is an ideal material for heat spreading applications; CVD PCD is many times more expensive than high pressure PCD because it grows much slower and the material cost is higher. High-pressure PCD can be produced in large quantities and molded into shapes at a reasonable price. Novatek's patented high pressure synthesis process produces PCD with a conductivity of 700 W/m/spl deg/K, almost twice that of copper. Diamond heat spreaders are most effective in applications producing high heat flux densities. Diamond becomes far more conductive than metals at cryogenic temperatures. The thermal junction between the IC and the heat sink is a predominant thermal resistance. High pressure diamond has favorable thermal expansion and stiffness coefficients and is easily pre-metalized insitu, making it a good material for direct bonding to the IC.","PeriodicalId":201262,"journal":{"name":"ITHERM 2000. The Seventh Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.00CH37069)","volume":"198 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114360927","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-05-23DOI: 10.1109/ITHERM.2000.866208
S. Bhavnani, Gilbert Fournelle, R. Jaeger
The development of effective heat sinks for the primary heat-dissipating component of a typical portable electronics device is an ongoing challenge. Thermal management using air-cooling is limited by the inherently poor thermal properties of the coolant. Other alternatives, including liquid immersion cooling, phase-change materials, and heat pipes, may merit consideration if the basic mechanisms can be reliably predicted. This study sheds light on the nucleation characteristics of an etched cavity-enhanced surface for use in an immersion-cooled heat sink. The target application is a high-density multi-chip module with several heat dissipating sources. High-speed photography was used to record parameters such as bubble interactions, bubble size, departure frequency and active site density while varying the cavity spacing and heat flux. The cavities, which are approximately 40 /spl mu/m, are arranged in a square cluster 12.7 mm on each side. It was determined that the contribution of latent heat as a heat dissipation mechanism is only minor (less than 16%). In addition, it is proposed that the latent heat dissipation percentage may be used as a thermal performance indicator. Interactions between neighboring heat sources were also studied. These interactions decreased the bubble departure frequency and thereby affected the latent heat contribution.
{"title":"Immersion-cooled heat sinks for electronics: insight from high-speed photography","authors":"S. Bhavnani, Gilbert Fournelle, R. Jaeger","doi":"10.1109/ITHERM.2000.866208","DOIUrl":"https://doi.org/10.1109/ITHERM.2000.866208","url":null,"abstract":"The development of effective heat sinks for the primary heat-dissipating component of a typical portable electronics device is an ongoing challenge. Thermal management using air-cooling is limited by the inherently poor thermal properties of the coolant. Other alternatives, including liquid immersion cooling, phase-change materials, and heat pipes, may merit consideration if the basic mechanisms can be reliably predicted. This study sheds light on the nucleation characteristics of an etched cavity-enhanced surface for use in an immersion-cooled heat sink. The target application is a high-density multi-chip module with several heat dissipating sources. High-speed photography was used to record parameters such as bubble interactions, bubble size, departure frequency and active site density while varying the cavity spacing and heat flux. The cavities, which are approximately 40 /spl mu/m, are arranged in a square cluster 12.7 mm on each side. It was determined that the contribution of latent heat as a heat dissipation mechanism is only minor (less than 16%). In addition, it is proposed that the latent heat dissipation percentage may be used as a thermal performance indicator. Interactions between neighboring heat sources were also studied. These interactions decreased the bubble departure frequency and thereby affected the latent heat contribution.","PeriodicalId":201262,"journal":{"name":"ITHERM 2000. The Seventh Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.00CH37069)","volume":"46 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123466277","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-05-23DOI: 10.1109/ITHERM.2000.866187
M.C. Yang, Matt Cienkus, Michael Hajovsky, Tom Basey
Due to price competition, low-cost design plays an important role in the power amplifier (PA) market. The cost of new single board design saves about 50% of direct material cost. Other advantages include decreasing direct labor cost, increasing maximum power output, increasing PA efficiency, and decreasing piece part count. For quality and reliability of solder joints, liquid-to-liquid thermal shock test would be considered during the design cycle. It was postulated that the failure is related to the coefficient of thermal expansion (CTE) mismatch between different materials, in the PCB, heat spreader, lead, cast heat sink, and device. The high power RF devices used in power amplifiers for base station applications have pushed the requirements of advanced materials and processes to provide new low-cost packaging solutions. A methodology is presented for design option evaluation and failure possibility prediction for solder joints on single board power amplifier. This method integrates the finite element analysis models and experimental data. The finite element model identifies the displacement at the solder joint locations. Several sets of experimental tests have been conducted and analyzed to evaluate the design improvements. Good correlation has been achieved between finite element analysis (FEA) predictions and experimental tests on design options.
{"title":"A method to predict failure of solder joints caused by thermal shock using finite element analysis for RF power amplifier applications","authors":"M.C. Yang, Matt Cienkus, Michael Hajovsky, Tom Basey","doi":"10.1109/ITHERM.2000.866187","DOIUrl":"https://doi.org/10.1109/ITHERM.2000.866187","url":null,"abstract":"Due to price competition, low-cost design plays an important role in the power amplifier (PA) market. The cost of new single board design saves about 50% of direct material cost. Other advantages include decreasing direct labor cost, increasing maximum power output, increasing PA efficiency, and decreasing piece part count. For quality and reliability of solder joints, liquid-to-liquid thermal shock test would be considered during the design cycle. It was postulated that the failure is related to the coefficient of thermal expansion (CTE) mismatch between different materials, in the PCB, heat spreader, lead, cast heat sink, and device. The high power RF devices used in power amplifiers for base station applications have pushed the requirements of advanced materials and processes to provide new low-cost packaging solutions. A methodology is presented for design option evaluation and failure possibility prediction for solder joints on single board power amplifier. This method integrates the finite element analysis models and experimental data. The finite element model identifies the displacement at the solder joint locations. Several sets of experimental tests have been conducted and analyzed to evaluate the design improvements. Good correlation has been achieved between finite element analysis (FEA) predictions and experimental tests on design options.","PeriodicalId":201262,"journal":{"name":"ITHERM 2000. The Seventh Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.00CH37069)","volume":"198 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124426216","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-05-23DOI: 10.1109/ITHERM.2000.866193
K. Sikka
A thermal tester has been developed for the accurate measurement of the internal thermal resistance of high-power electronic modules. The tester is designed for the simultaneous measurement of 20 electronic modules each dissipating in excess of 200 W. The heat dissipated is transmitted to the ambient by water-cooled cold plates dedicated to each test site. The tester system layout, mounting assembly, system hydraulic design, cold-plate spreader design and data acquisition instrumentation are described. Sample measurements and the associated uncertainty are also discussed. The sample results are verified by comparison with thermal modeling.
{"title":"Advanced thermal tester for accurate measurement of internal thermal resistance of high power electronic modules","authors":"K. Sikka","doi":"10.1109/ITHERM.2000.866193","DOIUrl":"https://doi.org/10.1109/ITHERM.2000.866193","url":null,"abstract":"A thermal tester has been developed for the accurate measurement of the internal thermal resistance of high-power electronic modules. The tester is designed for the simultaneous measurement of 20 electronic modules each dissipating in excess of 200 W. The heat dissipated is transmitted to the ambient by water-cooled cold plates dedicated to each test site. The tester system layout, mounting assembly, system hydraulic design, cold-plate spreader design and data acquisition instrumentation are described. Sample measurements and the associated uncertainty are also discussed. The sample results are verified by comparison with thermal modeling.","PeriodicalId":201262,"journal":{"name":"ITHERM 2000. The Seventh Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.00CH37069)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117192836","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2000-05-23DOI: 10.1109/ITHERM.2000.866803
A. Devpura, P. Phelan, R. Prasher
A very important aspect in chip design in flip chip technology is the heat dissipation. As the surfaces of the heat sink, the heat spreader and the chip are rough there are imperfect contacts leading to higher thermal resistance due to the contact resistance. A method to decrease this contact resistance is by the use of thermal interface material. These thermal interface materials can be of various types, but most of them are polymers. Percolation theory holds a key to understanding the behavior of these polymers. Percolation, used widely in electrical engineering, is a phenomenon in which the highly conducting particles distributed randomly in the matrix form at least one continuous chain connecting the opposite faces of the matrix. This phenomenon was simulated and analytical results drawn from the program, to study the effect of considering 2-D and 3-D cases, matrix thickness, volume percentage of particles, and base material and particles of different conductivity. The simulation program was based on the matrix method, which not only simplifies the method of calculation but also increases the accuracy of the result thus obtained as compared to the calculations based on Kirchoffs Law or systematic node elimination, to obtain resultant thermal conductivity of the mixture. The analysis showed a sudden increase in thermal conductivity as soon as the percentage of particles reached the percolation threshold, which varied with all the parameters listed above. Comparison with the existing experimental results and the other existing models showed that the results from the percolation model were more accurate than other models, especially at high filler concentration.
{"title":"Percolation theory applied to the analysis of thermal interface materials in flip-chip technology","authors":"A. Devpura, P. Phelan, R. Prasher","doi":"10.1109/ITHERM.2000.866803","DOIUrl":"https://doi.org/10.1109/ITHERM.2000.866803","url":null,"abstract":"A very important aspect in chip design in flip chip technology is the heat dissipation. As the surfaces of the heat sink, the heat spreader and the chip are rough there are imperfect contacts leading to higher thermal resistance due to the contact resistance. A method to decrease this contact resistance is by the use of thermal interface material. These thermal interface materials can be of various types, but most of them are polymers. Percolation theory holds a key to understanding the behavior of these polymers. Percolation, used widely in electrical engineering, is a phenomenon in which the highly conducting particles distributed randomly in the matrix form at least one continuous chain connecting the opposite faces of the matrix. This phenomenon was simulated and analytical results drawn from the program, to study the effect of considering 2-D and 3-D cases, matrix thickness, volume percentage of particles, and base material and particles of different conductivity. The simulation program was based on the matrix method, which not only simplifies the method of calculation but also increases the accuracy of the result thus obtained as compared to the calculations based on Kirchoffs Law or systematic node elimination, to obtain resultant thermal conductivity of the mixture. The analysis showed a sudden increase in thermal conductivity as soon as the percentage of particles reached the percolation threshold, which varied with all the parameters listed above. Comparison with the existing experimental results and the other existing models showed that the results from the percolation model were more accurate than other models, especially at high filler concentration.","PeriodicalId":201262,"journal":{"name":"ITHERM 2000. The Seventh Intersociety Conference on Thermal and Thermomechanical Phenomena in Electronic Systems (Cat. No.00CH37069)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2000-05-23","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115458378","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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