Pub Date : 2003-06-15DOI: 10.1109/PESC.2003.1217731
S. Moisseev, S. Sato, S. Hamada, M. Nakaoka
In this paper, a novel high frequency transformer linked full-bridge type soft-switching phase-shift PWM control scheme DC-DC power converter is presented. A tapped inductor filter is implemented in the proposed soft-switching converter topology to achieve wide load variation range soft-switching PWM constant frequency operation of the DC-DC converter, to minimize circulating current. The presented converter operates with ZVS for leading bridge leg active power switches due to lossless snubber capacitors, and ZCS for lagging bridge leg active power switches with the aid of the high frequency transformer parasitic leakage inductance component and tapped inductor filter. The effectiveness of the proposed soft-switching DC-DC converter is verified in experiment with 2 kW 100 kHz breadboard setup using IGBTs. Actual efficiency of 94% is obtained for the wide load variation range.
{"title":"Full bridge soft-switching phase-shifted PWM DC-DC converter using tapped inductor filter","authors":"S. Moisseev, S. Sato, S. Hamada, M. Nakaoka","doi":"10.1109/PESC.2003.1217731","DOIUrl":"https://doi.org/10.1109/PESC.2003.1217731","url":null,"abstract":"In this paper, a novel high frequency transformer linked full-bridge type soft-switching phase-shift PWM control scheme DC-DC power converter is presented. A tapped inductor filter is implemented in the proposed soft-switching converter topology to achieve wide load variation range soft-switching PWM constant frequency operation of the DC-DC converter, to minimize circulating current. The presented converter operates with ZVS for leading bridge leg active power switches due to lossless snubber capacitors, and ZCS for lagging bridge leg active power switches with the aid of the high frequency transformer parasitic leakage inductance component and tapped inductor filter. The effectiveness of the proposed soft-switching DC-DC converter is verified in experiment with 2 kW 100 kHz breadboard setup using IGBTs. Actual efficiency of 94% is obtained for the wide load variation range.","PeriodicalId":236199,"journal":{"name":"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.","volume":"123 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132614153","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-06-15DOI: 10.1109/PESC.2003.1218291
A. Massoud, S. Finney, B. Williams
In this paper different open loop PWM control techniques for multilevel voltage source inverters are investigated and compared. For sinusoidal PWM control, a comparison between different carrier techniques with different modulating signals is performed. This comparison includes total harmonic distortion and distortion factor of the phase and line voltages. A comparison between different modulating signals in sinusoidal PWM (pure sinusoidal, third harmonic injection, and dead band), space vector modulation, and sigma-delta modulation is performed. This comparison includes total harmonic distortion, distortion factor, fundamental, and harmonic RMS of the line voltage.
{"title":"Control techniques for multilevel voltage source inverters","authors":"A. Massoud, S. Finney, B. Williams","doi":"10.1109/PESC.2003.1218291","DOIUrl":"https://doi.org/10.1109/PESC.2003.1218291","url":null,"abstract":"In this paper different open loop PWM control techniques for multilevel voltage source inverters are investigated and compared. For sinusoidal PWM control, a comparison between different carrier techniques with different modulating signals is performed. This comparison includes total harmonic distortion and distortion factor of the phase and line voltages. A comparison between different modulating signals in sinusoidal PWM (pure sinusoidal, third harmonic injection, and dead band), space vector modulation, and sigma-delta modulation is performed. This comparison includes total harmonic distortion, distortion factor, fundamental, and harmonic RMS of the line voltage.","PeriodicalId":236199,"journal":{"name":"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132925635","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-06-15DOI: 10.1109/PESC.2003.1218273
J. Pou, D. Boroyevich, R. Pindado
The effects of linear imbalances and nonlinear loads on the voltage balance of the neutral-point-clamped converter are described in this paper. The study reveals that a negative sequence of output currents (linear imbalance) may produce additional low-frequency oscillations to the neutral-point voltage. Similar consequences are produced by odd-order current harmonics from a nonlinear load, while even-order harmonics can cause the neutral-point voltage to shift. Furthermore, the second, fourth and eighth output current harmonics might produce instability to the neutral-point voltage. The second and fourth harmonics are the worst components. The maximum amplitudes of these harmonics superposed to the current fundamentals that the system can tolerate are described. Simulated and experimental examples are presented.
{"title":"Effects of imbalances and nonlinear loads on the voltage balance of a neutral-point-clamped inverter","authors":"J. Pou, D. Boroyevich, R. Pindado","doi":"10.1109/PESC.2003.1218273","DOIUrl":"https://doi.org/10.1109/PESC.2003.1218273","url":null,"abstract":"The effects of linear imbalances and nonlinear loads on the voltage balance of the neutral-point-clamped converter are described in this paper. The study reveals that a negative sequence of output currents (linear imbalance) may produce additional low-frequency oscillations to the neutral-point voltage. Similar consequences are produced by odd-order current harmonics from a nonlinear load, while even-order harmonics can cause the neutral-point voltage to shift. Furthermore, the second, fourth and eighth output current harmonics might produce instability to the neutral-point voltage. The second and fourth harmonics are the worst components. The maximum amplitudes of these harmonics superposed to the current fundamentals that the system can tolerate are described. Simulated and experimental examples are presented.","PeriodicalId":236199,"journal":{"name":"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133208686","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-06-15DOI: 10.1109/PESC.2003.1217713
P. Mattavelli, G. Spiazzi, P. Tenti
The paper present a fully digital control of single-phase boost power factor preregulators (PFPs) based on inductor (or switch) current and output voltage measurements. Input voltage sensing is avoided using a disturbance observer, which provides a waveform proportional to the rectified input voltage. The proposed solution is based on a multiloop structure for PFP with an internal deadbeat current control and an outer voltage control with fast dynamic response. The resulting control algorithm is simple, accurate and robust respect to parameter mismatch. The digital control has been implemented both in a field programmable gate array (FPGA) and in a DSP (TMS320F2812), so as to test the proposed algorithm with different control delays. Experimental results on a single-phase 500 W boost PFP show the effectiveness of the proposed solution.
{"title":"Predictive digital control of power factor preregulators using disturbance observer for input voltage estimation","authors":"P. Mattavelli, G. Spiazzi, P. Tenti","doi":"10.1109/PESC.2003.1217713","DOIUrl":"https://doi.org/10.1109/PESC.2003.1217713","url":null,"abstract":"The paper present a fully digital control of single-phase boost power factor preregulators (PFPs) based on inductor (or switch) current and output voltage measurements. Input voltage sensing is avoided using a disturbance observer, which provides a waveform proportional to the rectified input voltage. The proposed solution is based on a multiloop structure for PFP with an internal deadbeat current control and an outer voltage control with fast dynamic response. The resulting control algorithm is simple, accurate and robust respect to parameter mismatch. The digital control has been implemented both in a field programmable gate array (FPGA) and in a DSP (TMS320F2812), so as to test the proposed algorithm with different control delays. Experimental results on a single-phase 500 W boost PFP show the effectiveness of the proposed solution.","PeriodicalId":236199,"journal":{"name":"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133807059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-06-15DOI: 10.1109/PESC.2003.1216625
M. Marei, E. El-Saadany, M. Salama
The series compensator is a challenging solution for power quality problems related to the voltage. One of the most common control algorithms used for the series voltage compensator is the symmetrical component method. this paper introduces a new recursive least square (RLS) structure for symmetrical components estimation. This structure is capable of dealing with multioutput (MO) systems for parameter estimation and is called MO-RLS. A novel feed forward control based on the proposed MO-RLS is dictated for the series compensator not only to compensate for the zero and negative sequence components, but also to regulate the positive sequence component to the nominal load voltage. One advantage of the proposed control system is its insensitivity to parameters variation, a necessity for the series compensator. Simulations of the proposed algorithm are conducted to show the robustness, the high accuracy and the fast dynamic performance of the novel system.
{"title":"An efficient control of the series compensator for sag mitigation and voltage regulation","authors":"M. Marei, E. El-Saadany, M. Salama","doi":"10.1109/PESC.2003.1216625","DOIUrl":"https://doi.org/10.1109/PESC.2003.1216625","url":null,"abstract":"The series compensator is a challenging solution for power quality problems related to the voltage. One of the most common control algorithms used for the series voltage compensator is the symmetrical component method. this paper introduces a new recursive least square (RLS) structure for symmetrical components estimation. This structure is capable of dealing with multioutput (MO) systems for parameter estimation and is called MO-RLS. A novel feed forward control based on the proposed MO-RLS is dictated for the series compensator not only to compensate for the zero and negative sequence components, but also to regulate the positive sequence component to the nominal load voltage. One advantage of the proposed control system is its insensitivity to parameters variation, a necessity for the series compensator. Simulations of the proposed algorithm are conducted to show the robustness, the high accuracy and the fast dynamic performance of the novel system.","PeriodicalId":236199,"journal":{"name":"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133850088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-06-15DOI: 10.1109/PESC.2003.1217709
Kihong Park, Tae-Sung Kim, Sung-Chan Ahn, D. Hyun
This paper presents a novel robust speed control method based on the load torque observer of high-performance brushless DC (BLDC) motor. Recently, high-performance BLDC motor drives are widely used for variable speed drive systems of the industrial applications. In case of the control of robot arms and tracking applications with lower stiffness, we cannot design the speed controller gain to be very large from the viewpoint of the system stability. Thus, the feedforward compensator with disturbance torque observer was proposed. This method can improve the servo stiffness without increasing the speed controller gain. The enhanced speed control performance can be achieved and the speed response against the disturbance torque can be improved for high-performance BLDC motor drive systems in which the bandwidth of the speed controller cannot be made large enough. The load disturbance is compensated by detected load torque through the observer. The compensation current is made through q-axis current. The d-q transform of phase currents were possible by the Fourier series summation method. Consequently, the speed control for high-performance BLDC motor drives become improved. The simulation results for BLDC motor drive systems confirm the validity of the proposed method.
{"title":"Speed control of high-performance brushless DC motor drives by load torque estimation","authors":"Kihong Park, Tae-Sung Kim, Sung-Chan Ahn, D. Hyun","doi":"10.1109/PESC.2003.1217709","DOIUrl":"https://doi.org/10.1109/PESC.2003.1217709","url":null,"abstract":"This paper presents a novel robust speed control method based on the load torque observer of high-performance brushless DC (BLDC) motor. Recently, high-performance BLDC motor drives are widely used for variable speed drive systems of the industrial applications. In case of the control of robot arms and tracking applications with lower stiffness, we cannot design the speed controller gain to be very large from the viewpoint of the system stability. Thus, the feedforward compensator with disturbance torque observer was proposed. This method can improve the servo stiffness without increasing the speed controller gain. The enhanced speed control performance can be achieved and the speed response against the disturbance torque can be improved for high-performance BLDC motor drive systems in which the bandwidth of the speed controller cannot be made large enough. The load disturbance is compensated by detected load torque through the observer. The compensation current is made through q-axis current. The d-q transform of phase currents were possible by the Fourier series summation method. Consequently, the speed control for high-performance BLDC motor drives become improved. The simulation results for BLDC motor drive systems confirm the validity of the proposed method.","PeriodicalId":236199,"journal":{"name":"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.","volume":"19 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115379630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-06-15DOI: 10.1109/PESC.2003.1218328
X. Xue, K. Cheng, S. Ho, D. Sutanto
The precise analytical modeling magnetic characteristics in the switched reluctance motors is presented in this study, based on the two-dimensional least squares. The proposed precise modeling is the analytical expression with respect to both the rotor position and the current. The coefficients in the expression are determined by the two dimensional least squares method. The derivations of the modelling are described in detail. Furthermore, the effect of the degree number of the fitting polynomials on the fitting errors is discussed. The fitting curves from the proposed modelling are fully in agreement with ones from the experiment. It validates the proposed modelling. This study is very helpful for accurate prediction of performance, simulation, torque control, as well as sensorless control of the switched reluctance motor drives.
{"title":"Precise analytical modelling magnetic characteristics of switched reluctance motor drives using two-dimensional least squares","authors":"X. Xue, K. Cheng, S. Ho, D. Sutanto","doi":"10.1109/PESC.2003.1218328","DOIUrl":"https://doi.org/10.1109/PESC.2003.1218328","url":null,"abstract":"The precise analytical modeling magnetic characteristics in the switched reluctance motors is presented in this study, based on the two-dimensional least squares. The proposed precise modeling is the analytical expression with respect to both the rotor position and the current. The coefficients in the expression are determined by the two dimensional least squares method. The derivations of the modelling are described in detail. Furthermore, the effect of the degree number of the fitting polynomials on the fitting errors is discussed. The fitting curves from the proposed modelling are fully in agreement with ones from the experiment. It validates the proposed modelling. This study is very helpful for accurate prediction of performance, simulation, torque control, as well as sensorless control of the switched reluctance motor drives.","PeriodicalId":236199,"journal":{"name":"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116736799","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-06-15DOI: 10.1109/PESC.2003.1218111
C. Attaianese, G. Tomasso
Pulsewidth modulated voltage source inverter can be easily controlled in such a way as to achieve the desired value of the output voltage and/or current, but they exhibit high switching losses when operated at high switching frequencies. Besides, relevant electromagnetic interferences can be produced because of the high di/dt and dv/dt in the converter waveforms. These problems can be partially or totally eliminated if the converter switches are commutated at zero voltage and/or zero current. This is achieved by means of suitable tuned LC resonant circuits. In this paper, a novel topology of quasi-resonant DC link for soft switching of VSI is proposed. It is based on two resonant circuits: a main one, which makes the voltage oscillating around the main DC bus voltage, and which is commutated at zero current, and an auxiliary circuit which is enabled to drive the DC voltage to zero just when an inverter switch commutation occurs. Dead time imposition is fully taken into account. A detailed experiment investigation has been performed for validating the proposed scheme.
{"title":"A new quasi-resonant DC link topology for soft switching of voltage-source inverter","authors":"C. Attaianese, G. Tomasso","doi":"10.1109/PESC.2003.1218111","DOIUrl":"https://doi.org/10.1109/PESC.2003.1218111","url":null,"abstract":"Pulsewidth modulated voltage source inverter can be easily controlled in such a way as to achieve the desired value of the output voltage and/or current, but they exhibit high switching losses when operated at high switching frequencies. Besides, relevant electromagnetic interferences can be produced because of the high di/dt and dv/dt in the converter waveforms. These problems can be partially or totally eliminated if the converter switches are commutated at zero voltage and/or zero current. This is achieved by means of suitable tuned LC resonant circuits. In this paper, a novel topology of quasi-resonant DC link for soft switching of VSI is proposed. It is based on two resonant circuits: a main one, which makes the voltage oscillating around the main DC bus voltage, and which is commutated at zero current, and an auxiliary circuit which is enabled to drive the DC voltage to zero just when an inverter switch commutation occurs. Dead time imposition is fully taken into account. A detailed experiment investigation has been performed for validating the proposed scheme.","PeriodicalId":236199,"journal":{"name":"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115789742","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-06-15DOI: 10.1109/PESC.2003.1218127
M. Jinno, Po-Yuan Chen, Kun-chih Lin
An efficient active LC snubber for multi-output converters with flyback synchronous rectifier (SR) is proposed in this paper. The proposed active LC snubber can be used to reset transformer and suppress switching surges. Besides, by storing surge energy in the proposed active LC snubber and then releasing it to the flyback SR, the converter can achieve high efficiency. For a forward converter with flyback SR, 90.8%, the maximum output efficiency, can be achieved. Experimental results also show that the output efficiency of this converter with the proposed active LC snubber is higher than that of active-clamped-based converters.
{"title":"An efficient active LC snubber for multi-output converters with flyback synchronous rectifier","authors":"M. Jinno, Po-Yuan Chen, Kun-chih Lin","doi":"10.1109/PESC.2003.1218127","DOIUrl":"https://doi.org/10.1109/PESC.2003.1218127","url":null,"abstract":"An efficient active LC snubber for multi-output converters with flyback synchronous rectifier (SR) is proposed in this paper. The proposed active LC snubber can be used to reset transformer and suppress switching surges. Besides, by storing surge energy in the proposed active LC snubber and then releasing it to the flyback SR, the converter can achieve high efficiency. For a forward converter with flyback SR, 90.8%, the maximum output efficiency, can be achieved. Experimental results also show that the output efficiency of this converter with the proposed active LC snubber is higher than that of active-clamped-based converters.","PeriodicalId":236199,"journal":{"name":"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123426309","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2003-06-15DOI: 10.1109/PESC.2003.1216785
F. Luo, H. Ye
Voltage lift technique has been successfully employed in design of DC/DC converters, e.g. three series Luo-Converters. However, the output voltage increases in arithmetic progression. This paper introduces a novel approach super lift technique that implements the output voltage increasing in geometric progression. It effectively enhances voltage transfer gain in power-law.
{"title":"Negative output super-lift Luo-Converters","authors":"F. Luo, H. Ye","doi":"10.1109/PESC.2003.1216785","DOIUrl":"https://doi.org/10.1109/PESC.2003.1216785","url":null,"abstract":"Voltage lift technique has been successfully employed in design of DC/DC converters, e.g. three series Luo-Converters. However, the output voltage increases in arithmetic progression. This paper introduces a novel approach super lift technique that implements the output voltage increasing in geometric progression. It effectively enhances voltage transfer gain in power-law.","PeriodicalId":236199,"journal":{"name":"IEEE 34th Annual Conference on Power Electronics Specialist, 2003. PESC '03.","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2003-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123536909","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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