Pub Date : 2008-11-21DOI: 10.1109/MNRC.2008.4683416
Zhanxian Xu, L. MacEachern
In radio over fiber systems, a highly linear optical transmitter is necessary to achieve the required signal dynamic range. In order to compensate for second and third order laser distortions, quadratic and cubic law circuits are usually required to work at up to 2 or 3 times the carrier frequency due to their nonlinear property. This paper presents an alternative design approach that uses multiple tank circuits to relieve the bandwidth requirement at the same time providing tunability to account for component variation, thermal effect and aging of semiconductor lasers. A laser pre-distorter example that works at 2 GHz range with about 300 MHz bandwidth was designed using standard CMOS technology. The average reductions of 20-30 dB for the 2nd and 3rd order harmonic distortion can be obtained in simulation.
{"title":"A predistortion circuit design technique for high performance analogue optical transmission","authors":"Zhanxian Xu, L. MacEachern","doi":"10.1109/MNRC.2008.4683416","DOIUrl":"https://doi.org/10.1109/MNRC.2008.4683416","url":null,"abstract":"In radio over fiber systems, a highly linear optical transmitter is necessary to achieve the required signal dynamic range. In order to compensate for second and third order laser distortions, quadratic and cubic law circuits are usually required to work at up to 2 or 3 times the carrier frequency due to their nonlinear property. This paper presents an alternative design approach that uses multiple tank circuits to relieve the bandwidth requirement at the same time providing tunability to account for component variation, thermal effect and aging of semiconductor lasers. A laser pre-distorter example that works at 2 GHz range with about 300 MHz bandwidth was designed using standard CMOS technology. The average reductions of 20-30 dB for the 2nd and 3rd order harmonic distortion can be obtained in simulation.","PeriodicalId":247684,"journal":{"name":"2008 1st Microsystems and Nanoelectronics Research Conference","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130243237","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-21DOI: 10.1109/MNRC.2008.4683413
N. Topaloglu, P. Nieva, M. Yavuz, J. Huissoon
The increase in the demand of using infrared detectors for thermal imaging of high temperature scenes initiated the research in microbolometer arrays with high operation temperature range. An efficient way of increasing this range is tuning the thermal conductance of the microbolometer array by electrostatic actuation, which is achieved by applying an actuation voltage to the substrate. However, using the substrate for actuation does not support pixel-by-pixel actuation, limiting the capabilities of the tunability. In this research, we demonstrate applying the actuation voltage to the micromirror which is located below the microbolometer. To avoid contact of the microbolometer to the micromirror, stoppers are used. We report that the thermal conductance is doubled at an actuation voltage of 12 volts, making it an efficient mechanism that can be used at next generation adaptive microbolometers.
{"title":"A pixel-by-pixel thermal conductance tuning mechanism for uncooled microbolometers","authors":"N. Topaloglu, P. Nieva, M. Yavuz, J. Huissoon","doi":"10.1109/MNRC.2008.4683413","DOIUrl":"https://doi.org/10.1109/MNRC.2008.4683413","url":null,"abstract":"The increase in the demand of using infrared detectors for thermal imaging of high temperature scenes initiated the research in microbolometer arrays with high operation temperature range. An efficient way of increasing this range is tuning the thermal conductance of the microbolometer array by electrostatic actuation, which is achieved by applying an actuation voltage to the substrate. However, using the substrate for actuation does not support pixel-by-pixel actuation, limiting the capabilities of the tunability. In this research, we demonstrate applying the actuation voltage to the micromirror which is located below the microbolometer. To avoid contact of the microbolometer to the micromirror, stoppers are used. We report that the thermal conductance is doubled at an actuation voltage of 12 volts, making it an efficient mechanism that can be used at next generation adaptive microbolometers.","PeriodicalId":247684,"journal":{"name":"2008 1st Microsystems and Nanoelectronics Research Conference","volume":"3 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128849663","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-21DOI: 10.1109/MNRC.2008.4683371
C. Grecu, A. Ivanov, R. Saleh, C. Rusu, L. Anghel, P. Pande, V. Nuca
The communication requirements of large multi-core systems are convened by on-chip communication fabrics generally referred to as networks-on-chip (NoC). We have designed a simulation environment that allows early exploration of the performance and cost parameters of network-on-chip communication architectures, which is able to handle arbitrary topologies and routing schemes. The simulator implements a flit-level message-passing mechanism and supports application data specified as input trace files or generated at run-time by synthetic traffic generators.
{"title":"A flexible network-on-chip simulator for early design space exploration","authors":"C. Grecu, A. Ivanov, R. Saleh, C. Rusu, L. Anghel, P. Pande, V. Nuca","doi":"10.1109/MNRC.2008.4683371","DOIUrl":"https://doi.org/10.1109/MNRC.2008.4683371","url":null,"abstract":"The communication requirements of large multi-core systems are convened by on-chip communication fabrics generally referred to as networks-on-chip (NoC). We have designed a simulation environment that allows early exploration of the performance and cost parameters of network-on-chip communication architectures, which is able to handle arbitrary topologies and routing schemes. The simulator implements a flit-level message-passing mechanism and supports application data specified as input trace files or generated at run-time by synthetic traffic generators.","PeriodicalId":247684,"journal":{"name":"2008 1st Microsystems and Nanoelectronics Research Conference","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131951985","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-21DOI: 10.1109/MNRC.2008.4683405
R. H. Phillion, M. Okoniewski
Phased reflectarray antennas are being developed as a low-cost alternative to traditional phased arrays. For circular polarization applications, element rotation provides a geometrical phasing technique. A side-drive micromotor is suggested for actuating rotation of K-band elements. This device provides a discreet number of phase steps; however, due to symmetry the number of phases is typically only half of the number of steps per rotation. A simple technique is presented to approximately quadruple the available number of array element phases.
{"title":"Improving the phase resolution of a micromotor-actuated phased reflectarray","authors":"R. H. Phillion, M. Okoniewski","doi":"10.1109/MNRC.2008.4683405","DOIUrl":"https://doi.org/10.1109/MNRC.2008.4683405","url":null,"abstract":"Phased reflectarray antennas are being developed as a low-cost alternative to traditional phased arrays. For circular polarization applications, element rotation provides a geometrical phasing technique. A side-drive micromotor is suggested for actuating rotation of K-band elements. This device provides a discreet number of phase steps; however, due to symmetry the number of phases is typically only half of the number of steps per rotation. A simple technique is presented to approximately quadruple the available number of array element phases.","PeriodicalId":247684,"journal":{"name":"2008 1st Microsystems and Nanoelectronics Research Conference","volume":"86 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123573142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-21DOI: 10.1109/MNRC.2008.4683380
L. Ghosh, S. Chowdhury
An accurate model for the total electrostatic energy associated with an atomic force microscope probe (AFM) has been developed. Unlike other models, the model takes account of the electrostatic energy associated with the fringing field capacitances between the AFM probe cantilever and the substrate to result in a more accurate energy expression. The model then used to develop a closed-form model for the electrostatic collapse voltage between the probe and the substrate. Excellent agreement between the model determined collapse voltage and the previously published experimental results validates the accuracy of the model.
{"title":"Electrostatic energy characterization for an atomic force microscope probe","authors":"L. Ghosh, S. Chowdhury","doi":"10.1109/MNRC.2008.4683380","DOIUrl":"https://doi.org/10.1109/MNRC.2008.4683380","url":null,"abstract":"An accurate model for the total electrostatic energy associated with an atomic force microscope probe (AFM) has been developed. Unlike other models, the model takes account of the electrostatic energy associated with the fringing field capacitances between the AFM probe cantilever and the substrate to result in a more accurate energy expression. The model then used to develop a closed-form model for the electrostatic collapse voltage between the probe and the substrate. Excellent agreement between the model determined collapse voltage and the previously published experimental results validates the accuracy of the model.","PeriodicalId":247684,"journal":{"name":"2008 1st Microsystems and Nanoelectronics Research Conference","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116134086","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-21DOI: 10.1109/MNRC.2008.4683363
S. Podilchak, B. Frank, A. Freundorfer, Y. Antar
Three CMOS integrated circuits are presented that utilize metamaterial composite right/left handed (CRLH) transmission lines (TLs) for tunable zero insertion phase at 30 GHz. Initially, two passive fixed TL structures are realized followed by an active design using accumulation-mode NMOS varactors. An tunable insertion from -9deg to +27deg can be observed. Results suggest the possibility of zero, advanced or delayed insertion phases by element variation or by the use of such simple active components. Simulation and measured results are in agreement with CRLH TL theory, and display a linear insertion phase and flat group delay values. These findings suggest that such high speed CRLH TLs structures can be implemented for active linear antenna array feeding networks and other high speed circuits in CMOS for millimeter wave frequencies of operation.
{"title":"Metamaterial artificial transmission line structures in CMOS for tunable insertion phase at 30 GHz","authors":"S. Podilchak, B. Frank, A. Freundorfer, Y. Antar","doi":"10.1109/MNRC.2008.4683363","DOIUrl":"https://doi.org/10.1109/MNRC.2008.4683363","url":null,"abstract":"Three CMOS integrated circuits are presented that utilize metamaterial composite right/left handed (CRLH) transmission lines (TLs) for tunable zero insertion phase at 30 GHz. Initially, two passive fixed TL structures are realized followed by an active design using accumulation-mode NMOS varactors. An tunable insertion from -9deg to +27deg can be observed. Results suggest the possibility of zero, advanced or delayed insertion phases by element variation or by the use of such simple active components. Simulation and measured results are in agreement with CRLH TL theory, and display a linear insertion phase and flat group delay values. These findings suggest that such high speed CRLH TLs structures can be implemented for active linear antenna array feeding networks and other high speed circuits in CMOS for millimeter wave frequencies of operation.","PeriodicalId":247684,"journal":{"name":"2008 1st Microsystems and Nanoelectronics Research Conference","volume":"69 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127404279","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-21DOI: 10.1109/MNRC.2008.4683366
Tao Wang, Li Chen, A. Dinh, D. Teng
Radiation-hardened-by-design comparators to mitigate Single-Event-Transients (SETs) are presented. Folded cascode comparators are designed using three types of auto-zeroing techniques: input offset storage (IOS), output offset storage (OOS), and auxiliary offset storage (AOS). The designs are implemented using CMOS 90 nm, and analyzed using Spectre from Cadence. Simulation results show that the transient effect at the output of the comparator with auto-zeroing techniques is shorter than the transcient cancellation operation time while it can be a significant error at the output in a general folded cascode comparator.
{"title":"Single-Event-Transient tolerant comparators with auto-zeroing techniques","authors":"Tao Wang, Li Chen, A. Dinh, D. Teng","doi":"10.1109/MNRC.2008.4683366","DOIUrl":"https://doi.org/10.1109/MNRC.2008.4683366","url":null,"abstract":"Radiation-hardened-by-design comparators to mitigate Single-Event-Transients (SETs) are presented. Folded cascode comparators are designed using three types of auto-zeroing techniques: input offset storage (IOS), output offset storage (OOS), and auxiliary offset storage (AOS). The designs are implemented using CMOS 90 nm, and analyzed using Spectre from Cadence. Simulation results show that the transient effect at the output of the comparator with auto-zeroing techniques is shorter than the transcient cancellation operation time while it can be a significant error at the output in a general folded cascode comparator.","PeriodicalId":247684,"journal":{"name":"2008 1st Microsystems and Nanoelectronics Research Conference","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130637001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-21DOI: 10.1109/MNRC.2008.4683376
P. Shiu, G. Knopf, M. Ostojic, S. Nikumb
A low cost manufacturing method for creating polymer microfluidic devices with microfeatures that have near optical surface quality is described in this paper. The manufacturing method involves laser micromachining, partial hot embossing, and molding (LHEM) to create polymethylmethacrylate (PMMA) mold masters for device replication. A metallic hot intrusion mask with the desired microfeatures is first machined by laser and then used to produce the mold master by pressing the mask onto a PMMA substrate under applied heat and pressure. The resultant 3D micro-reliefs have near optical quality surface finishes. Design parameters such as the height and width of the extruded features are investigated in this study. The experimental results demonstrate that different heights of the extruded features of a mold master can be fabricated using a single mask at a set of process parameters. Examples of curved microchannels of the PMMA mold masters and an integrated microchannel/microlens of the mold master are presented to illustrate the proposed methodology.
{"title":"Fabrication of polymer microfluidic devices with 3D microfeatures that have near optical surface quality","authors":"P. Shiu, G. Knopf, M. Ostojic, S. Nikumb","doi":"10.1109/MNRC.2008.4683376","DOIUrl":"https://doi.org/10.1109/MNRC.2008.4683376","url":null,"abstract":"A low cost manufacturing method for creating polymer microfluidic devices with microfeatures that have near optical surface quality is described in this paper. The manufacturing method involves laser micromachining, partial hot embossing, and molding (LHEM) to create polymethylmethacrylate (PMMA) mold masters for device replication. A metallic hot intrusion mask with the desired microfeatures is first machined by laser and then used to produce the mold master by pressing the mask onto a PMMA substrate under applied heat and pressure. The resultant 3D micro-reliefs have near optical quality surface finishes. Design parameters such as the height and width of the extruded features are investigated in this study. The experimental results demonstrate that different heights of the extruded features of a mold master can be fabricated using a single mask at a set of process parameters. Examples of curved microchannels of the PMMA mold masters and an integrated microchannel/microlens of the mold master are presented to illustrate the proposed methodology.","PeriodicalId":247684,"journal":{"name":"2008 1st Microsystems and Nanoelectronics Research Conference","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125353339","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-21DOI: 10.1109/MNRC.2008.4683369
J. Tremblay, Y. Savaria, C. Thibeault, M. Mbaye
A current trend in digital signal processing is to reduce power and energy consumption. The use of asynchronous designs is one of the possible ways to achieve these goals, but the nature of these circuits requires different modeling schemes. We present in this paper our own model for a novel DSP architecture comprising multiple asynchronous cores and ALUs per core. Our approach shows how to match the inherent parallelism of the architecture to its target application. Our technique also proves useful to guide the mapping decisions of a target algorithm onto an MPSoC architecture, in order to increase the throughput by multithreading several packets.
{"title":"Improving resource utilization in an multiple asynchronous ALU DSP architecture","authors":"J. Tremblay, Y. Savaria, C. Thibeault, M. Mbaye","doi":"10.1109/MNRC.2008.4683369","DOIUrl":"https://doi.org/10.1109/MNRC.2008.4683369","url":null,"abstract":"A current trend in digital signal processing is to reduce power and energy consumption. The use of asynchronous designs is one of the possible ways to achieve these goals, but the nature of these circuits requires different modeling schemes. We present in this paper our own model for a novel DSP architecture comprising multiple asynchronous cores and ALUs per core. Our approach shows how to match the inherent parallelism of the architecture to its target application. Our technique also proves useful to guide the mapping decisions of a target algorithm onto an MPSoC architecture, in order to increase the throughput by multithreading several packets.","PeriodicalId":247684,"journal":{"name":"2008 1st Microsystems and Nanoelectronics Research Conference","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116646780","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2008-11-21DOI: 10.1109/MNRC.2008.4683389
L. Convert, V. Aimez, P. Charette, R. Lecomte
A rapid prototyping method was developed to integrate a microfluidic plasma separation device over a Si based radiation detector. KMPR photoresist was used to produce high pressure resistant channels sealed by a glass cover. Two methods were investigated to make access holes in the cover: laser micromachining and a simplified glass wet etching process. The lab-on-chip concept where a plasma separation device is coupled to an embedded on-chip p-i-n photodiode used as a high sensitivity beta particle detector was investigated. A first detector prototype was fabricated and characterized. KMPR autofluorescence was investigated to optimize microfluidic function characterization with fluorescent beads.
{"title":"Rapid prototyping of integrated microfluidic devices for combined radiation detection and plasma separation","authors":"L. Convert, V. Aimez, P. Charette, R. Lecomte","doi":"10.1109/MNRC.2008.4683389","DOIUrl":"https://doi.org/10.1109/MNRC.2008.4683389","url":null,"abstract":"A rapid prototyping method was developed to integrate a microfluidic plasma separation device over a Si based radiation detector. KMPR photoresist was used to produce high pressure resistant channels sealed by a glass cover. Two methods were investigated to make access holes in the cover: laser micromachining and a simplified glass wet etching process. The lab-on-chip concept where a plasma separation device is coupled to an embedded on-chip p-i-n photodiode used as a high sensitivity beta particle detector was investigated. A first detector prototype was fabricated and characterized. KMPR autofluorescence was investigated to optimize microfluidic function characterization with fluorescent beads.","PeriodicalId":247684,"journal":{"name":"2008 1st Microsystems and Nanoelectronics Research Conference","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2008-11-21","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133921693","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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