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2008 4th European Conference on Circuits and Systems for Communications最新文献

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Design of bipolar differential opamps with unity gain bandwidth up to 23 GHz 单位增益带宽高达23 GHz的双极差分放大器设计
Pub Date : 2008-07-10 DOI: 10.1109/ECCSC.2008.4611656
A. Budyakov, K. Schmalz, N. N. Prokopenko, C. Scheytt, P. Ostrovskyy
We compare the RF performance of fully differential opamps developed in 0.25 mum SiGe complementary (pnp/npn) technology and 0.13 mum SiGe BiCMOS (with npn only). Using the same compensation technique, the frequency response of these opamps is analyzed with emphasis on the phase margin (PM) and gain margin (GM). The pnp/npn opamp has advantage in unity gain bandwidth (UGB) and current consumption in comparison to the 0.13 mum BiCMOS design (supply voltage of 4 V). For the pnp/npn opamp a 23 GHz UGB can be achieved with PM of 57 degrees. In case of the pnp/npn opamp the supply voltage can be reduced to 3 V using a new topology with resistor for tail current. The optimized RF pnp/npn opamp allows the design of a differential line driver (50 Ohm) with 24 GHz bandwidth and a second order 2 GHz biquad bandpass filter.
我们比较了采用0.25 μ m SiGe互补(pnp/npn)技术和0.13 μ m SiGe BiCMOS(仅使用npn)开发的全差分放大器的射频性能。采用相同的补偿技术,分析了这些放大器的频率响应,重点分析了相位裕度(PM)和增益裕度(GM)。与0.13 mum BiCMOS设计(电源电压为4 V)相比,pnp/npn opamp在单位增益带宽(UGB)和电流消耗方面具有优势。对于pnp/npn opamp,在PM为57度的情况下可以实现23 GHz的UGB。在pnp/npn运放的情况下,电源电压可以降低到3 V使用新的拓扑与电阻的尾电流。优化的RF pnp/npn opamp允许设计一个24 GHz带宽的差分线路驱动器(50欧姆)和一个二阶2 GHz双路带通滤波器。
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引用次数: 15
Negative resistance based tuning of an RF bandpass filter 基于负电阻的射频带通滤波器调谐
Pub Date : 2008-07-10 DOI: 10.1109/ECCSC.2008.4611651
C. Andriesei, L. Goras, F. Temcamani
A novel tuning technique which improves the performances of an RF differential bandpass filter based on simulated inductors is presented. Gain enhancement techniques are applied to reduce the inductor losses by using an extra differential negative resistance. The proposed method is sufficiently general to be applied to other active filters topologies based on active inductors as well and is intended to be used for CMOS multi-standard filters design.
提出了一种新的基于仿真电感器的射频差分带通滤波器的调谐技术。增益增强技术通过使用额外的差分负电阻来减少电感损耗。所提出的方法具有足够的通用性,可以应用于基于有源电感的其他有源滤波器拓扑结构,并打算用于CMOS多标准滤波器的设计。
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引用次数: 11
Tolerance analysis for Chebysev filters 切比塞夫滤波器容差分析
Pub Date : 2008-07-10 DOI: 10.1109/ECCSC.2008.4611662
A. Marascu, L. Dumitriu, M. Iordache, D. Niculae
The paper presents two methods for analyzing analog circuit tolerances. Both methods were applied to a low pass and a high pass Chebyshev filter. One method called Monte Carlo analysis relies on the circuit matrix for generating results; the other called fast Monte Carlo analysis uses the circuit's transfer function in order to generate the results of the tolerance analysis. The circuit's elements sensitivities are calculated using the derivates of the circuit's transfer functions.
本文介绍了两种分析模拟电路容差的方法。这两种方法都应用于低通和高通切比雪夫滤波器。一种叫做蒙特卡罗分析的方法依靠电路矩阵来产生结果;另一种称为快速蒙特卡罗分析,使用电路的传递函数来生成容差分析的结果。利用电路传递函数的导数计算电路的元件灵敏度。
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引用次数: 5
Neural speech predictors 神经语音预测器
Pub Date : 2008-07-10 DOI: 10.1109/ECCSC.2008.4611645
R. de Figueiredo, E. Akay
In this paper we propose a new neural network architecture that deploys and extended Kalman filter (EKF) based learning algorithm. We used the new neural network for the prediction of speech signals. Simulation results show that the neural networks leads to better performance than the well known linear predictor coefficients (LPC) that uses Levinson-Durbin algorithm.
本文提出了一种基于卡尔曼滤波(EKF)学习算法的神经网络结构。我们使用新的神经网络对语音信号进行预测。仿真结果表明,该神经网络比使用Levinson-Durbin算法的线性预测系数(LPC)具有更好的性能。
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引用次数: 0
A frequency domain method for analysis of dynamic circuits with resistive nonlinearities 具有阻性非线性的动态电路频域分析方法
Pub Date : 2008-07-10 DOI: 10.1109/ECCSC.2008.4611677
I. Hantila, F. Constantinescu, A. Gheorghe, M. Nitescu
Consider a dynamic circuit containing nonlinear resistors, the other elements being linear. Each nonlinear resistor is replaced by a set of equivalent sources which are current or voltage dependent. The parameters of these sources are corrected iteratively. In order to find the new controlling voltages (currents) linear sinusoidal problems are solved for source harmonics. The convergence of this iterative procedure is proved. This method gives correct results for strongly nonlinear circuits driven by modulated signals, unlike the harmonic balance method. An example is given for illustration.
考虑一个包含非线性电阻的动态电路,其他元件是线性的。每个非线性电阻由一组电流或电压相关的等效源代替。对这些源的参数进行迭代修正。为了找到新的控制电压(电流),解决了源谐波的线性正弦问题。证明了该迭代过程的收敛性。与谐波平衡法不同,该方法对调制信号驱动的强非线性电路给出了正确的结果。给出了一个例子来说明。
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引用次数: 0
OFDM channel estimation algorithm and ASIC implementation OFDM信道估计算法及ASIC实现
Pub Date : 2008-07-10 DOI: 10.1109/ECCSC.2008.4611691
S. Haene, Andreas Burg, N. Felber, W. Fichtner
Coherent detection of OFDM signals requires channel state information which can be acquired by transmitting known training symbols and by appropriate channel estimation at the receiver. Focusing on robust algorithms suitable for integration in silicon, a novel channel estimation method is proposed. The algorithm is based on a suboptimal modification to the maximum-likelihood estimator and was designed to enable the use of highly optimized constant-coefficient multipliers that require less area on silicon compared to regular multipliers. The mean square error and the complexity of different estimators are analyzed analytically, while an actual ASIC implementation allows to assess the real-world silicon area requirements for our proposed algorithm.
OFDM信号的相干检测需要信道状态信息,这些信息可以通过发送已知的训练符号和在接收端进行适当的信道估计来获取。针对适合硅集成的鲁棒算法,提出了一种新的信道估计方法。该算法基于对最大似然估计器的次优修改,旨在使用高度优化的常系数乘法器,与常规乘法器相比,该乘法器需要更少的硅面积。分析了不同估计器的均方误差和复杂性,而实际的ASIC实现允许评估我们提出的算法的实际硅面积要求。
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引用次数: 21
Efficient carry generation technique incorporating energy recovering logic circuitry for low power VLSI 集成能量回收逻辑电路的低功耗VLSI高效进位产生技术
Pub Date : 2008-07-10 DOI: 10.1109/ECCSC.2008.4611703
K. N. Mishra
Dynamic power consumption is a major concern for designing various modern age information systems and computers. Advances in low power VLSI design results in charge recovery based adiabatic logic concept, which proves to be a potential parametric to design CMOS circuits for various low power applications. Research in this domain is fueled by the fact that instead of discharging the load capacitance to ground, the charge flows back to power supply and can be reused. Keeping the advantages of energy recovery logic in mind, we demonstrate low energy carry break logic exploiting certain aspects of carry generation based on the bit positions in input vectors. Design has been implemented in 90 nm TSMC process, showing 70% improvement in power.
动态功耗是设计各种现代信息系统和计算机的主要问题。低功耗VLSI设计的进步导致了基于电荷恢复的绝热逻辑概念,这被证明是设计各种低功耗CMOS电路的潜在参数。这一领域的研究是由这样一个事实推动的,即电荷不是将负载电容放电到地,而是回流到电源并可以重复使用。考虑到能量恢复逻辑的优点,我们展示了低能量进位中断逻辑,利用基于输入向量中位的进位生成的某些方面。设计已在90nm台积电制程中实现,功耗提高70%。
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引用次数: 4
Optimization approaches for the identification of FIR models using cumulants 利用累积量识别FIR模型的优化方法
Pub Date : 2008-07-10 DOI: 10.1109/ECCSC.2008.4611702
H. Mathlouthi, K. Abderrahim, F. Msahli, G. Favier
Several methods for the identification of FIR systems using cumulants have been proposed in the literature. These methods can be classified into three categories of solutions: linear algebra, closed form and optimization. Only linear algebra solutions are considered in this paper. For the sake of simplicity, these methods use the least squares approach to solve a system of equations characterized by a redundant vector of unknown parameters and assumed to be linear, but it not. Mathematically, this approach is not suitable, since the obtained system is nonlinear and must be treated as an optimization problem. To overcome this problem, we define three optimization problems and based on that the best algorithm to solve it will be selected. Simulations are performed to demonstrate the performance of the proposed methods.
文献中已经提出了几种利用累积量识别FIR系统的方法。这些方法可分为三类:线性代数解、封闭形式解和最优化解。本文只考虑线性代数解。为了简单起见,这些方法使用最小二乘方法来求解一个以未知参数的冗余向量为特征的方程组,并假设它是线性的,但它不是。在数学上,这种方法是不合适的,因为得到的系统是非线性的,必须作为一个优化问题来处理。为了克服这个问题,我们定义了三个优化问题,并在此基础上选择最佳算法来解决这个问题。通过仿真验证了所提方法的有效性。
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引用次数: 0
CMOS PA design dedicated to UMTS (3G) applications in 65 nm technology 专用于65纳米UMTS (3G)应用的CMOS PA设计
Pub Date : 2008-07-10 DOI: 10.1109/ECCSC.2008.4611655
Y. Luque, E. Kerhervé, N. Deltimple, D. Belot
This paper deals with the challenges of designing and implementing a PA dedicated to 3G applications in a CMOS 65 nm technology. High linearity and high power applications impose several bottlenecks from the layout point of view. The difficulties are increased by the use of a low cost technology. Reduce the size of the circuit while increasing the power leads to think of a different layout topology. The PAE (power added efficiency) in this type of application is generally low, making the thermal effect, even more critical. The layout will be used as an example to highlight the compromises that have been made along the process. Thanks to a new PA structure and a very carefully layout, this CMOS power amplifier provides a 31 dBm maximal output power with a PAE of 25% at 1.95 GHz.
本文讨论了在CMOS 65纳米技术中设计和实现专用于3G应用的PA的挑战。从布局的角度来看,高线性度和高功率应用带来了几个瓶颈。使用低成本技术增加了难度。在减小电路尺寸的同时增加功率导致考虑不同的布局拓扑。在这种类型的应用中,PAE(功率附加效率)通常较低,这使得热效应更加关键。这个布局将作为一个例子来强调在这个过程中所做的妥协。由于新的PA结构和非常精心的布局,该CMOS功率放大器在1.95 GHz时提供31 dBm的最大输出功率,PAE为25%。
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引用次数: 2
Energy transfer in circuits with radiation 带辐射电路中的能量传递
Pub Date : 2008-07-10 DOI: 10.1109/ECCSC.2008.4611642
I. Hantila, Mihai Vasiliu
The aim of the paper is to develop a basic field-circuit approach to electromagnetic boundary field problems (BVPs). Compared with existing circuit approaches we contribute with a model allowing radiation to be taken into consideration. Radiative and conductive transfer of energy are reflected in boundary conditions (BCs) that involve both circuit and field ones. The theory is based on electromagnetic energy flow.
本文的目的是发展一种基本的场电路方法来解决电磁边界场问题。与现有的电路方法相比,我们提出了一个允许考虑辐射的模型。辐射和传导的能量传递反映在边界条件(bc)中,边界条件涉及电路和场。该理论基于电磁能量流。
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引用次数: 0
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2008 4th European Conference on Circuits and Systems for Communications
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