Pub Date : 2015-12-01DOI: 10.1109/RAECS.2015.7453337
R. D. Singh, N. Aggarwal
In the wake of widespread surfeit of inexpensive and user-friendly digital multimedia alteration software, digital images and videos have lost the unparalleled position they once occupied as `authoritative testament of occurrence of events'. The inherent susceptibility of digital content to malevolent manipulations renders it vulnerable to our skepticism. Establishment of authenticity of digital content is of utmost importance in situations where reliability on fraudulent evidence could have serious consequences. With the intent of tackling a few of the several challenges of the video forensics domain, in this paper we propose a potent DCT coefficient analysis-based forensic technique for reliable detection of re-compression and transcoding in digital videos. This scheme facilitates visually perceptible differentiation between singly-compressed and re-compressed video frames while circumventing the need for undertaking any complicated peak periodicity analysis procedures that are normally associated with traditional DCT-based studies. We also present a unique optical-flow analysis scheme, where, instead of inspecting inconsistencies caused by frame-removal in the entire optical flow sequences of a given video, we focus entirely on the brightness gradient component of this flow. The experiments in this regard substantiate the forensic capabilities of this component and proffer observations conducive to the detection and localization of frame-removal in digital videos. Subjective and quantitative experimentation on a comprehensive dataset under a wide range of experimental set-ups validate the efficacy and resilience of the proposed techniques.
{"title":"Detection of re-compression, transcoding and frame-deletion for digital video authentication","authors":"R. D. Singh, N. Aggarwal","doi":"10.1109/RAECS.2015.7453337","DOIUrl":"https://doi.org/10.1109/RAECS.2015.7453337","url":null,"abstract":"In the wake of widespread surfeit of inexpensive and user-friendly digital multimedia alteration software, digital images and videos have lost the unparalleled position they once occupied as `authoritative testament of occurrence of events'. The inherent susceptibility of digital content to malevolent manipulations renders it vulnerable to our skepticism. Establishment of authenticity of digital content is of utmost importance in situations where reliability on fraudulent evidence could have serious consequences. With the intent of tackling a few of the several challenges of the video forensics domain, in this paper we propose a potent DCT coefficient analysis-based forensic technique for reliable detection of re-compression and transcoding in digital videos. This scheme facilitates visually perceptible differentiation between singly-compressed and re-compressed video frames while circumventing the need for undertaking any complicated peak periodicity analysis procedures that are normally associated with traditional DCT-based studies. We also present a unique optical-flow analysis scheme, where, instead of inspecting inconsistencies caused by frame-removal in the entire optical flow sequences of a given video, we focus entirely on the brightness gradient component of this flow. The experiments in this regard substantiate the forensic capabilities of this component and proffer observations conducive to the detection and localization of frame-removal in digital videos. Subjective and quantitative experimentation on a comprehensive dataset under a wide range of experimental set-ups validate the efficacy and resilience of the proposed techniques.","PeriodicalId":256314,"journal":{"name":"2015 2nd International Conference on Recent Advances in Engineering & Computational Sciences (RAECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130937736","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-01DOI: 10.1109/RAECS.2015.7453313
Karan Aggarwal, M. Bhamrah, H. Ryait
Liver cirrhosis is considered as one of the common most diseases in healthcare. The widely accepted technology for the diagnosis is ultrasound imaging. This paper presents such a technique for detecting the cirrhosis of liver through ultrasound images. The region of interest is selected from the ultrasound images that obtained from radiologist and then inspection technique is applied on it. The identification of liver cirrhosis from normal liver is finally detected through modified Local Binary Pattern (LBP) represented as Differential Local Binary Pattern (DLBP). The image intensities value of DLBP image were divided into five discriminating groups which were made by counting pixels of similar gray scale value. Decision of cirrhotic liver is given by the pixel values in all five groups. Experimental results from the proposed method demonstrated its feasibility and applicability for high performance cirrhotic liver identification.
{"title":"Modification of LBP for detecting liver cirrhosis from b-mode ultrasound image","authors":"Karan Aggarwal, M. Bhamrah, H. Ryait","doi":"10.1109/RAECS.2015.7453313","DOIUrl":"https://doi.org/10.1109/RAECS.2015.7453313","url":null,"abstract":"Liver cirrhosis is considered as one of the common most diseases in healthcare. The widely accepted technology for the diagnosis is ultrasound imaging. This paper presents such a technique for detecting the cirrhosis of liver through ultrasound images. The region of interest is selected from the ultrasound images that obtained from radiologist and then inspection technique is applied on it. The identification of liver cirrhosis from normal liver is finally detected through modified Local Binary Pattern (LBP) represented as Differential Local Binary Pattern (DLBP). The image intensities value of DLBP image were divided into five discriminating groups which were made by counting pixels of similar gray scale value. Decision of cirrhotic liver is given by the pixel values in all five groups. Experimental results from the proposed method demonstrated its feasibility and applicability for high performance cirrhotic liver identification.","PeriodicalId":256314,"journal":{"name":"2015 2nd International Conference on Recent Advances in Engineering & Computational Sciences (RAECS)","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131015890","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-01DOI: 10.1109/RAECS.2015.7453395
Harsimranjit Kaur, N. R. Prakash
Multipliers perform the core operations in many complex systems such as arithmetic processors, image and digital signal processors. So, a performance optimized multiplier is a major design challenge. The partial product addition stage of the multiplier is the most time and power consuming stage. Thus, the key to enhance the overall performance of the multiplier is the improvement in the design of partial product addition stage. Using compressor adders, for partial product addition, the number of full adders and half adders are reduced resulting in significant reduction in area, delay and power consumption. In the present work, a novel higher-order compressor based 8-bit Vedic multiplier, is proposed. The designs are synthesized and analyzed using Cadence Encounter RTL Compiler in 180nm technology using nominal operating conditions. When compared with existing designs, the proposed multiplier shows substantial improvement in area, speed and Power Delay Product.
{"title":"Area-efficient low PDP 8-bit vedic multiplier design using compressors","authors":"Harsimranjit Kaur, N. R. Prakash","doi":"10.1109/RAECS.2015.7453395","DOIUrl":"https://doi.org/10.1109/RAECS.2015.7453395","url":null,"abstract":"Multipliers perform the core operations in many complex systems such as arithmetic processors, image and digital signal processors. So, a performance optimized multiplier is a major design challenge. The partial product addition stage of the multiplier is the most time and power consuming stage. Thus, the key to enhance the overall performance of the multiplier is the improvement in the design of partial product addition stage. Using compressor adders, for partial product addition, the number of full adders and half adders are reduced resulting in significant reduction in area, delay and power consumption. In the present work, a novel higher-order compressor based 8-bit Vedic multiplier, is proposed. The designs are synthesized and analyzed using Cadence Encounter RTL Compiler in 180nm technology using nominal operating conditions. When compared with existing designs, the proposed multiplier shows substantial improvement in area, speed and Power Delay Product.","PeriodicalId":256314,"journal":{"name":"2015 2nd International Conference on Recent Advances in Engineering & Computational Sciences (RAECS)","volume":"08 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125525623","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-01DOI: 10.1109/RAECS.2015.7453320
Ravi Teja Bhimarasetti, Ashwani Kumar
Reduction of active power loss in distribution systems is very important to improve the overall efficiency of electrical power distribution systems. The active power loss due to reactive component of branch currents can be reduced by supplying part of the reactive power demands locally with the help of capacitors. This paper proposed a simple method for optimal placement and sizing of capacitor while minimizing power losses and improving the voltage profile in an unbalanced radial distribution system (URDS). The performance of the proposed method have been tested on two case studies 19-bus UBRS and 25-bus UBRS. It was found that a significant loss saving can be achieved by placing optimal capacitors in the system.
{"title":"Capacitor placement in unbalanced radial distribution system for loss reduction","authors":"Ravi Teja Bhimarasetti, Ashwani Kumar","doi":"10.1109/RAECS.2015.7453320","DOIUrl":"https://doi.org/10.1109/RAECS.2015.7453320","url":null,"abstract":"Reduction of active power loss in distribution systems is very important to improve the overall efficiency of electrical power distribution systems. The active power loss due to reactive component of branch currents can be reduced by supplying part of the reactive power demands locally with the help of capacitors. This paper proposed a simple method for optimal placement and sizing of capacitor while minimizing power losses and improving the voltage profile in an unbalanced radial distribution system (URDS). The performance of the proposed method have been tested on two case studies 19-bus UBRS and 25-bus UBRS. It was found that a significant loss saving can be achieved by placing optimal capacitors in the system.","PeriodicalId":256314,"journal":{"name":"2015 2nd International Conference on Recent Advances in Engineering & Computational Sciences (RAECS)","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126523091","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-01DOI: 10.1109/RAECS.2015.7453411
Kavita Taneja, Harmunish Taneja, Rohit Kumar
Communicating nodes in MANET (Mobile Ad hoc Network) are highly mobile and battery powered. Energy of component node is a scare resource in MANET and the network lifetime depends on the availability of battery power. Numerous optimizations have been made in routing algorithms to ensure energy efficiency and increased network lifetime. This paper proposes a segmented processor framework particularly for the proactive routing based applications in MANET to optimize power consumption. The simulation results indicate energy savings of approximately over seven times as compared to identical set up with conventional processor architecture.
{"title":"SPF: Segmented processor framework for energy efficient proactive routing based applications in MANET","authors":"Kavita Taneja, Harmunish Taneja, Rohit Kumar","doi":"10.1109/RAECS.2015.7453411","DOIUrl":"https://doi.org/10.1109/RAECS.2015.7453411","url":null,"abstract":"Communicating nodes in MANET (Mobile Ad hoc Network) are highly mobile and battery powered. Energy of component node is a scare resource in MANET and the network lifetime depends on the availability of battery power. Numerous optimizations have been made in routing algorithms to ensure energy efficiency and increased network lifetime. This paper proposes a segmented processor framework particularly for the proactive routing based applications in MANET to optimize power consumption. The simulation results indicate energy savings of approximately over seven times as compared to identical set up with conventional processor architecture.","PeriodicalId":256314,"journal":{"name":"2015 2nd International Conference on Recent Advances in Engineering & Computational Sciences (RAECS)","volume":"AES-20 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126549961","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-01DOI: 10.1109/RAECS.2015.7453286
Manisha, N. P. Singh
In the presence of heterogeneous wireless network the selection of optimal network for transferring data and telephony is an important task. The selection of optimal network is done either at user terminal or at service provider terminal or at both terminals. This selection is done by some advancement in the mobile terminal. Therefore, the main challenge in a heterogeneous wireless environment is the selection of best network. This can be taken as a multidimensional decision making problem. In this work, selection of network is done on the basis of user`s preference using various MADM algorithms like Simple Additive Weighting (SAW), Multiplicative Exponential Weighting (MEW), Technique for Order Preference by Similarity to an Ideal Solution(TOPSIS) and VIKOR. For selection of network, score of each network in case of conversational, streaming and background traffic class is calculated. Simulation results are presented for score calculation and on the basis of score optimal network is selected. The analysis using SAW and MEW is quite simple while using TOPSIS and VIKOR, it is little bit complex.
{"title":"Optimal network selection using MADM algorithms","authors":"Manisha, N. P. Singh","doi":"10.1109/RAECS.2015.7453286","DOIUrl":"https://doi.org/10.1109/RAECS.2015.7453286","url":null,"abstract":"In the presence of heterogeneous wireless network the selection of optimal network for transferring data and telephony is an important task. The selection of optimal network is done either at user terminal or at service provider terminal or at both terminals. This selection is done by some advancement in the mobile terminal. Therefore, the main challenge in a heterogeneous wireless environment is the selection of best network. This can be taken as a multidimensional decision making problem. In this work, selection of network is done on the basis of user`s preference using various MADM algorithms like Simple Additive Weighting (SAW), Multiplicative Exponential Weighting (MEW), Technique for Order Preference by Similarity to an Ideal Solution(TOPSIS) and VIKOR. For selection of network, score of each network in case of conversational, streaming and background traffic class is calculated. Simulation results are presented for score calculation and on the basis of score optimal network is selected. The analysis using SAW and MEW is quite simple while using TOPSIS and VIKOR, it is little bit complex.","PeriodicalId":256314,"journal":{"name":"2015 2nd International Conference on Recent Advances in Engineering & Computational Sciences (RAECS)","volume":"178 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114202737","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-01DOI: 10.1109/RAECS.2015.7453348
Kalpana Dahiya, Prabhjot Kaur, V. Verma
Transportation Problem is an important aspect which has been widely studied in Operations Research domain. A good and efficient transport is a key factor in mass production where the goods can reach the consumer from the production site or factory which may be situated many miles away. It has been studied with the objective of minimizing cost and the time to simulate different real life problems. In this paper, we study a time minimizing transportation problem in which the exact total demand of the destinations cannot be satisfied in one go. Due to some reasons, only a particular amount less than the exact total demand, can be transported first and therefore, rest of the amount has to be transported later. It gives rise to a two stage time minimizing transportation problem in which the stage-I flow is restricted. The present study proposes an iterative algorithm which concentrates on minimizing the total time of transportation of both the stages. At each iteration, a pair of times of Stage-I and Stage-II is generated with Stage-II time strictly less than the Stage-II time of the previous iteration. The pair with the minimum sum of Stage-I and Stage-II times is considered as the optimal pair and the corresponding transportation schedule is considered as the optimal solution of the problem.
{"title":"On controlling the total flow in two stage time minimizing transportation problem","authors":"Kalpana Dahiya, Prabhjot Kaur, V. Verma","doi":"10.1109/RAECS.2015.7453348","DOIUrl":"https://doi.org/10.1109/RAECS.2015.7453348","url":null,"abstract":"Transportation Problem is an important aspect which has been widely studied in Operations Research domain. A good and efficient transport is a key factor in mass production where the goods can reach the consumer from the production site or factory which may be situated many miles away. It has been studied with the objective of minimizing cost and the time to simulate different real life problems. In this paper, we study a time minimizing transportation problem in which the exact total demand of the destinations cannot be satisfied in one go. Due to some reasons, only a particular amount less than the exact total demand, can be transported first and therefore, rest of the amount has to be transported later. It gives rise to a two stage time minimizing transportation problem in which the stage-I flow is restricted. The present study proposes an iterative algorithm which concentrates on minimizing the total time of transportation of both the stages. At each iteration, a pair of times of Stage-I and Stage-II is generated with Stage-II time strictly less than the Stage-II time of the previous iteration. The pair with the minimum sum of Stage-I and Stage-II times is considered as the optimal pair and the corresponding transportation schedule is considered as the optimal solution of the problem.","PeriodicalId":256314,"journal":{"name":"2015 2nd International Conference on Recent Advances in Engineering & Computational Sciences (RAECS)","volume":"518 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116242194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-01DOI: 10.1109/RAECS.2015.7453345
N. Kaur, S. Bansal, R. Bansal
Power/Energy management nowadays is emerging as a significant issue in designing the modern electronic circuits to cut electricity costs & bills, improve reliability, and certain ecological concerns. Recent technological advances in high performance computing (HPC) have resulted in versatile performance improvements, though at the cost of increased energy consumption and resources. In this paper, we have developed an energy efficient algorithm for scheduling any directed acyclic graph (DAG) on heterogeneous cluster system to address bi-objectives issues: maintain performance and improve the total system energy consumption accounting for both computation energy (busy + idle) of processor and communication energy of network interconnect. We integrate dynamic voltage and frequency scaling (DVFS) technique to the existing non energy aware list based scheduling algorithm HEFT to generate a new energy efficient scheduling algorithm called - LDVS. From the exhaustive simulation results of different random and real task graphs, it is analyzed that LDVS maintains performance (overall makespan) and also exhibits significant improvements in processor and total energy over HEFT.
{"title":"Towards energy efficient scheduling with DVFS for precedence constrained tasks on heterogeneous cluster system","authors":"N. Kaur, S. Bansal, R. Bansal","doi":"10.1109/RAECS.2015.7453345","DOIUrl":"https://doi.org/10.1109/RAECS.2015.7453345","url":null,"abstract":"Power/Energy management nowadays is emerging as a significant issue in designing the modern electronic circuits to cut electricity costs & bills, improve reliability, and certain ecological concerns. Recent technological advances in high performance computing (HPC) have resulted in versatile performance improvements, though at the cost of increased energy consumption and resources. In this paper, we have developed an energy efficient algorithm for scheduling any directed acyclic graph (DAG) on heterogeneous cluster system to address bi-objectives issues: maintain performance and improve the total system energy consumption accounting for both computation energy (busy + idle) of processor and communication energy of network interconnect. We integrate dynamic voltage and frequency scaling (DVFS) technique to the existing non energy aware list based scheduling algorithm HEFT to generate a new energy efficient scheduling algorithm called - LDVS. From the exhaustive simulation results of different random and real task graphs, it is analyzed that LDVS maintains performance (overall makespan) and also exhibits significant improvements in processor and total energy over HEFT.","PeriodicalId":256314,"journal":{"name":"2015 2nd International Conference on Recent Advances in Engineering & Computational Sciences (RAECS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121491016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-01DOI: 10.1109/RAECS.2015.7453375
V. Goel, J. Kumar, J. Gambhir
Multilevel Inverters are nowadays becoming the state-of-the-art power electronic devices for high-power and power-quality seeking applications. While the classical topologies have proved to be a viable alternative, there has been an active interest in the evolution of newer topologies. Reduction in overall part count as compared to the conventional topologies has been an important objective in the recently introduced topologies. In this paper, some of the recently proposed multilevel inverter topologies with reduced power switches are reviewed. Level Shifted triangular multicarrier waves are compared with the sinusoidal reference to generate sine PWM switching sequence. Based on a detailed comparison of the different topologies as presented in this paper, appropriate multilevel solution can be arrived at for a given application.
{"title":"Different multilevel inverter topologies with reduced number of devices","authors":"V. Goel, J. Kumar, J. Gambhir","doi":"10.1109/RAECS.2015.7453375","DOIUrl":"https://doi.org/10.1109/RAECS.2015.7453375","url":null,"abstract":"Multilevel Inverters are nowadays becoming the state-of-the-art power electronic devices for high-power and power-quality seeking applications. While the classical topologies have proved to be a viable alternative, there has been an active interest in the evolution of newer topologies. Reduction in overall part count as compared to the conventional topologies has been an important objective in the recently introduced topologies. In this paper, some of the recently proposed multilevel inverter topologies with reduced power switches are reviewed. Level Shifted triangular multicarrier waves are compared with the sinusoidal reference to generate sine PWM switching sequence. Based on a detailed comparison of the different topologies as presented in this paper, appropriate multilevel solution can be arrived at for a given application.","PeriodicalId":256314,"journal":{"name":"2015 2nd International Conference on Recent Advances in Engineering & Computational Sciences (RAECS)","volume":"47 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132226228","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2015-12-01DOI: 10.1109/RAECS.2015.7453421
Tejinder Singh Saggu, L. Singh
In the power system, nonlinear loads results in production of harmonics due to which load current waveform gets distorted. This gives rise to production of current harmonics from load side and they tend to flow towards the source through Point of Common Coupling (PCC). These current harmonics further gives rise to voltage harmonics on the source side due to which nearby consumers can be affected. Thus, it is recommended to control the current harmonics on the load side itself at PCC so that they cannot interfere with the neighbouring loads. So, to avoid power quality problems at the source, custom power technology is being adopted in which number of control techniques are used to improve power quality. In this paper, an attempt has been made for selection of various such custom power devices like Distribution Static Synchronous Compensator (DSTATCOM), Static VAR Compensator (SVC), Dynamic Voltage Restorer (DVR), Unified Power Quality Compensator (UPQC) for the improvement of power quality in manufacturing industries. Then a characteristic comparison of these devices has been done. The limits imposed by IEEE and IEC standards for power quality improvement have also been discussed.
{"title":"Comparative analysis of custom power devices for power quality improvement in non-linear loads","authors":"Tejinder Singh Saggu, L. Singh","doi":"10.1109/RAECS.2015.7453421","DOIUrl":"https://doi.org/10.1109/RAECS.2015.7453421","url":null,"abstract":"In the power system, nonlinear loads results in production of harmonics due to which load current waveform gets distorted. This gives rise to production of current harmonics from load side and they tend to flow towards the source through Point of Common Coupling (PCC). These current harmonics further gives rise to voltage harmonics on the source side due to which nearby consumers can be affected. Thus, it is recommended to control the current harmonics on the load side itself at PCC so that they cannot interfere with the neighbouring loads. So, to avoid power quality problems at the source, custom power technology is being adopted in which number of control techniques are used to improve power quality. In this paper, an attempt has been made for selection of various such custom power devices like Distribution Static Synchronous Compensator (DSTATCOM), Static VAR Compensator (SVC), Dynamic Voltage Restorer (DVR), Unified Power Quality Compensator (UPQC) for the improvement of power quality in manufacturing industries. Then a characteristic comparison of these devices has been done. The limits imposed by IEEE and IEC standards for power quality improvement have also been discussed.","PeriodicalId":256314,"journal":{"name":"2015 2nd International Conference on Recent Advances in Engineering & Computational Sciences (RAECS)","volume":"5 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133836880","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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