Pub Date : 2007-09-01DOI: 10.1109/THERMINIC.2007.4451755
R. John, G. Atxaga, H. Frerker, A. Newerla
The multifunctional support structure (MFSS) technology is promising a reduction of overall mass and packing volume for spacecraft (S/C) electronic components. This technology eliminates the electronic box chassis and the cabling between the boxes by integrating the electronics, thermal control and the structural support into one single element The ultimate goal of the MFSS technology is to reduce size, weight, power consumption, cost and production time for future spacecraft components. The paper focus on the main challenges and solutions related to the thermal management within the MFSS technology based on the selected charge regulator (CR) application. Starting with the main set of thermal requirements for the CR the paper will include: Conceptual and detailed design based on high-conductivity carbon fibre CFRP, Description and results of the thermal material sample test program, Parameter and results for the performed first thermal simulation
{"title":"Advancement of Multifunctional support structure technologies (AMFSST)","authors":"R. John, G. Atxaga, H. Frerker, A. Newerla","doi":"10.1109/THERMINIC.2007.4451755","DOIUrl":"https://doi.org/10.1109/THERMINIC.2007.4451755","url":null,"abstract":"The multifunctional support structure (MFSS) technology is promising a reduction of overall mass and packing volume for spacecraft (S/C) electronic components. This technology eliminates the electronic box chassis and the cabling between the boxes by integrating the electronics, thermal control and the structural support into one single element The ultimate goal of the MFSS technology is to reduce size, weight, power consumption, cost and production time for future spacecraft components. The paper focus on the main challenges and solutions related to the thermal management within the MFSS technology based on the selected charge regulator (CR) application. Starting with the main set of thermal requirements for the CR the paper will include: Conceptual and detailed design based on high-conductivity carbon fibre CFRP, Description and results of the thermal material sample test program, Parameter and results for the performed first thermal simulation","PeriodicalId":264943,"journal":{"name":"2007 13th International Workshop on Thermal Investigation of ICs and Systems (THERMINIC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130438721","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-09-01DOI: 10.1109/THERMINIC.2007.4451771
K. Pierściński, D. Pierścińska, A. Kozłowska, M. Bugajski
In this paper we present results of the analysis of the thermoreflectance (TR) measurements performed on the high power laser diodes and laser bar emitting at 808 nm. Thermoreflectance is a modulation technique relying on periodic facet temperature modulation induced by pulsed current supply of the laser. The periodic temperature change of the laser induces variation of the refractive index and consequently modulates probe beam reflectivity. Spatially resolved thermoreflectance spectroscopy is applied to measure line-scans and maps of temperature distribution at the laser mirrors and emitter facets in laser bar. However, to get the absolute values of temperatures, thermoreflectance needs calibration. Different calibration methods, such us: mu-Raman spectroscopy and in situ determination of thermoreflectance coefficient (CTR) will be discussed. The knowledge of temperature distribution at laser facets gives insight into thermal processes occurring at devices' facets and consequently leads to the increased reliability and substantially longer lifetimes of such structures.
{"title":"Investigation of thermal processes in high power laser bars by thermoreflectance spectroscopy","authors":"K. Pierściński, D. Pierścińska, A. Kozłowska, M. Bugajski","doi":"10.1109/THERMINIC.2007.4451771","DOIUrl":"https://doi.org/10.1109/THERMINIC.2007.4451771","url":null,"abstract":"In this paper we present results of the analysis of the thermoreflectance (TR) measurements performed on the high power laser diodes and laser bar emitting at 808 nm. Thermoreflectance is a modulation technique relying on periodic facet temperature modulation induced by pulsed current supply of the laser. The periodic temperature change of the laser induces variation of the refractive index and consequently modulates probe beam reflectivity. Spatially resolved thermoreflectance spectroscopy is applied to measure line-scans and maps of temperature distribution at the laser mirrors and emitter facets in laser bar. However, to get the absolute values of temperatures, thermoreflectance needs calibration. Different calibration methods, such us: mu-Raman spectroscopy and in situ determination of thermoreflectance coefficient (CTR) will be discussed. The knowledge of temperature distribution at laser facets gives insight into thermal processes occurring at devices' facets and consequently leads to the increased reliability and substantially longer lifetimes of such structures.","PeriodicalId":264943,"journal":{"name":"2007 13th International Workshop on Thermal Investigation of ICs and Systems (THERMINIC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133905247","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-09-01DOI: 10.1109/THERMINIC.2007.4451762
R. Linderman, T. Brunschwiler, B. Smith, B. Michel
An overview on recent developments in thermal interfaces is given with a focus on a novel thermal interface technology that allows the formation of 2-3 times thinner bondlines with strongly improved thermal properties at lower assembly pressures. This is achieved using nested hierarchical surface channels to control the particle stacking with highly particle-filled materials. Reliability testing with thermal cycling has also demonstrated a decrease in thermal resistance after extended times with longer overall lifetime compared to a flat interface.
{"title":"High-performance thermal interface technology overview","authors":"R. Linderman, T. Brunschwiler, B. Smith, B. Michel","doi":"10.1109/THERMINIC.2007.4451762","DOIUrl":"https://doi.org/10.1109/THERMINIC.2007.4451762","url":null,"abstract":"An overview on recent developments in thermal interfaces is given with a focus on a novel thermal interface technology that allows the formation of 2-3 times thinner bondlines with strongly improved thermal properties at lower assembly pressures. This is achieved using nested hierarchical surface channels to control the particle stacking with highly particle-filled materials. Reliability testing with thermal cycling has also demonstrated a decrease in thermal resistance after extended times with longer overall lifetime compared to a flat interface.","PeriodicalId":264943,"journal":{"name":"2007 13th International Workshop on Thermal Investigation of ICs and Systems (THERMINIC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134310022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-09-01DOI: 10.1109/THERMINIC.2007.4451754
F. Stefani, P. Bagnoli, S. Luschi
A multifunctional (temperature, liquid flow, pressure and electrical conductivity) thick film sensor for monitoring water pipelines is here presented. This work is mainly focused on the theoretical and experimental characterization of the water flow sensitivity based on a planar version of the well-known hot-wire anemometer. The simulations of the temperature displacement on the sensor surface under several electrical biases and heat convection conditions were performed by means of the fast analytical thermal simulator DJOSER, thus providing an example of the capability and the utility of this simulation program. The calculated sensitivity curves to the heat convection coefficient and/or to the water speed were found to be in agreement with the experimental data measured on the sensor mounted within a closed pipeline which allows changing the water speed until 1000 liters/hour.
{"title":"Study of water speed sensitivity in a multifunctional thick-film sensor by analytical thermal simulations and experiments","authors":"F. Stefani, P. Bagnoli, S. Luschi","doi":"10.1109/THERMINIC.2007.4451754","DOIUrl":"https://doi.org/10.1109/THERMINIC.2007.4451754","url":null,"abstract":"A multifunctional (temperature, liquid flow, pressure and electrical conductivity) thick film sensor for monitoring water pipelines is here presented. This work is mainly focused on the theoretical and experimental characterization of the water flow sensitivity based on a planar version of the well-known hot-wire anemometer. The simulations of the temperature displacement on the sensor surface under several electrical biases and heat convection conditions were performed by means of the fast analytical thermal simulator DJOSER, thus providing an example of the capability and the utility of this simulation program. The calculated sensitivity curves to the heat convection coefficient and/or to the water speed were found to be in agreement with the experimental data measured on the sensor mounted within a closed pipeline which allows changing the water speed until 1000 liters/hour.","PeriodicalId":264943,"journal":{"name":"2007 13th International Workshop on Thermal Investigation of ICs and Systems (THERMINIC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133596574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-09-01DOI: 10.1109/EPTC.2007.4469682
Mahendra Wankhede, Vivek Khaire, Avijit Goswami, S. D. Mahajan
The thermal management of an outdoor electronic enclosure can be quite challenging due to the additional thermal load from the sun and the requirement of having an air-sealed enclosure. It is essential to consider the effect of solar heating loads in the design process; otherwise, it can shorten the life expectancy of the electronic product or lead to catastrophic failure. The main objective of this work is to analyze and compare the effectiveness of different cooling techniques used for outdoor electronics. Various cooling techniques were compared like special coats and paints on the outer surface, radiation shield, double-walled enclosure, fans for internal air circulation and air-to-air heat exchangers. A highly simplified, typical outdoor system was selected for this study measuring approximately 300times300times400 mm (WxLxH). Solar radiation was incident on 3 sides of the enclosure. There were 8 equally spaced PCBs inside the enclosure dissipating 12.5 W each uniformly (100 watts total). A computational fluid dynamics (CFD) model of the system was built and analyzed. This was followed by building a mock-up of the system and conducting experiments to validate the CFD model. It was found that some of the simplest cooling techniques like white oil paint on the outer surface can significantly reduce the impact of solar loads. Adding internal circulation fans can also be very effective. Using air-to-air heat exchangers was found to be the most effective solution although it is more complex and costly.
由于来自太阳的额外热负荷和具有空气密封外壳的要求，室外电子外壳的热管理可能相当具有挑战性。在设计过程中必须考虑太阳能热负荷的影响;否则，会缩短电子产品的寿命或导致灾难性的故障。这项工作的主要目的是分析和比较用于户外电子设备的不同冷却技术的有效性。对各种冷却技术进行了比较，如外表面的特殊涂层和油漆、辐射屏蔽、双壁外壳、内部空气循环风扇和空气对空气热交换器。本研究选择了一个高度简化的典型室外系统，尺寸约为300 × 300 × 400 mm (WxLxH)。太阳辐射照射在围栏的3面。机箱内有8个等间距的pcb，每个均匀地耗散12.5 W(总共100瓦)。建立了系统的计算流体力学模型并进行了分析。随后建立了系统的模型，并进行了实验来验证CFD模型。研究发现，一些最简单的冷却技术，如在外表面涂上白色油彩，可以显著减少太阳能负荷的影响。添加内循环风扇也可以非常有效。使用空气对空气热交换器被认为是最有效的解决方案，尽管它更复杂和昂贵。
{"title":"Evaluation of cooling solutions for outdoor electronics","authors":"Mahendra Wankhede, Vivek Khaire, Avijit Goswami, S. D. Mahajan","doi":"10.1109/EPTC.2007.4469682","DOIUrl":"https://doi.org/10.1109/EPTC.2007.4469682","url":null,"abstract":"The thermal management of an outdoor electronic enclosure can be quite challenging due to the additional thermal load from the sun and the requirement of having an air-sealed enclosure. It is essential to consider the effect of solar heating loads in the design process; otherwise, it can shorten the life expectancy of the electronic product or lead to catastrophic failure. The main objective of this work is to analyze and compare the effectiveness of different cooling techniques used for outdoor electronics. Various cooling techniques were compared like special coats and paints on the outer surface, radiation shield, double-walled enclosure, fans for internal air circulation and air-to-air heat exchangers. A highly simplified, typical outdoor system was selected for this study measuring approximately 300times300times400 mm (WxLxH). Solar radiation was incident on 3 sides of the enclosure. There were 8 equally spaced PCBs inside the enclosure dissipating 12.5 W each uniformly (100 watts total). A computational fluid dynamics (CFD) model of the system was built and analyzed. This was followed by building a mock-up of the system and conducting experiments to validate the CFD model. It was found that some of the simplest cooling techniques like white oil paint on the outer surface can significantly reduce the impact of solar loads. Adding internal circulation fans can also be very effective. Using air-to-air heat exchangers was found to be the most effective solution although it is more complex and costly.","PeriodicalId":264943,"journal":{"name":"2007 13th International Workshop on Thermal Investigation of ICs and Systems (THERMINIC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131310924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-09-01DOI: 10.1109/THERMINIC.2007.4451740
Virginia Martín Hériz, Je-Hyoung Park, Travis Kemper, S. Kang, Ali Shakouri
Thermal aware routing and placement algorithms are important in industry. Currently, there are reasonably fast Green's function based algorithms that calculate the temperature distribution in a chip made from a stack of different materials. However, the layers are all assumed to have the same size, thus neglecting the important fact that the thermal mounts which are placed underneath the chip can be significantly larger than the chip itself. In an earlier publication, we showed that the image blurring technique can be used to calculate quickly temperature distribution in realistic packages. For this method to be effective, temperature distribution for several point heat sources at the center and at the corner and edges of the chip should be calculated using finite element analysis (FEA) or measured. In addition, more accurate results require correction by a weighting function that will need several FEA simulations. In this paper, we introduce the convolution by images that take the symmetry of the thermal boundary conditions into account. Thus with only "two" finite element simulations, the steady-state temperature distribution for an arbitrary complex power dissipation profile in a packaged chip can be calculated. Several simulation results are presented. It is shown that the power blurring technique together with the method of images can reproduce the temperature profile with an error less than 0.5%.
{"title":"Method of images for the fast calculation of temperature distributions in packaged VLSI chips","authors":"Virginia Martín Hériz, Je-Hyoung Park, Travis Kemper, S. Kang, Ali Shakouri","doi":"10.1109/THERMINIC.2007.4451740","DOIUrl":"https://doi.org/10.1109/THERMINIC.2007.4451740","url":null,"abstract":"Thermal aware routing and placement algorithms are important in industry. Currently, there are reasonably fast Green's function based algorithms that calculate the temperature distribution in a chip made from a stack of different materials. However, the layers are all assumed to have the same size, thus neglecting the important fact that the thermal mounts which are placed underneath the chip can be significantly larger than the chip itself. In an earlier publication, we showed that the image blurring technique can be used to calculate quickly temperature distribution in realistic packages. For this method to be effective, temperature distribution for several point heat sources at the center and at the corner and edges of the chip should be calculated using finite element analysis (FEA) or measured. In addition, more accurate results require correction by a weighting function that will need several FEA simulations. In this paper, we introduce the convolution by images that take the symmetry of the thermal boundary conditions into account. Thus with only \"two\" finite element simulations, the steady-state temperature distribution for an arbitrary complex power dissipation profile in a packaged chip can be calculated. Several simulation results are presented. It is shown that the power blurring technique together with the method of images can reproduce the temperature profile with an error less than 0.5%.","PeriodicalId":264943,"journal":{"name":"2007 13th International Workshop on Thermal Investigation of ICs and Systems (THERMINIC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120833785","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-09-01DOI: 10.1109/THERMINIC.2007.4451751
Jianzheng Hu, Lianqiao Yang, M. Shin
In this paper we present the thermal and mechanical analysis of high-power light-emitting diodes (LEDs) with ceramic packages. Transient thermal measurements and thermo-mechanical simulation were performed to study the thermal and mechanical characteristics of ceramic packages. Thermal resistance from the junction to the ambient was decreased from 76.1degC/W to 45.3degC/W by replacing plastic mould to ceramic mould for LED packages. Higher level of thermo-mechanical stresses in the chip were found for LEDs with ceramic packages despite of less mismatching coefficients of thermal expansion comparing with plastic packages. The results suggest that the thermal performance of LEDs can be improved by using ceramic packages, but the mounting process of the high power LEDs with ceramic packages is critically important and should be in charge of delaminating interface layers in the packages.
{"title":"Thermal and mechanical analysis of high-power light-emitting diodes with ceramic packages","authors":"Jianzheng Hu, Lianqiao Yang, M. Shin","doi":"10.1109/THERMINIC.2007.4451751","DOIUrl":"https://doi.org/10.1109/THERMINIC.2007.4451751","url":null,"abstract":"In this paper we present the thermal and mechanical analysis of high-power light-emitting diodes (LEDs) with ceramic packages. Transient thermal measurements and thermo-mechanical simulation were performed to study the thermal and mechanical characteristics of ceramic packages. Thermal resistance from the junction to the ambient was decreased from 76.1degC/W to 45.3degC/W by replacing plastic mould to ceramic mould for LED packages. Higher level of thermo-mechanical stresses in the chip were found for LEDs with ceramic packages despite of less mismatching coefficients of thermal expansion comparing with plastic packages. The results suggest that the thermal performance of LEDs can be improved by using ceramic packages, but the mounting process of the high power LEDs with ceramic packages is critically important and should be in charge of delaminating interface layers in the packages.","PeriodicalId":264943,"journal":{"name":"2007 13th International Workshop on Thermal Investigation of ICs and Systems (THERMINIC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124636261","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-09-01DOI: 10.1109/THERMINIC.2007.4451760
P. Komarov, M. Burzo, P. Raad
The investigation of the influence of a transparent passivation layer on the effective thermoreflectance coefficient of metallic and semiconductor materials is carried out for two materials and two types of passivation layers. This investigation is targeted at determining the effective Ctr for composite structures typically found in microelectronic devices; namely, transparent passivation layers covering either semiconductor or metallic materials. The layer of poly-Si or gold is deposited on a Si substrate and covered with a layer of either SiO2 or Si3N4. To study the light interference effect on the CTR value of poly-Si and gold films, the thickness of the passivation layer is varied in the range that envelopes the test wavelength of the light source. The experimental values of the effective CTR are obtained with the intent of correlating them with the intrinsic values of CTR for the materials under study (poly-Si and gold) and the thickness and/or material of the transparent passivation layers (SiO2 or Si3N4).
{"title":"Influence of transparent surface layer on effective thermoreflectance coefficient of typical stacked electronic structures","authors":"P. Komarov, M. Burzo, P. Raad","doi":"10.1109/THERMINIC.2007.4451760","DOIUrl":"https://doi.org/10.1109/THERMINIC.2007.4451760","url":null,"abstract":"The investigation of the influence of a transparent passivation layer on the effective thermoreflectance coefficient of metallic and semiconductor materials is carried out for two materials and two types of passivation layers. This investigation is targeted at determining the effective Ctr for composite structures typically found in microelectronic devices; namely, transparent passivation layers covering either semiconductor or metallic materials. The layer of poly-Si or gold is deposited on a Si substrate and covered with a layer of either SiO2 or Si3N4. To study the light interference effect on the CTR value of poly-Si and gold films, the thickness of the passivation layer is varied in the range that envelopes the test wavelength of the light source. The experimental values of the effective CTR are obtained with the intent of correlating them with the intrinsic values of CTR for the materials under study (poly-Si and gold) and the thickness and/or material of the transparent passivation layers (SiO2 or Si3N4).","PeriodicalId":264943,"journal":{"name":"2007 13th International Workshop on Thermal Investigation of ICs and Systems (THERMINIC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114219971","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-09-01DOI: 10.1109/THERMINIC.2007.4451750
Seok-Hwan Moon, G. Hwang
Electronic devices have been minimized but the performance of those is becoming better and better. Therefore it is needed to develop new cooling methods suitable for a thin packaging structure with high thermal density. The thin flat plate type micro CPL(capillary pumped loop) with the thickness less than 2 mm was developed in this study. The proposed micro CPL has two staged grooves in evaporator instead of poles for preventing backflows of the vapor bubble and the simpler structure than that of a micro CPL with the poles. Also a large vapor space from the evaporator to the condenser was constructed in the middle plate therefore flow resistance of the vapor could be reduced. The micro CPL was fabricated using MEMS technology. The micro CPL was composed of lower, middle and upper substrates. The lower substrate was made of silicon and the middle and upper substrates are made of Pyrex glass for visualization. Through a preliminary test it was checked that there was no leakage at the adhesion interface between lower and middle or upper substrates and at the bonding interface between lower substrate and fill tube. Although the experimental studies for the micro CPL have been poor till now, we have obtained the reasonable experimental results in this study. The performance test result has showed 8.5 W of the heat transfer rate for the micro CPL and we could observe the operating characteristics of circulating or evaporating and condensing by visualization. Pure distilled water was used as the working fluid.
{"title":"Development of the micro capillary pumped loop for electronic cooling","authors":"Seok-Hwan Moon, G. Hwang","doi":"10.1109/THERMINIC.2007.4451750","DOIUrl":"https://doi.org/10.1109/THERMINIC.2007.4451750","url":null,"abstract":"Electronic devices have been minimized but the performance of those is becoming better and better. Therefore it is needed to develop new cooling methods suitable for a thin packaging structure with high thermal density. The thin flat plate type micro CPL(capillary pumped loop) with the thickness less than 2 mm was developed in this study. The proposed micro CPL has two staged grooves in evaporator instead of poles for preventing backflows of the vapor bubble and the simpler structure than that of a micro CPL with the poles. Also a large vapor space from the evaporator to the condenser was constructed in the middle plate therefore flow resistance of the vapor could be reduced. The micro CPL was fabricated using MEMS technology. The micro CPL was composed of lower, middle and upper substrates. The lower substrate was made of silicon and the middle and upper substrates are made of Pyrex glass for visualization. Through a preliminary test it was checked that there was no leakage at the adhesion interface between lower and middle or upper substrates and at the bonding interface between lower substrate and fill tube. Although the experimental studies for the micro CPL have been poor till now, we have obtained the reasonable experimental results in this study. The performance test result has showed 8.5 W of the heat transfer rate for the micro CPL and we could observe the operating characteristics of circulating or evaporating and condensing by visualization. Pure distilled water was used as the working fluid.","PeriodicalId":264943,"journal":{"name":"2007 13th International Workshop on Thermal Investigation of ICs and Systems (THERMINIC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126599932","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2007-09-01DOI: 10.1109/THERMINIC.2007.4451758
Y. Gerstenmaier, W. Kiffe, G. Wachutka
This paper will deal with the modeling-problem of combining thermal subsystems (e.g. a semiconductor module or package with a cooling radiator) making use of reduced models. The subsystem models consist of a set of Foster-type thermal equivalent circuits, which are only behavioral models. A fast algorithm is presented for transforming the Foster-type circuits in Cauer-circuits which have physical behavior and therefore allow for the construction of the thermal model of the complete system. Then the set of Cauer-circuits for the complete system is transformed back into Foster-circuits to give a simple mathematical representation and applicability. The transformation algorithms are derived in concise form by use of recursive relations. The method is exemplified by modeling and measurements on a single chip IGBT package mounted on a closed water cooled radiator. The thermal impedance of the complete system is constructed from the impedances of the subsystems, IGBT-package and radiator, and also the impedance of the package can be inferred from the measured impedance of the complete system.
{"title":"Combination of thermal subsystems modeled by rapid circuit transformation","authors":"Y. Gerstenmaier, W. Kiffe, G. Wachutka","doi":"10.1109/THERMINIC.2007.4451758","DOIUrl":"https://doi.org/10.1109/THERMINIC.2007.4451758","url":null,"abstract":"This paper will deal with the modeling-problem of combining thermal subsystems (e.g. a semiconductor module or package with a cooling radiator) making use of reduced models. The subsystem models consist of a set of Foster-type thermal equivalent circuits, which are only behavioral models. A fast algorithm is presented for transforming the Foster-type circuits in Cauer-circuits which have physical behavior and therefore allow for the construction of the thermal model of the complete system. Then the set of Cauer-circuits for the complete system is transformed back into Foster-circuits to give a simple mathematical representation and applicability. The transformation algorithms are derived in concise form by use of recursive relations. The method is exemplified by modeling and measurements on a single chip IGBT package mounted on a closed water cooled radiator. The thermal impedance of the complete system is constructed from the impedances of the subsystems, IGBT-package and radiator, and also the impedance of the package can be inferred from the measured impedance of the complete system.","PeriodicalId":264943,"journal":{"name":"2007 13th International Workshop on Thermal Investigation of ICs and Systems (THERMINIC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2007-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127283384","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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