Pub Date : 2014-10-13DOI: 10.1109/SMELEC.2014.6920807
C. A. Norhidayah, S. Kamaraddin, N. Nafarizal, M. Z. Sahdan, A. R. Nuralfadzilah, S. Tawil
The increasing demand for high-performance and low cost optoelectronic devices motivates many researchers to develop more efficient transparent conductive oxide (TCO) films. Among the popular TCOs, the past decade has seen the emergence of zinc oxide (ZnO) as one of the potential materials for the fabrication of transparent conductive electrodes. The aim of this work is to study the influence of different solvents on the properties of GdxZn1-xO (x ≤ 0.01) films synthesized by sol-gel spin coating technique. Consequently, three different solutions were prepared with different solvents [2-Methoxyethanol (2-ME), ethanol (EtOH) and isopropanol (IPA)]. The structural, surface roughness and optical properties were investigated using an X-ray diffractometer (XRD, PANanalytical xpert-pro), atomic force microscope (AFM, Park XE-100) and ultra violet-visible spectrophotometer (UV-Vis, Shimadzu UV 1800), respectively. As a result, all films were found to have polycrystalline with hexagonal wurtzite structure. In addition, AFM analysis revealed that the film synthesized using EtOH exhibiting the smallest surface roughness of about 4.12 nm compared with IPA and 2-ME of about 5.12 nm and 12.22 nm, respectively. Also, the optical transmittance spectra indicate that all films exhibit good transparency in the visible spectral range with an average transmission of approximately 97.5%, 97.2% and 96.1% for EtOH, IPA and 2-ME, respectively. The optical band gap energy (Eg) values was estimated to be around 3.26 ~ 3.30 eV using Tauc's model with the lowest value for IPA (3.26 eV) and highest for 2-ME (3.30 eV). In a nutshell, the solvents are playing a key role for controlling the growth and nucleation in the preparation of GdxZn1-xO solution and it strongly affects the properties of the film.
{"title":"A Study on the role of solvent on properties of GdxZn1−xO films synthesized by sol-gel method","authors":"C. A. Norhidayah, S. Kamaraddin, N. Nafarizal, M. Z. Sahdan, A. R. Nuralfadzilah, S. Tawil","doi":"10.1109/SMELEC.2014.6920807","DOIUrl":"https://doi.org/10.1109/SMELEC.2014.6920807","url":null,"abstract":"The increasing demand for high-performance and low cost optoelectronic devices motivates many researchers to develop more efficient transparent conductive oxide (TCO) films. Among the popular TCOs, the past decade has seen the emergence of zinc oxide (ZnO) as one of the potential materials for the fabrication of transparent conductive electrodes. The aim of this work is to study the influence of different solvents on the properties of GdxZn1-xO (x ≤ 0.01) films synthesized by sol-gel spin coating technique. Consequently, three different solutions were prepared with different solvents [2-Methoxyethanol (2-ME), ethanol (EtOH) and isopropanol (IPA)]. The structural, surface roughness and optical properties were investigated using an X-ray diffractometer (XRD, PANanalytical xpert-pro), atomic force microscope (AFM, Park XE-100) and ultra violet-visible spectrophotometer (UV-Vis, Shimadzu UV 1800), respectively. As a result, all films were found to have polycrystalline with hexagonal wurtzite structure. In addition, AFM analysis revealed that the film synthesized using EtOH exhibiting the smallest surface roughness of about 4.12 nm compared with IPA and 2-ME of about 5.12 nm and 12.22 nm, respectively. Also, the optical transmittance spectra indicate that all films exhibit good transparency in the visible spectral range with an average transmission of approximately 97.5%, 97.2% and 96.1% for EtOH, IPA and 2-ME, respectively. The optical band gap energy (Eg) values was estimated to be around 3.26 ~ 3.30 eV using Tauc's model with the lowest value for IPA (3.26 eV) and highest for 2-ME (3.30 eV). In a nutshell, the solvents are playing a key role for controlling the growth and nucleation in the preparation of GdxZn1-xO solution and it strongly affects the properties of the film.","PeriodicalId":268203,"journal":{"name":"2014 IEEE International Conference on Semiconductor Electronics (ICSE2014)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132569217","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-13DOI: 10.1109/SMELEC.2014.6920853
Shengzhou Zhang, Lingling Sun, J. Wen, Jun Liu
The paper presents the design of a 48-78GHz sub-harmonic pumped image rejection mixer (SHIRM) based on a 3μm GaAs technology. The SHIRM contains two identical 2nd APDP-Based SHP mixers, a modified quadrature-phase RF Lange coupler and an in-phase LO Wilkinson power divider. The quasi-lumped topology is utilized with the compact size of 1.7×1.6 mm2. The conversion gain of -14±1dB and the minimum image rejection radio of 20dB over the frequency range 48-78GHz covering the whole V-band are simulated, with fixed IF of 1GHz and the LO input power of 12dBm. The 3dB bandwidth is superior to 30GHz. The LO-to-RF and 2LO-to-RF isolations are superior to 25dB and 70dB, respectively. The 2nd harmonic component of LO signal is suppressed by the symmetrical structure.
{"title":"A 48GHz-78GHz MMIC sub-harmonic pumped image rejection mixer","authors":"Shengzhou Zhang, Lingling Sun, J. Wen, Jun Liu","doi":"10.1109/SMELEC.2014.6920853","DOIUrl":"https://doi.org/10.1109/SMELEC.2014.6920853","url":null,"abstract":"The paper presents the design of a 48-78GHz sub-harmonic pumped image rejection mixer (SHIRM) based on a 3μm GaAs technology. The SHIRM contains two identical 2nd APDP-Based SHP mixers, a modified quadrature-phase RF Lange coupler and an in-phase LO Wilkinson power divider. The quasi-lumped topology is utilized with the compact size of 1.7×1.6 mm2. The conversion gain of -14±1dB and the minimum image rejection radio of 20dB over the frequency range 48-78GHz covering the whole V-band are simulated, with fixed IF of 1GHz and the LO input power of 12dBm. The 3dB bandwidth is superior to 30GHz. The LO-to-RF and 2LO-to-RF isolations are superior to 25dB and 70dB, respectively. The 2nd harmonic component of LO signal is suppressed by the symmetrical structure.","PeriodicalId":268203,"journal":{"name":"2014 IEEE International Conference on Semiconductor Electronics (ICSE2014)","volume":"25 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132681201","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-13DOI: 10.1109/SMELEC.2014.6920809
M. Masrie, B. Majlis, J. Yunas
This paper reports experimental study of a microfluidic channel fabrication for bioparticles detection system. The microfluidic channel is fabricated by standard MEMS soft photolithography process implementing negative photoresist SU-8 and poly-dimethylsiloxane (PDMS). Based on the characterization process in the fabrication, an optimum structure of PDMS microfluidic has been achieved. A proper UV exposure dosage can be identified through the observation of the SU-8 mold film thickness and sidewalls profile produced in the characterization process. From this, UV expose for 60 s with exposure energy at 156 mJ/cm2 is considered as the optimal expose condition in this work. In addition, the difference between the PDMS microchannel pattern from the SU-8 mold are also observed. With these results, the produced structures can provide suitable channel formation for portable bioparticles detection purpose in lab on Chip applications.
{"title":"Experimental analysis on SU8-micromolding structure of PDMS (poly-dimethylsiloxane) based microfluidic channel","authors":"M. Masrie, B. Majlis, J. Yunas","doi":"10.1109/SMELEC.2014.6920809","DOIUrl":"https://doi.org/10.1109/SMELEC.2014.6920809","url":null,"abstract":"This paper reports experimental study of a microfluidic channel fabrication for bioparticles detection system. The microfluidic channel is fabricated by standard MEMS soft photolithography process implementing negative photoresist SU-8 and poly-dimethylsiloxane (PDMS). Based on the characterization process in the fabrication, an optimum structure of PDMS microfluidic has been achieved. A proper UV exposure dosage can be identified through the observation of the SU-8 mold film thickness and sidewalls profile produced in the characterization process. From this, UV expose for 60 s with exposure energy at 156 mJ/cm2 is considered as the optimal expose condition in this work. In addition, the difference between the PDMS microchannel pattern from the SU-8 mold are also observed. With these results, the produced structures can provide suitable channel formation for portable bioparticles detection purpose in lab on Chip applications.","PeriodicalId":268203,"journal":{"name":"2014 IEEE International Conference on Semiconductor Electronics (ICSE2014)","volume":"144 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134444755","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-13DOI: 10.1109/SMELEC.2014.6920828
N. Aimaier, R. Sidek, M. Hamidon, N. Sulaiman
In this paper noise contribution of current source transistors and sizing methodology in charge sensitive amplifier for application in the front-end readout electronics is presented. In modern deep-submicron technologies, MOS transistor operating region tends to shift from strong inversion to moderate inversion, this makes traditional square-law MOS device modeling not applicable anymore. Thus a simplified EKV model, which is quite successful in all CMOS operating regions, has been adopted to develop a new analytical methodology to optimize geometry of current source transistors so that the noise contribution from these transistors is only a fraction of input transistor noise. A charge sensitive amplifier based on dual PMOS cascode structure is designed by adopting this current source transistor sizing methodology, and has been simulated using 130nm CMOS technology. The proposed methodology and noise contribution from current source transistors have been found in good agreement with simulation results using deep-submicron CMOS technology.
{"title":"Transistor sizing methodology for low noise charge sensitive amplifier with input transistor working in moderate inversion","authors":"N. Aimaier, R. Sidek, M. Hamidon, N. Sulaiman","doi":"10.1109/SMELEC.2014.6920828","DOIUrl":"https://doi.org/10.1109/SMELEC.2014.6920828","url":null,"abstract":"In this paper noise contribution of current source transistors and sizing methodology in charge sensitive amplifier for application in the front-end readout electronics is presented. In modern deep-submicron technologies, MOS transistor operating region tends to shift from strong inversion to moderate inversion, this makes traditional square-law MOS device modeling not applicable anymore. Thus a simplified EKV model, which is quite successful in all CMOS operating regions, has been adopted to develop a new analytical methodology to optimize geometry of current source transistors so that the noise contribution from these transistors is only a fraction of input transistor noise. A charge sensitive amplifier based on dual PMOS cascode structure is designed by adopting this current source transistor sizing methodology, and has been simulated using 130nm CMOS technology. The proposed methodology and noise contribution from current source transistors have been found in good agreement with simulation results using deep-submicron CMOS technology.","PeriodicalId":268203,"journal":{"name":"2014 IEEE International Conference on Semiconductor Electronics (ICSE2014)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134621447","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-13DOI: 10.1109/SMELEC.2014.6920850
N. Sarip, F. Mahmud, M. Z. Sahdan, S. Tawil
This report represents an experimental investigation on the structural and optical modification of ZnO thin films towards the Gd dopant content, whereby the desired films were deposited on glass substrates by chemical solution method. The prepared samples were characterized by X-ray diffraction (XRD), field-emission scanning electron microscopy (FE-SEM), and surface profiler. The optical properties were studied by UV-Visible spectroscopy technique. The influence of Gd dopant on structural and optical properties of the prepared thin films were investigated and discussed based on the structure modification and band gap of undoped and Gd-doped ZnO thin films.
{"title":"Influence of gadolinium doping on the crystalline structure and optical properties of zinc oxide thin films","authors":"N. Sarip, F. Mahmud, M. Z. Sahdan, S. Tawil","doi":"10.1109/SMELEC.2014.6920850","DOIUrl":"https://doi.org/10.1109/SMELEC.2014.6920850","url":null,"abstract":"This report represents an experimental investigation on the structural and optical modification of ZnO thin films towards the Gd dopant content, whereby the desired films were deposited on glass substrates by chemical solution method. The prepared samples were characterized by X-ray diffraction (XRD), field-emission scanning electron microscopy (FE-SEM), and surface profiler. The optical properties were studied by UV-Visible spectroscopy technique. The influence of Gd dopant on structural and optical properties of the prepared thin films were investigated and discussed based on the structure modification and band gap of undoped and Gd-doped ZnO thin films.","PeriodicalId":268203,"journal":{"name":"2014 IEEE International Conference on Semiconductor Electronics (ICSE2014)","volume":"45 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115082771","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-13DOI: 10.1109/SMELEC.2014.6920785
F. Lumbantoruan, Yuan-Yee Wong, Yue-Han Wu, Wei-Ching Huang, Niraj Man Shrestra, T. T. Luong, T. B. Tinh, E. Chang
The influence of TMAl preflow to the AlN buffer layer and GaN thin film was studied by Optical Microscope, Atomic Force Microscope, X-ray diffraction and Transmission Electron Microscope. Different duration of TMAl preflow lead to substantially differences of the AlN buffer layer and GaN film properties in terms of surface morphology and crystal quality. It was found without TMAl preflow the crystal quality of AlN buffer layer and GaN deteriorated due to the formation of amorphous interlayer between Si and AlN. Meltback etching and cracks was observed on the surface of GaN grown on AlN without TMAl preflow. However, overlong duration of TMAl preflow degraded the properties of AlN buffer layer and the subsequent GaN layer. GaN grown with longer TMAl preflow suffer of poor crystal quality, high density cracks and rough surface morphology. With the optimum duration of TMAl preflow, crystal quality and surface roughness of GaN can be improved.
{"title":"Investigation of TMAl preflow to the properties of AlN and GaN film grown on Si(111) by MOCVD","authors":"F. Lumbantoruan, Yuan-Yee Wong, Yue-Han Wu, Wei-Ching Huang, Niraj Man Shrestra, T. T. Luong, T. B. Tinh, E. Chang","doi":"10.1109/SMELEC.2014.6920785","DOIUrl":"https://doi.org/10.1109/SMELEC.2014.6920785","url":null,"abstract":"The influence of TMAl preflow to the AlN buffer layer and GaN thin film was studied by Optical Microscope, Atomic Force Microscope, X-ray diffraction and Transmission Electron Microscope. Different duration of TMAl preflow lead to substantially differences of the AlN buffer layer and GaN film properties in terms of surface morphology and crystal quality. It was found without TMAl preflow the crystal quality of AlN buffer layer and GaN deteriorated due to the formation of amorphous interlayer between Si and AlN. Meltback etching and cracks was observed on the surface of GaN grown on AlN without TMAl preflow. However, overlong duration of TMAl preflow degraded the properties of AlN buffer layer and the subsequent GaN layer. GaN grown with longer TMAl preflow suffer of poor crystal quality, high density cracks and rough surface morphology. With the optimum duration of TMAl preflow, crystal quality and surface roughness of GaN can be improved.","PeriodicalId":268203,"journal":{"name":"2014 IEEE International Conference on Semiconductor Electronics (ICSE2014)","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115769524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-13DOI: 10.1109/SMELEC.2014.6920881
C. Yee, M. Arshad, M. Nuzaihan, M. Fathil, U. Hashim
Polysilicon has great benefit in application of pH sensor due to the unique properties and easiness to use top-down approach. In this paper, we present fabrication and characterization of undoped polysilicon nanowire (NW) for pH sensor application. The fabrication processes steps involve were photolithography, etching, deposition and oxidation. 3-aminopropyltriethoxysilane or APTES were used to enhance the sensitivity of polysilicon layer as well as able to provide surface modification by undergoing protonation and deprotonation process. Surface analysis using SEM were used for surface morphology analysis. Different types of pH solution provide different resistivity and conductivity towards polysilicon surface. In addition, voltage, current, conductance against pH level are characterized and compared. Alkaline solution has the higher current as compared to acidic. This was due to the polysilicon layer contains more holes which are easily being attracted by - SiO to the surface and hence, forming a strong channel from source to drain. Results obtain reveal a linearity of pH measurement with a corresponding sensitivity of 4.65 nS/pH.
{"title":"Fabrication and characterization of undoped polysilicon nanowire for pH sensor","authors":"C. Yee, M. Arshad, M. Nuzaihan, M. Fathil, U. Hashim","doi":"10.1109/SMELEC.2014.6920881","DOIUrl":"https://doi.org/10.1109/SMELEC.2014.6920881","url":null,"abstract":"Polysilicon has great benefit in application of pH sensor due to the unique properties and easiness to use top-down approach. In this paper, we present fabrication and characterization of undoped polysilicon nanowire (NW) for pH sensor application. The fabrication processes steps involve were photolithography, etching, deposition and oxidation. 3-aminopropyltriethoxysilane or APTES were used to enhance the sensitivity of polysilicon layer as well as able to provide surface modification by undergoing protonation and deprotonation process. Surface analysis using SEM were used for surface morphology analysis. Different types of pH solution provide different resistivity and conductivity towards polysilicon surface. In addition, voltage, current, conductance against pH level are characterized and compared. Alkaline solution has the higher current as compared to acidic. This was due to the polysilicon layer contains more holes which are easily being attracted by - SiO to the surface and hence, forming a strong channel from source to drain. Results obtain reveal a linearity of pH measurement with a corresponding sensitivity of 4.65 nS/pH.","PeriodicalId":268203,"journal":{"name":"2014 IEEE International Conference on Semiconductor Electronics (ICSE2014)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114996232","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-13DOI: 10.1109/SMELEC.2014.6920782
L. L. Ong, Chan Yee Kit, Y. Heng
Contactor pin is commonly used as the test tooling to enable million times of repeatability functional testing in manufacturing. Simulation should be performed before contactor sent for prototyping. The objective is to optimize the design according to device performance and avoid design faulty which may lead to higher testing cost. This paper introduces the methodology on contactor pin characterization specifically the pin inductance that are helpful for high speed tooling engineer to access their contactor's performances. The impact of the contactor pin design, topology and contactor housing design will be explained in this paper. Indirectly, this is to emphasize the importance of assessing the contactor by considering many design factors instead of assessing in ideal way. It is widely applicable to any electronic devices testing that need contactor.
{"title":"Contactor characterization methodology on pin inductance","authors":"L. L. Ong, Chan Yee Kit, Y. Heng","doi":"10.1109/SMELEC.2014.6920782","DOIUrl":"https://doi.org/10.1109/SMELEC.2014.6920782","url":null,"abstract":"Contactor pin is commonly used as the test tooling to enable million times of repeatability functional testing in manufacturing. Simulation should be performed before contactor sent for prototyping. The objective is to optimize the design according to device performance and avoid design faulty which may lead to higher testing cost. This paper introduces the methodology on contactor pin characterization specifically the pin inductance that are helpful for high speed tooling engineer to access their contactor's performances. The impact of the contactor pin design, topology and contactor housing design will be explained in this paper. Indirectly, this is to emphasize the importance of assessing the contactor by considering many design factors instead of assessing in ideal way. It is widely applicable to any electronic devices testing that need contactor.","PeriodicalId":268203,"journal":{"name":"2014 IEEE International Conference on Semiconductor Electronics (ICSE2014)","volume":"85 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126046651","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-13DOI: 10.1109/SMELEC.2014.6920911
S. P. Foo, K. Siow, A. Jalar
Solder printing faces challenges in print definition and sustainable volume transfer as the microelectronic industry migrates to smaller footprints. Nano-sized alloy particles mitigate these issues by modifying the solder formulation and rheology. We propose an electrodeposition method using reverse microemulsion (without reducing agent) as electrolyte to synthesize Sn-Ag-Cu solder alloy nanoparticle. SnCl2.2H2O, Ag2SO4 and CuSO4 are used as the precursor. N-hexane, TritonX-100 and n-hexanol are used as oil phase, surfactant and co-surfactant, respectively. Three volume ratios of aqueous to surfactant phase, Wo are carried out namely: 0.20, 0.40 and 0.60 but only the ratio of 4.5:1.0 is able to synthesize the nano-sized SAC particles. Scanning electron microscopy shows the spherical SAC particles are well dispersed and their sizes range from 15 to 90 nm. X-ray diffraction spectra show the formation of Sn, Ag3Sn and Cu6Sn5 without any oxide peaks in the synthesized nanoparticles; their absence suggests the effectiveness of the surfactants in protecting the alloy particles from oxidation. This electrodeposition method compares favourably to the microemulsion (with reducing agent) method in producing spherical and well-distributed nanosized solder particles.
{"title":"Synthesizing SnAgCu nanoparticles by electrodeposition of reverse microemulsion electrolyte","authors":"S. P. Foo, K. Siow, A. Jalar","doi":"10.1109/SMELEC.2014.6920911","DOIUrl":"https://doi.org/10.1109/SMELEC.2014.6920911","url":null,"abstract":"Solder printing faces challenges in print definition and sustainable volume transfer as the microelectronic industry migrates to smaller footprints. Nano-sized alloy particles mitigate these issues by modifying the solder formulation and rheology. We propose an electrodeposition method using reverse microemulsion (without reducing agent) as electrolyte to synthesize Sn-Ag-Cu solder alloy nanoparticle. SnCl2.2H2O, Ag2SO4 and CuSO4 are used as the precursor. N-hexane, TritonX-100 and n-hexanol are used as oil phase, surfactant and co-surfactant, respectively. Three volume ratios of aqueous to surfactant phase, Wo are carried out namely: 0.20, 0.40 and 0.60 but only the ratio of 4.5:1.0 is able to synthesize the nano-sized SAC particles. Scanning electron microscopy shows the spherical SAC particles are well dispersed and their sizes range from 15 to 90 nm. X-ray diffraction spectra show the formation of Sn, Ag3Sn and Cu6Sn5 without any oxide peaks in the synthesized nanoparticles; their absence suggests the effectiveness of the surfactants in protecting the alloy particles from oxidation. This electrodeposition method compares favourably to the microemulsion (with reducing agent) method in producing spherical and well-distributed nanosized solder particles.","PeriodicalId":268203,"journal":{"name":"2014 IEEE International Conference on Semiconductor Electronics (ICSE2014)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131355413","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-10-13DOI: 10.1109/SMELEC.2014.6920867
M. Muhamad, N. Soin, H. Ramiah, N. Noh, C. W. Keat
This paper presents a technique that enables very accurate measurement for S-parameter of differential low noise amplifier by means of a standard two-port vector network analyzer (VNA). This technique involves by terminating two ports at one time while another two ports are measured. Accurate characterization of a two port device requires a four-port vector network analyzer, which might be not easily available. Thus, it is a common practice to terminate the two of the four ports to be used which the conventional/standard two port VNA. Even though the above approach is applicable but the reliability and conformity of the test method is still limited and uncertain. For verification, the measurement using four-port VNA have been conducted to test the devices S-parameters are accurately similar with the two port network. The fabricated on-wafer differential LNA structure was tested and measured with normal two-port VNA and also four-port VNA. By using this technique, there is no need to purchase a four-port VNA. By using this technique, any multi-port circuit network can be measured. The LNA has been implemented in RF 0.13um CMOS process. The differential LNA shows the measured performance in term of gain is equal to 17.4 dB. This give the percentage difference of 0.63 compared with measured using four-port VNA. The circuit consume only 9 mW power while dissipating 7.59mA from a 1.8 V supply. Generally, the measured results of the on-wafer fabricated differential LNA show good agreement for both set up.
{"title":"On-wafer scattering parameter characterization of differential four-port networks LNA using two-port vector network analyzer","authors":"M. Muhamad, N. Soin, H. Ramiah, N. Noh, C. W. Keat","doi":"10.1109/SMELEC.2014.6920867","DOIUrl":"https://doi.org/10.1109/SMELEC.2014.6920867","url":null,"abstract":"This paper presents a technique that enables very accurate measurement for S-parameter of differential low noise amplifier by means of a standard two-port vector network analyzer (VNA). This technique involves by terminating two ports at one time while another two ports are measured. Accurate characterization of a two port device requires a four-port vector network analyzer, which might be not easily available. Thus, it is a common practice to terminate the two of the four ports to be used which the conventional/standard two port VNA. Even though the above approach is applicable but the reliability and conformity of the test method is still limited and uncertain. For verification, the measurement using four-port VNA have been conducted to test the devices S-parameters are accurately similar with the two port network. The fabricated on-wafer differential LNA structure was tested and measured with normal two-port VNA and also four-port VNA. By using this technique, there is no need to purchase a four-port VNA. By using this technique, any multi-port circuit network can be measured. The LNA has been implemented in RF 0.13um CMOS process. The differential LNA shows the measured performance in term of gain is equal to 17.4 dB. This give the percentage difference of 0.63 compared with measured using four-port VNA. The circuit consume only 9 mW power while dissipating 7.59mA from a 1.8 V supply. Generally, the measured results of the on-wafer fabricated differential LNA show good agreement for both set up.","PeriodicalId":268203,"journal":{"name":"2014 IEEE International Conference on Semiconductor Electronics (ICSE2014)","volume":"156 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121086910","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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