Pub Date : 2014-12-01DOI: 10.1109/ICPCES.2014.7062817
Anuj Upadhyay, K. Pal
In this paper a voltage mode all pass filter has been presented. This filter uses only two resistors as passive components and one Differential Voltage Current Conveyor and an operational amplifier as active components. The pole of operational amplifier is used to realize the all pass transfer function. The introduction of operational amplifier pole eliminates the need of capacitor from the circuit, thus rendering the circuit suitable for integration. The PSPICE simulations show that circuit has an all pass response upto high frequency of 3 MHz and is capable of providing phase shift between 0° and -108°.
{"title":"A DVCC based voltage mode all pass filter using operational amplifier pole","authors":"Anuj Upadhyay, K. Pal","doi":"10.1109/ICPCES.2014.7062817","DOIUrl":"https://doi.org/10.1109/ICPCES.2014.7062817","url":null,"abstract":"In this paper a voltage mode all pass filter has been presented. This filter uses only two resistors as passive components and one Differential Voltage Current Conveyor and an operational amplifier as active components. The pole of operational amplifier is used to realize the all pass transfer function. The introduction of operational amplifier pole eliminates the need of capacitor from the circuit, thus rendering the circuit suitable for integration. The PSPICE simulations show that circuit has an all pass response upto high frequency of 3 MHz and is capable of providing phase shift between 0° and -108°.","PeriodicalId":337074,"journal":{"name":"2014 International Conference on Power, Control and Embedded Systems (ICPCES)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121430835","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICPCES.2014.7062813
V. C. Chittesh, S. Sreedharan, T. Joseph, P. Das, Sebin Joseph, J. Vishnu
Recent studies suggest that in medium and long terms, distributed solar photo-voltaic generator (SPVG) will become commercially so attractive that large-scale implementation of this type can be seen in many parts of the world. The increase in the amount of renewable energy will cause stability and security issues in power system. An effective method is used to find out the maximum allowable penetration of renewable energy, in this case Solar PV energy. IEEE 14 bus dynamic model is considered for conducting penetration analysis. Particle swarm optimization (PSO) based algorithm to find the optimal location and maximum penetration at the optimal location is proposed in this paper. Results present the maximum system penetration, optimal location and setting of SPVG, maximum safe bus loading beyond which system becomes unstable.
{"title":"PSO based optimal control for maximizing PV penetration","authors":"V. C. Chittesh, S. Sreedharan, T. Joseph, P. Das, Sebin Joseph, J. Vishnu","doi":"10.1109/ICPCES.2014.7062813","DOIUrl":"https://doi.org/10.1109/ICPCES.2014.7062813","url":null,"abstract":"Recent studies suggest that in medium and long terms, distributed solar photo-voltaic generator (SPVG) will become commercially so attractive that large-scale implementation of this type can be seen in many parts of the world. The increase in the amount of renewable energy will cause stability and security issues in power system. An effective method is used to find out the maximum allowable penetration of renewable energy, in this case Solar PV energy. IEEE 14 bus dynamic model is considered for conducting penetration analysis. Particle swarm optimization (PSO) based algorithm to find the optimal location and maximum penetration at the optimal location is proposed in this paper. Results present the maximum system penetration, optimal location and setting of SPVG, maximum safe bus loading beyond which system becomes unstable.","PeriodicalId":337074,"journal":{"name":"2014 International Conference on Power, Control and Embedded Systems (ICPCES)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116015834","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICPCES.2014.7062827
P. Singh, J. Samantaray, B. K. Roy, M. Ieee
In this paper, design of sliding mode control (SMC) based controller is proposed for anti-synchronization of Lorenz-Stenflo chaotic system. Anti-synchronization is achieved by using the SMC scheme and Lyapunov stability theory. A proportional-integral switching surface for sliding mode controller is proposed to ensure the stability of the closed-loop error dynamics in sliding motion. Proposed controller is effective and guarantees the occurrence of sliding motion and achieves the anti-synchronization of master and slave chaotic Lorenz-Stenflo systems. Simulation is performed to demonstrate the effectiveness of proposed control strategy. Simulation result reveals that proposed scheme is working satisfactorily.
{"title":"Anti-synchronization of Lorenz-Stenflo chaotic system using SMC","authors":"P. Singh, J. Samantaray, B. K. Roy, M. Ieee","doi":"10.1109/ICPCES.2014.7062827","DOIUrl":"https://doi.org/10.1109/ICPCES.2014.7062827","url":null,"abstract":"In this paper, design of sliding mode control (SMC) based controller is proposed for anti-synchronization of Lorenz-Stenflo chaotic system. Anti-synchronization is achieved by using the SMC scheme and Lyapunov stability theory. A proportional-integral switching surface for sliding mode controller is proposed to ensure the stability of the closed-loop error dynamics in sliding motion. Proposed controller is effective and guarantees the occurrence of sliding motion and achieves the anti-synchronization of master and slave chaotic Lorenz-Stenflo systems. Simulation is performed to demonstrate the effectiveness of proposed control strategy. Simulation result reveals that proposed scheme is working satisfactorily.","PeriodicalId":337074,"journal":{"name":"2014 International Conference on Power, Control and Embedded Systems (ICPCES)","volume":"80 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132328281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICPCES.2014.7062828
D. Manchanda, P. Goyal, N. Khanna
This paper focuses on designing an online feedback management system that collects data in the form of suggestions, ratings and comments, and applies machine learning capabilities to automatically extract relevant summaries of the suggestions posted in this automated suggestion system. We have analyzed two key requirements, anonymous feedback and credible feedback, to gain insight on the submitted "suggestions" as for how to improve an organization, a course, or any decision involving evolutionary system. These two highly desirable requirements are kind of contradictory since it is perhaps a rather obvious point that unless we know the person how will we know the credibility of his/her feedback - simultaneously addressing both of these requirements is the key research contribution of this paper. The proposed system will help in ensuring the anonymity as well as credibility of the feedback and automatic identification of relevant summaries of suggestions with minimal human endeavor during training phase.
{"title":"An online feedback systemfor anonymous and credible feedback identification","authors":"D. Manchanda, P. Goyal, N. Khanna","doi":"10.1109/ICPCES.2014.7062828","DOIUrl":"https://doi.org/10.1109/ICPCES.2014.7062828","url":null,"abstract":"This paper focuses on designing an online feedback management system that collects data in the form of suggestions, ratings and comments, and applies machine learning capabilities to automatically extract relevant summaries of the suggestions posted in this automated suggestion system. We have analyzed two key requirements, anonymous feedback and credible feedback, to gain insight on the submitted \"suggestions\" as for how to improve an organization, a course, or any decision involving evolutionary system. These two highly desirable requirements are kind of contradictory since it is perhaps a rather obvious point that unless we know the person how will we know the credibility of his/her feedback - simultaneously addressing both of these requirements is the key research contribution of this paper. The proposed system will help in ensuring the anonymity as well as credibility of the feedback and automatic identification of relevant summaries of suggestions with minimal human endeavor during training phase.","PeriodicalId":337074,"journal":{"name":"2014 International Conference on Power, Control and Embedded Systems (ICPCES)","volume":"66 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131562454","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICPCES.2014.7062796
K. Kumar, Chittineni Sahithi, R. Sahoo, S. K. Sahoo
After the invention of the MOSFET, continuous scaling of the device is going on as predicted by Moore in 1970. This reduction in device size is giving higher performance in terms of increased speed, lower power consumption at lower cost with greater chip density. At the same time, because of the scaling, the channel length is decreasing continuously leading to short-channel effects (SCE) in nanoscale regime. To overcome these limitations many alternate devices are proposed. Among these various alternative devices, carbon nanotube field effect transistor (CNTFET) is found to be one of the most promising alternatives for MOSFET. The CNTFET is a field effect transistor in which a carbon nanotube (CNT) is used in the channel region. In this paper we have used CNTFETs for designing a 10 transistor adder circuit, from which power, delay and power delay products are calculated. We have then calculated all these performance parameters for CMOS logic and compared the results with that obtained for CNTFET logic. The comparison shows circuits using CNTFET consumes almost 80 percent less power compared to its CMOS counterpart and hence advantageous over CMOS design.
{"title":"Ultra low power full adder circuit using carbon nanotube field effect transistor","authors":"K. Kumar, Chittineni Sahithi, R. Sahoo, S. K. Sahoo","doi":"10.1109/ICPCES.2014.7062796","DOIUrl":"https://doi.org/10.1109/ICPCES.2014.7062796","url":null,"abstract":"After the invention of the MOSFET, continuous scaling of the device is going on as predicted by Moore in 1970. This reduction in device size is giving higher performance in terms of increased speed, lower power consumption at lower cost with greater chip density. At the same time, because of the scaling, the channel length is decreasing continuously leading to short-channel effects (SCE) in nanoscale regime. To overcome these limitations many alternate devices are proposed. Among these various alternative devices, carbon nanotube field effect transistor (CNTFET) is found to be one of the most promising alternatives for MOSFET. The CNTFET is a field effect transistor in which a carbon nanotube (CNT) is used in the channel region. In this paper we have used CNTFETs for designing a 10 transistor adder circuit, from which power, delay and power delay products are calculated. We have then calculated all these performance parameters for CMOS logic and compared the results with that obtained for CNTFET logic. The comparison shows circuits using CNTFET consumes almost 80 percent less power compared to its CMOS counterpart and hence advantageous over CMOS design.","PeriodicalId":337074,"journal":{"name":"2014 International Conference on Power, Control and Embedded Systems (ICPCES)","volume":"46 3","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132767122","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICPCES.2014.7062807
Umesh Sen, Narendra Kumar
This paper highlights the Control performance analysis of two area-interconnected thermal systems with and without considering battery energy storage (BES) system while subjected to 1 percentage step load disturbance. The model's two area-interconnected systems are simulated through Matlab's Simulink software. Study has been carried out by considering optimization of integral controller by Integral Square Error (ISE) method. Study results revealed that BES improves the dynamic performance of two area interconnected power systems.
{"title":"Load frequency control with battery energy storage system","authors":"Umesh Sen, Narendra Kumar","doi":"10.1109/ICPCES.2014.7062807","DOIUrl":"https://doi.org/10.1109/ICPCES.2014.7062807","url":null,"abstract":"This paper highlights the Control performance analysis of two area-interconnected thermal systems with and without considering battery energy storage (BES) system while subjected to 1 percentage step load disturbance. The model's two area-interconnected systems are simulated through Matlab's Simulink software. Study has been carried out by considering optimization of integral controller by Integral Square Error (ISE) method. Study results revealed that BES improves the dynamic performance of two area interconnected power systems.","PeriodicalId":337074,"journal":{"name":"2014 International Conference on Power, Control and Embedded Systems (ICPCES)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124034552","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICPCES.2014.7062820
Sreenivasulu Ummadisetty, Bibhudatta Biswal, S. S. Ray
Cardiac malfunctioning is the leading cause of mortality and morbidity today. ECG (Electrocardiogram) and Phonocardiogram, are the two major ways to diagnose the cardiac pathology. ECG can find out defects related to heart electrical activity, Phonocardiogram can find out acoustic information in blood flowing pathway. So, a real time integrated ECG & Phonocardiogram system will give more information about heart. This paper discusses the development of an electronic system that records both electrical activity and heart sounds for better diagnosis of heart pathology. Heart sounds were obtained using a condenser microphone (acted as a transducer) insulated from its surroundings and electrical signals were obtained using surface electrodes. The heart sounds and ECG signals have been amplified and filtered independently of each other. Data acquisition system sends the signals with baud rate of 19200 to the PC. A MATLAB program is written to plot amplitude and powerspectral on a time and frequency varying scale respectively. Further analysis is underway to extract more information from this low cost integrative ECG and Phonocardiogram system. In future this system could be used for telemedicine purpose.
{"title":"A portable system for simultaneous acquisition of ECG and PCG in real time","authors":"Sreenivasulu Ummadisetty, Bibhudatta Biswal, S. S. Ray","doi":"10.1109/ICPCES.2014.7062820","DOIUrl":"https://doi.org/10.1109/ICPCES.2014.7062820","url":null,"abstract":"Cardiac malfunctioning is the leading cause of mortality and morbidity today. ECG (Electrocardiogram) and Phonocardiogram, are the two major ways to diagnose the cardiac pathology. ECG can find out defects related to heart electrical activity, Phonocardiogram can find out acoustic information in blood flowing pathway. So, a real time integrated ECG & Phonocardiogram system will give more information about heart. This paper discusses the development of an electronic system that records both electrical activity and heart sounds for better diagnosis of heart pathology. Heart sounds were obtained using a condenser microphone (acted as a transducer) insulated from its surroundings and electrical signals were obtained using surface electrodes. The heart sounds and ECG signals have been amplified and filtered independently of each other. Data acquisition system sends the signals with baud rate of 19200 to the PC. A MATLAB program is written to plot amplitude and powerspectral on a time and frequency varying scale respectively. Further analysis is underway to extract more information from this low cost integrative ECG and Phonocardiogram system. In future this system could be used for telemedicine purpose.","PeriodicalId":337074,"journal":{"name":"2014 International Conference on Power, Control and Embedded Systems (ICPCES)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122867762","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICPCES.2014.7062832
M. Rai, R. K. Tripathi
The multilevel inverters are becoming highly popular in high power and medium voltage applications. This paper presents the method of reducing the THD in load current and voltage using a novel multilevel inverter topology. This novel topology uses less number of switches then the conventional multilevel inverters. The switching method used here is Selective Harmonic Elimination. A LC filter is used across the load to remove the higher order harmonics. The simulation is carried out for the 11 level multilevel inverter using the MATLAB/Simulink.
{"title":"A novel multilevel inverter topology with selective harmonic elimination technique","authors":"M. Rai, R. K. Tripathi","doi":"10.1109/ICPCES.2014.7062832","DOIUrl":"https://doi.org/10.1109/ICPCES.2014.7062832","url":null,"abstract":"The multilevel inverters are becoming highly popular in high power and medium voltage applications. This paper presents the method of reducing the THD in load current and voltage using a novel multilevel inverter topology. This novel topology uses less number of switches then the conventional multilevel inverters. The switching method used here is Selective Harmonic Elimination. A LC filter is used across the load to remove the higher order harmonics. The simulation is carried out for the 11 level multilevel inverter using the MATLAB/Simulink.","PeriodicalId":337074,"journal":{"name":"2014 International Conference on Power, Control and Embedded Systems (ICPCES)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117113433","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICPCES.2014.7062823
Vandana Shukla, O. Singh, G. Mishra, R. K. Tiwari
Encoder circuits are vital component of an electronic computer system. Encoders are generally used for the conversion of a 2" bit number into the n bit number. Applications of encoders can be visualized as keyboard encoder on widespread use. Design of an optimized encoder circuit with the concept of reversible logic is the main outcome of this research paper. The concept of reversible logic has become burgeoning tool for the designing of efficient digital circuits with low power dissipation. This paper provides a possible approaches to design a decimal to BCD encoder using reversible logic gates. Optimization of the circuit has been explored on the basis of minimization of some performance parameters such as number of reversible logic gates used in the designing, garbage outputs generated during the operation of the circuit and quantum cost of the circuit.
{"title":"A novel approach to design decimal to BCD encoder with reversible logic","authors":"Vandana Shukla, O. Singh, G. Mishra, R. K. Tiwari","doi":"10.1109/ICPCES.2014.7062823","DOIUrl":"https://doi.org/10.1109/ICPCES.2014.7062823","url":null,"abstract":"Encoder circuits are vital component of an electronic computer system. Encoders are generally used for the conversion of a 2\" bit number into the n bit number. Applications of encoders can be visualized as keyboard encoder on widespread use. Design of an optimized encoder circuit with the concept of reversible logic is the main outcome of this research paper. The concept of reversible logic has become burgeoning tool for the designing of efficient digital circuits with low power dissipation. This paper provides a possible approaches to design a decimal to BCD encoder using reversible logic gates. Optimization of the circuit has been explored on the basis of minimization of some performance parameters such as number of reversible logic gates used in the designing, garbage outputs generated during the operation of the circuit and quantum cost of the circuit.","PeriodicalId":337074,"journal":{"name":"2014 International Conference on Power, Control and Embedded Systems (ICPCES)","volume":"91 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127679257","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2014-12-01DOI: 10.1109/ICPCES.2014.7062818
Nitish Katal, Parvesh Kumar, S. Narayan
Nature inspired algorithms are among the most potent and robust algorithms for optimization for solving the real life problems. This paper introduces the Bat algorithm for the optimization based design of the PID controllers. The optimized PID controller has been implemented for liquid level control system which finds a wide application in petrochemical, food processing, and water treatment industries. The quality of control directly affects the quality of products and safety of the process. The simulations indicate the eminence of BA over classical methods of PID tuning.
{"title":"Optimal PID controller for coupled-tank liquid-level control system using bat algorithm","authors":"Nitish Katal, Parvesh Kumar, S. Narayan","doi":"10.1109/ICPCES.2014.7062818","DOIUrl":"https://doi.org/10.1109/ICPCES.2014.7062818","url":null,"abstract":"Nature inspired algorithms are among the most potent and robust algorithms for optimization for solving the real life problems. This paper introduces the Bat algorithm for the optimization based design of the PID controllers. The optimized PID controller has been implemented for liquid level control system which finds a wide application in petrochemical, food processing, and water treatment industries. The quality of control directly affects the quality of products and safety of the process. The simulations indicate the eminence of BA over classical methods of PID tuning.","PeriodicalId":337074,"journal":{"name":"2014 International Conference on Power, Control and Embedded Systems (ICPCES)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2014-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125636914","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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