This paper reports a pipelined architecture that can support on-line compression/decompression of image data. Spatial and spectral redundancy of an image data file is detected and removed with a simple and elegant scheme that can be easily implemented on a pipelined hardware. The scheme provides the user with the ability of trading off the image quality with the compression ratio. The basic theory of byte error correcting code (ECC) is employed in this work to compress a pixel row with reference to its adjacent row. A simple scheme is developed to encode pixel rows of a color image.
{"title":"On-line Colour Image Compression Based on Pipelined Architecture","authors":"A. Halder, D. Kole, S. Bhattacharjee","doi":"10.1109/ICCEE.2009.206","DOIUrl":"https://doi.org/10.1109/ICCEE.2009.206","url":null,"abstract":"This paper reports a pipelined architecture that can support on-line compression/decompression of image data. Spatial and spectral redundancy of an image data file is detected and removed with a simple and elegant scheme that can be easily implemented on a pipelined hardware. The scheme provides the user with the ability of trading off the image quality with the compression ratio. The basic theory of byte error correcting code (ECC) is employed in this work to compress a pixel row with reference to its adjacent row. A simple scheme is developed to encode pixel rows of a color image.","PeriodicalId":343870,"journal":{"name":"2009 Second International Conference on Computer and Electrical Engineering","volume":"1 8","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114018373","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Cryptarithmetic is a class of constraint satisfaction problems which includes making mathematical relations between meaningful words using simple arithmetic operators like ‘plus’ in a way that the result is conceptually true, and assigning digits to the letters of these words and generating numbers in order to make correct arithmetic operations as well. A simple way to solve such problems is by depth first search (DFS) algorithm which has a big search space even for quite small problems. In this paper we proposed a solution to this problem with genetic algorithm and then optimized it by using parallelism. We also showed that the algorithm reaches a solution faster and in a smaller number of iterations than similar algorithms.
密码学是一类约束满足问题，它包括使用简单的算术运算符，如“加号”，在有意义的单词之间建立数学关系，使结果在概念上是正确的，并为这些单词的字母分配数字，并生成数字，以便进行正确的算术运算。解决这类问题的一种简单方法是采用深度优先搜索(deep first search, DFS)算法，该算法即使对于相当小的问题也有很大的搜索空间。本文提出了用遗传算法解决该问题的方法，并利用并行性对其进行了优化。我们还表明，该算法比类似的算法更快，迭代次数更少。
{"title":"Solving Cryptarithmetic Problems Using Parallel Genetic Algorithm","authors":"Reza Abbasian, M. Mazloom","doi":"10.1109/ICCEE.2009.25","DOIUrl":"https://doi.org/10.1109/ICCEE.2009.25","url":null,"abstract":"Cryptarithmetic is a class of constraint satisfaction problems which includes making mathematical relations between meaningful words using simple arithmetic operators like ‘plus’ in a way that the result is conceptually true, and assigning digits to the letters of these words and generating numbers in order to make correct arithmetic operations as well. A simple way to solve such problems is by depth first search (DFS) algorithm which has a big search space even for quite small problems. In this paper we proposed a solution to this problem with genetic algorithm and then optimized it by using parallelism. We also showed that the algorithm reaches a solution faster and in a smaller number of iterations than similar algorithms.","PeriodicalId":343870,"journal":{"name":"2009 Second International Conference on Computer and Electrical Engineering","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125595742","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Model Driven Development and Use Case Driven Development methodologies have inspired the proposal of a variety of software engineering approaches that synthesize state based models from scenario-based models. Solving the problem of synthesis for open reactive systems is an inherently difficult problem. In various settings the problem is undecidable, and even in more restricted settings when it becomes decidable, the time and space requirements of the synthesis algorithm may be too large to be practical for large systems. This research presents a new approach to define algorithms of synthesis technique. This approach is based on an ordered sequence of stage for executing the scenarios. It is important to consider the executing stages of a scenario as a sequence. This gives a lot of information about execution of a scenario. Many synthesis approaches address the running stages of a scenario as a single stage. The mathematical foundation presented for this ordered sequence is based on RUN in Live Sequence Chart method presented by Harel. We believe that our mathematical foundation would significantly reduce the complexity of synthesis technique. We show that our approach have some advantages over those of others’; in particular, our mathematical basis to define algorithms for constructing synthesis technique is very efficient.
{"title":"A New Mathematical Approach for Synthesis of State Based Models from Scenario Based Models","authors":"Y. G. Bonab, A. Isazadeh","doi":"10.1109/ICCEE.2009.64","DOIUrl":"https://doi.org/10.1109/ICCEE.2009.64","url":null,"abstract":"Model Driven Development and Use Case Driven Development methodologies have inspired the proposal of a variety of software engineering approaches that synthesize state based models from scenario-based models. Solving the problem of synthesis for open reactive systems is an inherently difficult problem. In various settings the problem is undecidable, and even in more restricted settings when it becomes decidable, the time and space requirements of the synthesis algorithm may be too large to be practical for large systems. This research presents a new approach to define algorithms of synthesis technique. This approach is based on an ordered sequence of stage for executing the scenarios. It is important to consider the executing stages of a scenario as a sequence. This gives a lot of information about execution of a scenario. Many synthesis approaches address the running stages of a scenario as a single stage. The mathematical foundation presented for this ordered sequence is based on RUN in Live Sequence Chart method presented by Harel. We believe that our mathematical foundation would significantly reduce the complexity of synthesis technique. We show that our approach have some advantages over those of others’; in particular, our mathematical basis to define algorithms for constructing synthesis technique is very efficient.","PeriodicalId":343870,"journal":{"name":"2009 Second International Conference on Computer and Electrical Engineering","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126597792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
With the development of educational technology, more and more modern science and technology begins to be applied in teaching and training. Based on introduction of the definition and characters of virtual reality (VR) technology, the VR technology was introduced into the field of teaching and training. The application circumstance of VR in teaching and training was also discussed. Using VR technology, some kind of communication vehicle operation training system was designed. The key problems for operation environment construction, modeling and system running of the teaching and training system were also provided. The research not only offer novel idea for the construction of communication equipment operation training system, but also provide reference for the application of VR technology in others fields.
{"title":"Research on Application of Virtual Reality Technology in Teaching and Training","authors":"Shuang Li","doi":"10.1109/ICCEE.2009.22","DOIUrl":"https://doi.org/10.1109/ICCEE.2009.22","url":null,"abstract":"With the development of educational technology, more and more modern science and technology begins to be applied in teaching and training. Based on introduction of the definition and characters of virtual reality (VR) technology, the VR technology was introduced into the field of teaching and training. The application circumstance of VR in teaching and training was also discussed. Using VR technology, some kind of communication vehicle operation training system was designed. The key problems for operation environment construction, modeling and system running of the teaching and training system were also provided. The research not only offer novel idea for the construction of communication equipment operation training system, but also provide reference for the application of VR technology in others fields.","PeriodicalId":343870,"journal":{"name":"2009 Second International Conference on Computer and Electrical Engineering","volume":"120 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131052630","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Image data taken with various capturing devices are usually multidimensional and therefore they are not very suitable for accurate classification normally expecting to operate only on a small set of relevant features. Locally Linear Embedding is an effective nonlinear dimensionality reduction method for exploring the intrinsic characteristics of high dimensional data. In this paper, novel Local linear embedding for face classification is proposed. We modify the LLE algorithm by preserving more geometrical knowledge of the high-dimensional data, then combining with simple classifiers such as the nearest mean classifier. Experimental simulations are shown to yield remarkably good classification results in high dimension face image sequence.
{"title":"Research of Face Recognition Based on Locally Linear Embedding","authors":"Cuihong Zhou, Gelan Yang","doi":"10.1109/ICCEE.2009.130","DOIUrl":"https://doi.org/10.1109/ICCEE.2009.130","url":null,"abstract":"Image data taken with various capturing devices are usually multidimensional and therefore they are not very suitable for accurate classification normally expecting to operate only on a small set of relevant features. Locally Linear Embedding is an effective nonlinear dimensionality reduction method for exploring the intrinsic characteristics of high dimensional data. In this paper, novel Local linear embedding for face classification is proposed. We modify the LLE algorithm by preserving more geometrical knowledge of the high-dimensional data, then combining with simple classifiers such as the nearest mean classifier. Experimental simulations are shown to yield remarkably good classification results in high dimension face image sequence.","PeriodicalId":343870,"journal":{"name":"2009 Second International Conference on Computer and Electrical Engineering","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130721097","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper describes a CMOS LNA utilizing a folded cascade architecture for GPS front-end receiver in a TSMC 0.18-µm process. The Major Problem in the LNAs with folded cascade architecture is low reversing isolation. In this paper this parameter is improved by adding a transistor. The power gain and the minimal Noise Figure (NF) are two important factors for the circuits. Besides those factors, good linearity, input impedance matching, low supply voltage and the lower power consumption are also desired. The proposed LNA achieves a small signal gain of 23.1 dB. The LNA acquires an NF of 2.1 dB with an input return loss of -14dB and an output return loss of -14 dB. Total Power consumption is only 2.6mW from a 0.6v supply voltage.
{"title":"A 0.6v Ultra-High-Gain Ultra-Low-Power CMOS LNA at 1.5GHz in 0.18µm Technology","authors":"E. Kargaran, H. Kargaran, H. Nabovati","doi":"10.1109/ICCEE.2009.190","DOIUrl":"https://doi.org/10.1109/ICCEE.2009.190","url":null,"abstract":"This paper describes a CMOS LNA utilizing a folded cascade architecture for GPS front-end receiver in a TSMC 0.18-µm process. The Major Problem in the LNAs with folded cascade architecture is low reversing isolation. In this paper this parameter is improved by adding a transistor. The power gain and the minimal Noise Figure (NF) are two important factors for the circuits. Besides those factors, good linearity, input impedance matching, low supply voltage and the lower power consumption are also desired. The proposed LNA achieves a small signal gain of 23.1 dB. The LNA acquires an NF of 2.1 dB with an input return loss of -14dB and an output return loss of -14 dB. Total Power consumption is only 2.6mW from a 0.6v supply voltage.","PeriodicalId":343870,"journal":{"name":"2009 Second International Conference on Computer and Electrical Engineering","volume":"43 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132900829","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Nowadays, most enterprises use web services as a framework for facilitating application-to-application interaction within and across them. Describing behaviour of web services is becoming more and more important. This behaviour can be described by timed business protocols representing the possible sequences of message exchanges. Studying the behaviour of web services by analyzing their timed business protocols is the main contribution of this work. This paper introduces notions of compatibility and replaceability w.r.t. timed business protocols together with the corresponding verification algorithms.
{"title":"Compatibility and Replaceability Analysis of Timed Web Services Protocols","authors":"Emad Elabd, E. Coquery, Mohand-Said Hacid","doi":"10.1109/ICCEE.2009.106","DOIUrl":"https://doi.org/10.1109/ICCEE.2009.106","url":null,"abstract":"Nowadays, most enterprises use web services as a framework for facilitating application-to-application interaction within and across them. Describing behaviour of web services is becoming more and more important. This behaviour can be described by timed business protocols representing the possible sequences of message exchanges. Studying the behaviour of web services by analyzing their timed business protocols is the main contribution of this work. This paper introduces notions of compatibility and replaceability w.r.t. timed business protocols together with the corresponding verification algorithms.","PeriodicalId":343870,"journal":{"name":"2009 Second International Conference on Computer and Electrical Engineering","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133172177","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The idea is to separate application programs from the various aspects of concurrency, distribution and its communication infrastructure. Automatic Distribution of computationally intensive object oriented programs is one of the active research areas. In this paper, a method for distributing application programs over a network is presented. We use a genetic clustering algorithm to detect mostly connected classes, in a class dependency graph. Each cluster may be deployed in a station across a network and communicate with the other stations via CORBA middleware. Something that distinguishes our environment from the existing ones is the support for automatic exploitation of inherent concurrency in inter-object communications and for non-blocking interactions between objects in different clusters over CORBA event channels.
{"title":"Designing a Framework for Distributing Serial Applications","authors":"V. Rafe","doi":"10.1109/ICCEE.2009.224","DOIUrl":"https://doi.org/10.1109/ICCEE.2009.224","url":null,"abstract":"The idea is to separate application programs from the various aspects of concurrency, distribution and its communication infrastructure. Automatic Distribution of computationally intensive object oriented programs is one of the active research areas. In this paper, a method for distributing application programs over a network is presented. We use a genetic clustering algorithm to detect mostly connected classes, in a class dependency graph. Each cluster may be deployed in a station across a network and communicate with the other stations via CORBA middleware. Something that distinguishes our environment from the existing ones is the support for automatic exploitation of inherent concurrency in inter-object communications and for non-blocking interactions between objects in different clusters over CORBA event channels.","PeriodicalId":343870,"journal":{"name":"2009 Second International Conference on Computer and Electrical Engineering","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127808580","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The paper describes a computational system that is composed of a special-purpose processor augmented by an application-targeted coprocessor with variable instruction set. The primary objective is to form the processor architecture in such a way that is the most appropriate to a selected scope of applications and to optimize instructions of the coprocessor for a particular application. As an example the scope of combinatorial search algorithms was examined and experiments were carried out and analyzed with the relevant system implemented in FPGAs.
{"title":"Design and Implementation of Communicating Fixed and Variable Instruction Set Processors","authors":"V. Sklyarov, I. Skliarova, J. F. Lima","doi":"10.1109/ICCEE.2009.238","DOIUrl":"https://doi.org/10.1109/ICCEE.2009.238","url":null,"abstract":"The paper describes a computational system that is composed of a special-purpose processor augmented by an application-targeted coprocessor with variable instruction set. The primary objective is to form the processor architecture in such a way that is the most appropriate to a selected scope of applications and to optimize instructions of the coprocessor for a particular application. As an example the scope of combinatorial search algorithms was examined and experiments were carried out and analyzed with the relevant system implemented in FPGAs.","PeriodicalId":343870,"journal":{"name":"2009 Second International Conference on Computer and Electrical Engineering","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131262842","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
"Malware" is an umbrella term that describes a variety of Internet-borne threats, including viruses, spyware,Trojan horses, spam, bots and more. This sophisticated and evolving security threat puts all businesses at risk, no matter how big or small. Malware creates unique challenges to Higher Learning Institutions (HLI) in protecting their information assets. This is largely due to the fact that HLI Information Technology (IT) departments must balance between enabling a highly collaborative, non-restrictive environment and ensuring the confidentiality, integrity, and availability of data and computing resources. HLIs can proactively defend the network to reduce the risks associated with this threat by assessing the vulnerabilities and threats present in their networks and implementing appropriate multilayer security. A multilayer approach involves applying countermeasures at every layer of the computer network, from the perimeter routers and firewalls to users' personal computers in order to increase network security. The goal of this study is to propose a framework for network security protection against malware to increase the level of protection using non technical countermeasures.
{"title":"Managing Malware in Higher Learning Institutions","authors":"Z. Ismail, Christine Simfukwe","doi":"10.1109/ICCEE.2009.93","DOIUrl":"https://doi.org/10.1109/ICCEE.2009.93","url":null,"abstract":"\"Malware\" is an umbrella term that describes a variety of Internet-borne threats, including viruses, spyware,Trojan horses, spam, bots and more. This sophisticated and evolving security threat puts all businesses at risk, no matter how big or small. Malware creates unique challenges to Higher Learning Institutions (HLI) in protecting their information assets. This is largely due to the fact that HLI Information Technology (IT) departments must balance between enabling a highly collaborative, non-restrictive environment and ensuring the confidentiality, integrity, and availability of data and computing resources. HLIs can proactively defend the network to reduce the risks associated with this threat by assessing the vulnerabilities and threats present in their networks and implementing appropriate multilayer security. A multilayer approach involves applying countermeasures at every layer of the computer network, from the perimeter routers and firewalls to users' personal computers in order to increase network security. The goal of this study is to propose a framework for network security protection against malware to increase the level of protection using non technical countermeasures.","PeriodicalId":343870,"journal":{"name":"2009 Second International Conference on Computer and Electrical Engineering","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-28","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124107685","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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