Pub Date : 1978-10-01DOI: 10.1049/IJ-CDT.1978.0043
I. Aleksander
This paper investigates some properties of combinational digital networks for which the elements are capable of performing many functions (mainly all the logical functions) of their input variables. Networks designed with large-scale integrated circuits such as read-only memories or programmed-logicarrays fall into this category. Central to the investigation are concepts of the universality of parts of the network, the range of functions that can be achieved by a given network, and the redundancy of some networks. On the question of range, a notation and the algebra which this implies are described. A case study is given in the Appendix to illustrate the way in which the formalisms discussed in this paper interact with intuitive design.
{"title":"Structure/function considerations for digital systems that contain polyfunctional elements","authors":"I. Aleksander","doi":"10.1049/IJ-CDT.1978.0043","DOIUrl":"https://doi.org/10.1049/IJ-CDT.1978.0043","url":null,"abstract":"This paper investigates some properties of combinational digital networks for which the elements are capable of performing many functions (mainly all the logical functions) of their input variables. Networks designed with large-scale integrated circuits such as read-only memories or programmed-logicarrays fall into this category. Central to the investigation are concepts of the universality of parts of the network, the range of functions that can be achieved by a given network, and the redundancy of some networks. On the question of range, a notation and the algebra which this implies are described. A case study is given in the Appendix to illustrate the way in which the formalisms discussed in this paper interact with intuitive design.","PeriodicalId":344610,"journal":{"name":"Iee Journal on Computers and Digital Techniques","volume":"55 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114887799","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Transform methods and dyadic groups have been used for the classification of Boolean functions as well as for prime implicant determination. In a recent paper a prime implicant extraction method, based on Walsh-Hadamard transform methods, was presented. It processes the true minterms of the function separately, one at a time. In this paper this transform method is applied to the covering problem. Taking the prime implicants as binary variables a slight modification of the prime-implicant extraction method allows one to identify all complete covers by inspecting the elements of an inverse transform. Redundant forms can be detected and rejected easily. Another method for the determination of all irredundant covers classifies the 2m elements of the dyadic group of element length m as incomplete, redundant or irredundant covers, m beingthe number of prime implicants. A version for hand-worked problems is given, as well as a computer-oriented version.
{"title":"Determination of the irredundant forms of a Boolean function using Walsh-Hadamard analysis and dyadic groups","authors":"P. Besslich","doi":"10.1049/IJ-CDT:19780041","DOIUrl":"https://doi.org/10.1049/IJ-CDT:19780041","url":null,"abstract":"Transform methods and dyadic groups have been used for the classification of Boolean functions as well as for prime implicant determination. In a recent paper a prime implicant extraction method, based on Walsh-Hadamard transform methods, was presented. It processes the true minterms of the function separately, one at a time. In this paper this transform method is applied to the covering problem. Taking the prime implicants as binary variables a slight modification of the prime-implicant extraction method allows one to identify all complete covers by inspecting the elements of an inverse transform. Redundant forms can be detected and rejected easily. Another method for the determination of all irredundant covers classifies the 2m elements of the dyadic group of element length m as incomplete, redundant or irredundant covers, m beingthe number of prime implicants. A version for hand-worked problems is given, as well as a computer-oriented version.","PeriodicalId":344610,"journal":{"name":"Iee Journal on Computers and Digital Techniques","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122027402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1978-10-01DOI: 10.1049/IJ-CDT.1978.0047
G. Lockhart
It is shown that binary sequences having prescribed spectral properties may be designed by an optimisation procedure based on a delta-modulation algorithm. The method is specifically applied to the design of lowpass sequences of lengths 128,256 and 512 bits which, after a simple integration process, exhibit spectral properties related to type-2 nonrecursive-digital-filter impulse responses. Highpass sequences can be obtained by a simple transformation. The limitations of the procedure and the implications of quantisation error are discussed. A theoretical prediction is obtained for the smallest sequence length necessary to achieve a given spectral bandwidth. Applications include digital filters, which can be simply implemented by digital hardware performing primitive arithmetic operations.
{"title":"Design and application of binary sequences with optimised lowpass properties","authors":"G. Lockhart","doi":"10.1049/IJ-CDT.1978.0047","DOIUrl":"https://doi.org/10.1049/IJ-CDT.1978.0047","url":null,"abstract":"It is shown that binary sequences having prescribed spectral properties may be designed by an optimisation procedure based on a delta-modulation algorithm. The method is specifically applied to the design of lowpass sequences of lengths 128,256 and 512 bits which, after a simple integration process, exhibit spectral properties related to type-2 nonrecursive-digital-filter impulse responses. Highpass sequences can be obtained by a simple transformation. The limitations of the procedure and the implications of quantisation error are discussed. A theoretical prediction is obtained for the smallest sequence length necessary to achieve a given spectral bandwidth. Applications include digital filters, which can be simply implemented by digital hardware performing primitive arithmetic operations.","PeriodicalId":344610,"journal":{"name":"Iee Journal on Computers and Digital Techniques","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129820088","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A technique is developed which is of use in conditioning computer-graphics models to assist hidden-surface removal. The general approach is to consider only surfaces in the proximity of other surfaces and, where necessary, to modify the representation at the model creation stage. When this is done, the resulting representation allows rapid surface ordering without the need for complex geometric calculations. The computation required at the picture-generation stage is very small, so that real-time hidden-surface removal is feasible.
{"title":"Proximity techniques for hiddensurface removal","authors":"P. Willis","doi":"10.1049/IJ-CDT:19780044","DOIUrl":"https://doi.org/10.1049/IJ-CDT:19780044","url":null,"abstract":"A technique is developed which is of use in conditioning computer-graphics models to assist hidden-surface removal. The general approach is to consider only surfaces in the proximity of other surfaces and, where necessary, to modify the representation at the model creation stage. When this is done, the resulting representation allows rapid surface ordering without the need for complex geometric calculations. The computation required at the picture-generation stage is very small, so that real-time hidden-surface removal is feasible.","PeriodicalId":344610,"journal":{"name":"Iee Journal on Computers and Digital Techniques","volume":"270 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-10-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115834608","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper describes a block-diagram language approach to programming microcomputers as realtime control networks. The method uses a macro set constrained to cycle as a logic processor and is designed to be assembled on a general purpose macrogenerator for a variety of microprocessors.
{"title":"A block-diagram language approach to the design of microprocessor-based real-time controllers","authors":"A. Dickie","doi":"10.1049/IJ-CDT:19780025","DOIUrl":"https://doi.org/10.1049/IJ-CDT:19780025","url":null,"abstract":"This paper describes a block-diagram language approach to programming microcomputers as realtime control networks. The method uses a macro set constrained to cycle as a logic processor and is designed to be assembled on a general purpose macrogenerator for a variety of microprocessors.","PeriodicalId":344610,"journal":{"name":"Iee Journal on Computers and Digital Techniques","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123153753","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Conference report. Software engineering for telecommunication switching systems","authors":"J. Garrett","doi":"10.1049/IJ-CDT:19780022","DOIUrl":"https://doi.org/10.1049/IJ-CDT:19780022","url":null,"abstract":"","PeriodicalId":344610,"journal":{"name":"Iee Journal on Computers and Digital Techniques","volume":"93 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126216417","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Erratum: Multiple bridging faults in monotone networks","authors":"A. Vogel","doi":"10.1049/ij-cdt:19780024","DOIUrl":"https://doi.org/10.1049/ij-cdt:19780024","url":null,"abstract":"","PeriodicalId":344610,"journal":{"name":"Iee Journal on Computers and Digital Techniques","volume":"78 2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128381207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1978-08-01DOI: 10.1049/IJ-CDT.1978.0029
J. Gosling, M. Dabić
The development of uncommitted logic arrays in e.c.l. has led to the consideration of the most suitable type of cell and its organisation. This paper discusses the factors involved in the choice of a suitable circuit configuration for such a cell. Multilevel long tailed pair trees are compared with a single-level circuit. It is shown that the multilevel arrangement has advantages of less power dissipation and a need for only one phase of the input signals. There is frequently also some speed advantage, though this is dependent on the particular circuit adopted, and may be non-existent.
{"title":"Some considerations in the circuit design of large-scale e.c.l. arrays","authors":"J. Gosling, M. Dabić","doi":"10.1049/IJ-CDT.1978.0029","DOIUrl":"https://doi.org/10.1049/IJ-CDT.1978.0029","url":null,"abstract":"The development of uncommitted logic arrays in e.c.l. has led to the consideration of the most suitable type of cell and its organisation. This paper discusses the factors involved in the choice of a suitable circuit configuration for such a cell. Multilevel long tailed pair trees are compared with a single-level circuit. It is shown that the multilevel arrangement has advantages of less power dissipation and a need for only one phase of the input signals. There is frequently also some speed advantage, though this is dependent on the particular circuit adopted, and may be non-existent.","PeriodicalId":344610,"journal":{"name":"Iee Journal on Computers and Digital Techniques","volume":"279 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115117590","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A model-making machine has been developed as part of a project on computer-aided design and manufacture. In order to accurately machine the complex three-dimensional surfaces which are designed by these methods the machine has been provided with a microprocessor-based control system. This accepts data in a compact form on paper tape and controls the operation of three stepping motors which drive the machine axes. The microprocessor provides linear interpolation and other control functions. Few problems were experienced during development: the most recalcitrant being electrical noise. The microprocessor has proved a cheap, reliable and easily developed control system for the machine.
{"title":"Development of microprocessor control of a model-making machine","authors":"D. Haworth, P. Purssell, M. F. Hessey","doi":"10.1049/IJ-CDT:19780023","DOIUrl":"https://doi.org/10.1049/IJ-CDT:19780023","url":null,"abstract":"A model-making machine has been developed as part of a project on computer-aided design and manufacture. In order to accurately machine the complex three-dimensional surfaces which are designed by these methods the machine has been provided with a microprocessor-based control system. This accepts data in a compact form on paper tape and controls the operation of three stepping motors which drive the machine axes. The microprocessor provides linear interpolation and other control functions. Few problems were experienced during development: the most recalcitrant being electrical noise. The microprocessor has proved a cheap, reliable and easily developed control system for the machine.","PeriodicalId":344610,"journal":{"name":"Iee Journal on Computers and Digital Techniques","volume":"61 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115713018","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
{"title":"Book review: Microprocessors: Fundamentals and Applications","authors":"W. Simmonds","doi":"10.1049/ij-cdt:19780028","DOIUrl":"https://doi.org/10.1049/ij-cdt:19780028","url":null,"abstract":"","PeriodicalId":344610,"journal":{"name":"Iee Journal on Computers and Digital Techniques","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1978-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122835416","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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