Pub Date : 2009-12-01DOI: 10.1109/EDAPS.2009.5404011
Zhe Song, K. Zheng, Houxing Zhou, Jun Hu, W. Hong
In this paper, based on the frequency-varied relationship between surface wave poles and leaky wave poles of spectral Green's functions for a layered medium, a new method for fast locating the leaky wave poles at the given operating frequency is established. This method locates the leaky wave poles at the given operating frequency by consecutive frequency perturbations with the surface wave poles at a proper frequency as starting poles. Numerical examples of this method applied in the combination with the discrete complex image method (DCIM) for evaluation of the Green's functions of microstrip and 2-layered medium models demonstrate the efficiency and accuracy of this method.
{"title":"A method of locating leaky wave poles of spectral Green's functions for a layered medium by consecutive frequency perturbation","authors":"Zhe Song, K. Zheng, Houxing Zhou, Jun Hu, W. Hong","doi":"10.1109/EDAPS.2009.5404011","DOIUrl":"https://doi.org/10.1109/EDAPS.2009.5404011","url":null,"abstract":"In this paper, based on the frequency-varied relationship between surface wave poles and leaky wave poles of spectral Green's functions for a layered medium, a new method for fast locating the leaky wave poles at the given operating frequency is established. This method locates the leaky wave poles at the given operating frequency by consecutive frequency perturbations with the surface wave poles at a proper frequency as starting poles. Numerical examples of this method applied in the combination with the discrete complex image method (DCIM) for evaluation of the Green's functions of microstrip and 2-layered medium models demonstrate the efficiency and accuracy of this method.","PeriodicalId":370741,"journal":{"name":"2009 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS)","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125684016","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-01DOI: 10.1109/EDAPS.2009.5403983
Liang Zhou, W. Yin, J. Mao
This paper presents a substrate integrated dielectric resonators utilizing multilayer printed circuit boards (PCB) for high performance microwave system-on-package applications such as low phase noise oscillators. Via posts are used as for tightly confining electromagnetic energy as a metallic boundary wall so as the dielectric puck could be integrated into the multilayer PCB. The simulated results show that the resonator resonances at TE01δ mode with a frequency at Ku band. The unloaded Q of the dielectric resonator is around 14,000 at the operating frequency. However, because of the limitation of the height between of the resonator in the multilayer PCB, conductive loss is increased and the unloaded Q of the resonators is reduced to about 3,500. In order to improve the phase noise of an oscillator, a variety of the dielectric resonators are developed to find out the best unloaded Q and correct frequency. EM Simulations and measurements show close agreements.
{"title":"Substrate integrated high-Q dielectric resonators for low phase noise oscillator","authors":"Liang Zhou, W. Yin, J. Mao","doi":"10.1109/EDAPS.2009.5403983","DOIUrl":"https://doi.org/10.1109/EDAPS.2009.5403983","url":null,"abstract":"This paper presents a substrate integrated dielectric resonators utilizing multilayer printed circuit boards (PCB) for high performance microwave system-on-package applications such as low phase noise oscillators. Via posts are used as for tightly confining electromagnetic energy as a metallic boundary wall so as the dielectric puck could be integrated into the multilayer PCB. The simulated results show that the resonator resonances at TE01δ mode with a frequency at Ku band. The unloaded Q of the dielectric resonator is around 14,000 at the operating frequency. However, because of the limitation of the height between of the resonator in the multilayer PCB, conductive loss is increased and the unloaded Q of the resonators is reduced to about 3,500. In order to improve the phase noise of an oscillator, a variety of the dielectric resonators are developed to find out the best unloaded Q and correct frequency. EM Simulations and measurements show close agreements.","PeriodicalId":370741,"journal":{"name":"2009 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127320460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-01DOI: 10.1109/EDAPS.2009.5403980
Tinghou Chen, P. Luo, Huili Fu
This paper analyzed the signal integrity of high speed USB IO and IC package. Time domain modeling and measurement were studied and compared. The effect of the die junction temperature and the effect of process variations (typical and worst process parameters) were studied. Through the time domain signal integrity analysis, high signal quality and low cost design of high speed USB IO, package and PCB can be implemented.
{"title":"Signal integrity analysis of high speed USB IO and interconnection","authors":"Tinghou Chen, P. Luo, Huili Fu","doi":"10.1109/EDAPS.2009.5403980","DOIUrl":"https://doi.org/10.1109/EDAPS.2009.5403980","url":null,"abstract":"This paper analyzed the signal integrity of high speed USB IO and IC package. Time domain modeling and measurement were studied and compared. The effect of the die junction temperature and the effect of process variations (typical and worst process parameters) were studied. Through the time domain signal integrity analysis, high signal quality and low cost design of high speed USB IO, package and PCB can be implemented.","PeriodicalId":370741,"journal":{"name":"2009 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127411822","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-01DOI: 10.1109/EDAPS.2009.5404017
C. Yoon, Jiseong Kim, Joungho Kim
This paper introduces a proper quality test of RZ modulated digital signal from non-coherent recovery process in Ultra Wide-Band (UWB) transceiver which is designed by System-in-Package (SiP) technology for wireless mobile application. 3-Dimensional (3D) BER with a marginal window which is multiple sampling points set in eye-diagram is proposed. An area of 3D BER opening at specific BER level provides a noise immunity and susceptibility of whole system in advance.
{"title":"Signal quality test with 3-Dimensional BER opening for non-coherent Ultra Wide-Band (UWB) System-in-Package (SiP)","authors":"C. Yoon, Jiseong Kim, Joungho Kim","doi":"10.1109/EDAPS.2009.5404017","DOIUrl":"https://doi.org/10.1109/EDAPS.2009.5404017","url":null,"abstract":"This paper introduces a proper quality test of RZ modulated digital signal from non-coherent recovery process in Ultra Wide-Band (UWB) transceiver which is designed by System-in-Package (SiP) technology for wireless mobile application. 3-Dimensional (3D) BER with a marginal window which is multiple sampling points set in eye-diagram is proposed. An area of 3D BER opening at specific BER level provides a noise immunity and susceptibility of whole system in advance.","PeriodicalId":370741,"journal":{"name":"2009 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121587289","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-01DOI: 10.1109/EDAPS.2009.5403976
Liang Wu, Qian Rong, Xiaowei Sun
A potential large scale QFN package solution—plastic air-cavity QFN package, compatible with SMD assembly lines, for future low cost, miniature size and attractive performance microwave package application is proposed in this paper. A 6GHz∼18GHz LNA MMIC (2×1mm2) is developed using a commercial GaAs pHEMT process and integrated into this novel and cost effective package solution. The measured results (not de-embedded with test fixture) show that noise figure is less than 2.75dB, and input return loss is below 10dB, moreover small signal gain is more than 19.3dB and gain flatness is ±1.75dB with 4×4mm2 packaged area and DC power dissipation 120mW across 6GHz to 18GHz.
{"title":"A high performance plastic air-cavity QFN solution for future potential microwave package large scale application","authors":"Liang Wu, Qian Rong, Xiaowei Sun","doi":"10.1109/EDAPS.2009.5403976","DOIUrl":"https://doi.org/10.1109/EDAPS.2009.5403976","url":null,"abstract":"A potential large scale QFN package solution—plastic air-cavity QFN package, compatible with SMD assembly lines, for future low cost, miniature size and attractive performance microwave package application is proposed in this paper. A 6GHz∼18GHz LNA MMIC (2×1mm2) is developed using a commercial GaAs pHEMT process and integrated into this novel and cost effective package solution. The measured results (not de-embedded with test fixture) show that noise figure is less than 2.75dB, and input return loss is below 10dB, moreover small signal gain is more than 19.3dB and gain flatness is ±1.75dB with 4×4mm2 packaged area and DC power dissipation 120mW across 6GHz to 18GHz.","PeriodicalId":370741,"journal":{"name":"2009 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS)","volume":"115 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123841089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-01DOI: 10.1109/EDAPS.2009.5404009
Y. Zhang
This paper present a summary of the development of Antenna-in-Package (AiP) technology in a low-temperature co-fired ceramic (LTCC) process for highly-integrated 60-GHz radios. The AiP exploits the LTCC capability to integrate the antenna and package functions into a compact three-dimensional structure of size 12.5×8×1.265 mm3. The antenna consists of a radiator, a ground plane, and a guard ring. It is shown that our AiP designs achieve excellent antenna performance in the 60-GHz band with an estimated efficiency better than 90%. Simulated and measured impedance and radiation results are compared. They agree reasonably well, indicating that the challenge in the antenna technology for low-power high-speed 60-GHz wireless communications has been solved.
{"title":"60-GHz Antenna-in-Package technology","authors":"Y. Zhang","doi":"10.1109/EDAPS.2009.5404009","DOIUrl":"https://doi.org/10.1109/EDAPS.2009.5404009","url":null,"abstract":"This paper present a summary of the development of Antenna-in-Package (AiP) technology in a low-temperature co-fired ceramic (LTCC) process for highly-integrated 60-GHz radios. The AiP exploits the LTCC capability to integrate the antenna and package functions into a compact three-dimensional structure of size 12.5×8×1.265 mm3. The antenna consists of a radiator, a ground plane, and a guard ring. It is shown that our AiP designs achieve excellent antenna performance in the 60-GHz band with an estimated efficiency better than 90%. Simulated and measured impedance and radiation results are compared. They agree reasonably well, indicating that the challenge in the antenna technology for low-power high-speed 60-GHz wireless communications has been solved.","PeriodicalId":370741,"journal":{"name":"2009 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122835137","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-01DOI: 10.1109/EDAPS.2009.5404003
Harjot S. Dhindsa, N. Nakhla, R. Achar, M. Nakhla, D. Paul, A. Sridhar
This paper presents an efficient parallel algorithm for transient simulation of power grids in VLSI systems. Novel parallel Gauss-Seidel algorithm has been developed employing waveform relaxation iterations for application to power grid networks. Proof of convergence of the proposed WR algorithm for power grid analysis is presented. Unlike direct solvers, the new method is highly parallelizable and yields significant speed-ups. Numerical examples are presented to demonstrate the validity and efficiency of the proposed method.
{"title":"A parallel framework for transient power integrity analysis","authors":"Harjot S. Dhindsa, N. Nakhla, R. Achar, M. Nakhla, D. Paul, A. Sridhar","doi":"10.1109/EDAPS.2009.5404003","DOIUrl":"https://doi.org/10.1109/EDAPS.2009.5404003","url":null,"abstract":"This paper presents an efficient parallel algorithm for transient simulation of power grids in VLSI systems. Novel parallel Gauss-Seidel algorithm has been developed employing waveform relaxation iterations for application to power grid networks. Proof of convergence of the proposed WR algorithm for power grid analysis is presented. Unlike direct solvers, the new method is highly parallelizable and yields significant speed-ups. Numerical examples are presented to demonstrate the validity and efficiency of the proposed method.","PeriodicalId":370741,"journal":{"name":"2009 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS)","volume":"197 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124395729","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-01DOI: 10.1109/EDAPS.2009.5404008
J. Kho, S. G. Lim, Y. L. Tan, E. Cheng, M. Wong
As data rates increase and jitter margins decrease, the need to precisely attain the performance of a PLL block becomes increasingly important. A PLL block's performance is reflected by its jitter transfer function, which is the ratio of output jitter to input jitter. A precise jitter transfer function requires a considerably large number of measurement points for the jitter transfer plot. The trade-off is an increase in measurement time. This paper presents a time-saving and cost effective jitter transfer measurement methodology that produces a precise jitter transfer function. This methodology extracts jitter transfer from the PLL output clock signal's power spectrum variation. The power spectrum varies according to controlled noise injected into the PLL input clock signal. Jitter transfer experimental data show significant increase in precision and reduction in measurement time compared to the conventional methodology. This new methodology enables efficient characterization of PLL block behaviour across different loop parameters and consequently, improves time-to-market of a new device or electronic system introduction.
{"title":"An enhanced high-precision and time-saving jitter transfer measurement","authors":"J. Kho, S. G. Lim, Y. L. Tan, E. Cheng, M. Wong","doi":"10.1109/EDAPS.2009.5404008","DOIUrl":"https://doi.org/10.1109/EDAPS.2009.5404008","url":null,"abstract":"As data rates increase and jitter margins decrease, the need to precisely attain the performance of a PLL block becomes increasingly important. A PLL block's performance is reflected by its jitter transfer function, which is the ratio of output jitter to input jitter. A precise jitter transfer function requires a considerably large number of measurement points for the jitter transfer plot. The trade-off is an increase in measurement time. This paper presents a time-saving and cost effective jitter transfer measurement methodology that produces a precise jitter transfer function. This methodology extracts jitter transfer from the PLL output clock signal's power spectrum variation. The power spectrum varies according to controlled noise injected into the PLL input clock signal. Jitter transfer experimental data show significant increase in precision and reduction in measurement time compared to the conventional methodology. This new methodology enables efficient characterization of PLL block behaviour across different loop parameters and consequently, improves time-to-market of a new device or electronic system introduction.","PeriodicalId":370741,"journal":{"name":"2009 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS)","volume":"321 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115957874","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-01DOI: 10.1109/EDAPS.2009.5404016
W. Shen, W. Yin, Xiaowei Sun, J. Mao
A miniaturized interdigital capacitor resonator (ICR) is proposed in the design of a new wide stopband microstrip bandpass filter. Such an ICR has a curved geometry with small dimension, but with a large equivalent self-capacitance and higher the first spurious frequency. Curved interdigital capacitor structure is introduced to captured larger equivalent self-capacitor. Meanwhile, interdigital capacitor structure is adopted to obtain strong coupling between ICRs to achieve wide bandwidth. The developed filter exhibits sharp skirt and wide stopband, with an excellent agreements obtained between its measured and simulated S-parameters.
{"title":"A new wide stopband microstrip bandpass filter with miniaturized interdigital capacitor resonator","authors":"W. Shen, W. Yin, Xiaowei Sun, J. Mao","doi":"10.1109/EDAPS.2009.5404016","DOIUrl":"https://doi.org/10.1109/EDAPS.2009.5404016","url":null,"abstract":"A miniaturized interdigital capacitor resonator (ICR) is proposed in the design of a new wide stopband microstrip bandpass filter. Such an ICR has a curved geometry with small dimension, but with a large equivalent self-capacitance and higher the first spurious frequency. Curved interdigital capacitor structure is introduced to captured larger equivalent self-capacitor. Meanwhile, interdigital capacitor structure is adopted to obtain strong coupling between ICRs to achieve wide bandwidth. The developed filter exhibits sharp skirt and wide stopband, with an excellent agreements obtained between its measured and simulated S-parameters.","PeriodicalId":370741,"journal":{"name":"2009 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114155285","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-12-01DOI: 10.1109/EDAPS.2009.5404010
Gawon Kim, Eakhwan Song, Jiseong Kim, Joungho Kim
In this paper, the mode analysis method has been proposed and model the precise FEXT waveform. Using this method, FEXT saturation phenomenon can be explained and the precise FEXT equations are proposed depending on the relationship between the velocity difference of even- and odd-mode and the initial rising time of the input step pulse. Saturated FEXT level with increased duration were verified by the crosstalk simulation in two coupled microstrip-type transmission lines. The modeled FEXT and TDT waveforms by the mode analysis method show a good correlation with the measured waveforms.
{"title":"Precise analysis and modeling of far-end crosstalk and far-end crosstalk saturation using mode analysis in coupled microstrip lines","authors":"Gawon Kim, Eakhwan Song, Jiseong Kim, Joungho Kim","doi":"10.1109/EDAPS.2009.5404010","DOIUrl":"https://doi.org/10.1109/EDAPS.2009.5404010","url":null,"abstract":"In this paper, the mode analysis method has been proposed and model the precise FEXT waveform. Using this method, FEXT saturation phenomenon can be explained and the precise FEXT equations are proposed depending on the relationship between the velocity difference of even- and odd-mode and the initial rising time of the input step pulse. Saturated FEXT level with increased duration were verified by the crosstalk simulation in two coupled microstrip-type transmission lines. The modeled FEXT and TDT waveforms by the mode analysis method show a good correlation with the measured waveforms.","PeriodicalId":370741,"journal":{"name":"2009 IEEE Electrical Design of Advanced Packaging & Systems Symposium (EDAPS)","volume":"105 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114292163","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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