Pub Date : 2021-04-01DOI: 10.1109/ICSTW52544.2021.00048
Ricardo Martins, R. Abreu, Manuel Lopes, J. Nadkarni
Continuous Integration is the process of merging code changes into a software project. Keeping the master branch always updated and unfailingly is very computationally expensive due to the number of tests and code that needs to be executed. The waiting times also increase the time required for debugging. This paper proposes a solution to reduce the execution time of the testing phase, by selecting only a subset of all the tests, given some code changes. This is accomplished by training a Machine Learning (ML) Classifier with features such as code/test files history fails, extension code files that tend to generate more errors during the testing phase, and others. The results obtained by the best ML classifier showed results comparable with the recent literature done in the same area. This model managed to reduce the median test execution time by nearly 10 minutes while maintaining 97% of recall. Additionally, the impact of innocent commits and flaky tests was taken into account and studied to understand a particular industrial context.
{"title":"Supervised Learning for Test Suit Selection in Continuous Integration","authors":"Ricardo Martins, R. Abreu, Manuel Lopes, J. Nadkarni","doi":"10.1109/ICSTW52544.2021.00048","DOIUrl":"https://doi.org/10.1109/ICSTW52544.2021.00048","url":null,"abstract":"Continuous Integration is the process of merging code changes into a software project. Keeping the master branch always updated and unfailingly is very computationally expensive due to the number of tests and code that needs to be executed. The waiting times also increase the time required for debugging. This paper proposes a solution to reduce the execution time of the testing phase, by selecting only a subset of all the tests, given some code changes. This is accomplished by training a Machine Learning (ML) Classifier with features such as code/test files history fails, extension code files that tend to generate more errors during the testing phase, and others. The results obtained by the best ML classifier showed results comparable with the recent literature done in the same area. This model managed to reduce the median test execution time by nearly 10 minutes while maintaining 97% of recall. Additionally, the impact of innocent commits and flaky tests was taken into account and studied to understand a particular industrial context.","PeriodicalId":371680,"journal":{"name":"2021 IEEE International Conference on Software Testing, Verification and Validation Workshops (ICSTW)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122679922","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-04-01DOI: 10.1109/ICSTW52544.2021.00025
Erin Lanus, Laura J. Freeman, D. R. Kuhn, R. Kacker
This paper defines a set difference metric for comparing machine learning (ML) datasets and proposes the difference between datasets be a function of combinatorial coverage. We illustrate its utility for evaluating and predicting performance of ML models. Identifying and measuring differences between datasets is of significant value for ML problems, where the accuracy of the model is heavily dependent on the degree to which training data are sufficiently representative of data encountered in application. The method is illustrated for transfer learning without retraining, the problem of predicting performance of a model trained on one dataset and applied to another.
{"title":"Combinatorial Testing Metrics for Machine Learning","authors":"Erin Lanus, Laura J. Freeman, D. R. Kuhn, R. Kacker","doi":"10.1109/ICSTW52544.2021.00025","DOIUrl":"https://doi.org/10.1109/ICSTW52544.2021.00025","url":null,"abstract":"This paper defines a set difference metric for comparing machine learning (ML) datasets and proposes the difference between datasets be a function of combinatorial coverage. We illustrate its utility for evaluating and predicting performance of ML models. Identifying and measuring differences between datasets is of significant value for ML problems, where the accuracy of the model is heavily dependent on the degree to which training data are sufficiently representative of data encountered in application. The method is illustrated for transfer learning without retraining, the problem of predicting performance of a model trained on one dataset and applied to another.","PeriodicalId":371680,"journal":{"name":"2021 IEEE International Conference on Software Testing, Verification and Validation Workshops (ICSTW)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129558679","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-04-01DOI: 10.1109/ICSTW52544.2021.00045
Eran Hershkovich, Roni Stern, R. Abreu, Amir Elmishali
Writing and running software unit tests is one of the fundamental techniques used to maintain software quality. However, this process is rather costly and time consuming. Thus, much effort has been devoted to generating unit tests automatically. The common objective of test generation algorithms is to maximize code coverage. However, maximizing coverage is not necessarily correlated with identifying faults [1]. In this work, we propose a novel approach for test generation aiming at generating a small set of tests that cover the software components that are likely to contain bugs. To identify which components are more likely to contain bugs, we train a software fault prediction model using machine learning techniques. We implemented this approach in practice in a tool called QUADRANT, and demonstrate its effectiveness on five real-world, open-source projects. Results show the benefit of using QUADRANT, where test generation guided by our fault prediction model can detect more than double the number of bugs compared to a coverage-oriented approach, thereby saving test generation and execution efforts.
{"title":"Prioritized Test Generation Guided by Software Fault Prediction","authors":"Eran Hershkovich, Roni Stern, R. Abreu, Amir Elmishali","doi":"10.1109/ICSTW52544.2021.00045","DOIUrl":"https://doi.org/10.1109/ICSTW52544.2021.00045","url":null,"abstract":"Writing and running software unit tests is one of the fundamental techniques used to maintain software quality. However, this process is rather costly and time consuming. Thus, much effort has been devoted to generating unit tests automatically. The common objective of test generation algorithms is to maximize code coverage. However, maximizing coverage is not necessarily correlated with identifying faults [1]. In this work, we propose a novel approach for test generation aiming at generating a small set of tests that cover the software components that are likely to contain bugs. To identify which components are more likely to contain bugs, we train a software fault prediction model using machine learning techniques. We implemented this approach in practice in a tool called QUADRANT, and demonstrate its effectiveness on five real-world, open-source projects. Results show the benefit of using QUADRANT, where test generation guided by our fault prediction model can detect more than double the number of bugs compared to a coverage-oriented approach, thereby saving test generation and execution efforts.","PeriodicalId":371680,"journal":{"name":"2021 IEEE International Conference on Software Testing, Verification and Validation Workshops (ICSTW)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126934761","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-04-01DOI: 10.1109/ICSTW52544.2021.00043
Turcanu Cristina Nicoleta
As the Fourth Industrial revolution is an emerging trend articulated by the rapid advances in automation technologies, the use of robots and the Industrial Internet of Things (IIoT) is meant to significantly simplify human’s life. However, if we consider industrial robots with two or more axes that could have unpredictable motions and velocities, real-time robots’ reliability is a matter that is strongly related to safety requirements. Considering operational testing in the context of IIoT, process conformance verification could be an important asset for obtaining knowledge of the failures – in particular, discovering failure occurrence patterns and establishing realtime preventive actions.This paper aims to pave a way to implementing a methodology for a robotic mechanism process conformance checking, using some certain synthetic operational traces that could be collected through IIoT technologies and communicated through computer driven industrial applications. Moreover, the paper suggests a formal verification method against the standard process model that could be provided by the robot manufacturer. Besides presenting some process conformance verification aspects using Celonis process mining tool, this study also refers to some finite state machine (FSM) and business process modelling (BPMN) representation, suggested as being suitable for robots’ formal specifications.
{"title":"Process Mining on a Robotic Mechanism","authors":"Turcanu Cristina Nicoleta","doi":"10.1109/ICSTW52544.2021.00043","DOIUrl":"https://doi.org/10.1109/ICSTW52544.2021.00043","url":null,"abstract":"As the Fourth Industrial revolution is an emerging trend articulated by the rapid advances in automation technologies, the use of robots and the Industrial Internet of Things (IIoT) is meant to significantly simplify human’s life. However, if we consider industrial robots with two or more axes that could have unpredictable motions and velocities, real-time robots’ reliability is a matter that is strongly related to safety requirements. Considering operational testing in the context of IIoT, process conformance verification could be an important asset for obtaining knowledge of the failures – in particular, discovering failure occurrence patterns and establishing realtime preventive actions.This paper aims to pave a way to implementing a methodology for a robotic mechanism process conformance checking, using some certain synthetic operational traces that could be collected through IIoT technologies and communicated through computer driven industrial applications. Moreover, the paper suggests a formal verification method against the standard process model that could be provided by the robot manufacturer. Besides presenting some process conformance verification aspects using Celonis process mining tool, this study also refers to some finite state machine (FSM) and business process modelling (BPMN) representation, suggested as being suitable for robots’ formal specifications.","PeriodicalId":371680,"journal":{"name":"2021 IEEE International Conference on Software Testing, Verification and Validation Workshops (ICSTW)","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127950151","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-04-01DOI: 10.1109/ICSTW52544.2021.00024
Hanefi Mercan, Cemal Yilmaz
Unified Combinatorial Interaction Testing (U-CIT) aims to reduce the barriers to applying combinatorial interaction testing (CIT) approaches to different testing scenarios by generalizing the construction of the CIT objects, so that the necessity of developing a specialized constructor for each distinct scenario, is avoided. In this work, to demonstrate the flexibility provided by U-CIT, we apply it to compute a well-known combinatorial object for testing, namely sequence covering arrays, together with some practical extensions.
{"title":"Computing Sequence Covering Arrays using Unified Combinatorial Interaction Testing","authors":"Hanefi Mercan, Cemal Yilmaz","doi":"10.1109/ICSTW52544.2021.00024","DOIUrl":"https://doi.org/10.1109/ICSTW52544.2021.00024","url":null,"abstract":"Unified Combinatorial Interaction Testing (U-CIT) aims to reduce the barriers to applying combinatorial interaction testing (CIT) approaches to different testing scenarios by generalizing the construction of the CIT objects, so that the necessity of developing a specialized constructor for each distinct scenario, is avoided. In this work, to demonstrate the flexibility provided by U-CIT, we apply it to compute a well-known combinatorial object for testing, namely sequence covering arrays, together with some practical extensions.","PeriodicalId":371680,"journal":{"name":"2021 IEEE International Conference on Software Testing, Verification and Validation Workshops (ICSTW)","volume":"256 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131783115","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-04-01DOI: 10.1109/ICSTW52544.2021.00023
Omer Korkmaz, Cemal Yilmaz
In this paper, we present an automated model discovery approach, called SYSMODIS, which uses covering arrays to systematically sample the input spaces. SYSMODIS discovers finite state machine-based models, where states represent distinct screens and the edges between the states represent the transitions between the screens. SYSMODIS also discovers the likely guard conditions for the transitions, i.e., the conditions that must be satisfied before the transitions can be taken. For the first time a previously unseen screen is visited, a covering array-based test suite for the input fields present on the screen as well as the actions that can be taken on the screen, is created. SYSMODIS keeps on crawling until all the test suites for all the screens have been exhaustively tested. Once the crawling is over, the results of the test suites are fed to a machine learning algorithm on a per screen basis to determine the likely guard conditions. In the experiments we carried out to evaluate the proposed approach, we observed that SYSMODIS profoundly improved the state/screen coverage, transition coverage, and/or the accuracy of the predicted guard conditions, compared to the existing approaches studied in the paper.
{"title":"SYSMODIS: A Systematic Model Discovery Approach","authors":"Omer Korkmaz, Cemal Yilmaz","doi":"10.1109/ICSTW52544.2021.00023","DOIUrl":"https://doi.org/10.1109/ICSTW52544.2021.00023","url":null,"abstract":"In this paper, we present an automated model discovery approach, called SYSMODIS, which uses covering arrays to systematically sample the input spaces. SYSMODIS discovers finite state machine-based models, where states represent distinct screens and the edges between the states represent the transitions between the screens. SYSMODIS also discovers the likely guard conditions for the transitions, i.e., the conditions that must be satisfied before the transitions can be taken. For the first time a previously unseen screen is visited, a covering array-based test suite for the input fields present on the screen as well as the actions that can be taken on the screen, is created. SYSMODIS keeps on crawling until all the test suites for all the screens have been exhaustively tested. Once the crawling is over, the results of the test suites are fed to a machine learning algorithm on a per screen basis to determine the likely guard conditions. In the experiments we carried out to evaluate the proposed approach, we observed that SYSMODIS profoundly improved the state/screen coverage, transition coverage, and/or the accuracy of the predicted guard conditions, compared to the existing approaches studied in the paper.","PeriodicalId":371680,"journal":{"name":"2021 IEEE International Conference on Software Testing, Verification and Validation Workshops (ICSTW)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128344823","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-04-01DOI: 10.1109/ICSTW52544.2021.00053
M. Zielinski, R. Groenboom
Unit testing is a popular testing technique, widespread in enterprise IT and embedded/safety-critical. For enterprise IT, unit testing is considered to be good practice and is frequently followed as an element of test-driven development. In the safety-critical world, there are many standards, such as ISO 26262, IEC 61508, and others, that either directly or indirectly mandate unit testing. Regardless the area of the application, unit testing is very time-consuming and teams are looking for strategies to optimize their efforts. This is especially true in the safety-critical space, where demonstration of test coverage is required for the certification. In this presentation, we share the results of our research regarding the use of advanced code analysis algorithms for augmenting the process of unit test creation. The discussion includes automatic discovery of inputs and responses from mocked components that maximize the code coverage and automated generation of the test cases.
{"title":"Using Advanced Code Analysis for Boosting Unit Test Creation","authors":"M. Zielinski, R. Groenboom","doi":"10.1109/ICSTW52544.2021.00053","DOIUrl":"https://doi.org/10.1109/ICSTW52544.2021.00053","url":null,"abstract":"Unit testing is a popular testing technique, widespread in enterprise IT and embedded/safety-critical. For enterprise IT, unit testing is considered to be good practice and is frequently followed as an element of test-driven development. In the safety-critical world, there are many standards, such as ISO 26262, IEC 61508, and others, that either directly or indirectly mandate unit testing. Regardless the area of the application, unit testing is very time-consuming and teams are looking for strategies to optimize their efforts. This is especially true in the safety-critical space, where demonstration of test coverage is required for the certification. In this presentation, we share the results of our research regarding the use of advanced code analysis algorithms for augmenting the process of unit test creation. The discussion includes automatic discovery of inputs and responses from mocked components that maximize the code coverage and automated generation of the test cases.","PeriodicalId":371680,"journal":{"name":"2021 IEEE International Conference on Software Testing, Verification and Validation Workshops (ICSTW)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129574779","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-04-01DOI: 10.1109/ICSTW52544.2021.00047
Vaibhav Kesri, Anmol Nayak, Karthikeyan Ponnalagu
Industries have a significant amount of data in semi-structured and unstructured formats which are typically captured in text documents, spreadsheets, images, etc. This is especially the case with the software description documents used by domain experts in the automotive domain to perform tasks at various phases of the Software Development Life Cycle (SDLC). In this paper, we propose an end-to-end pipeline to extract an Automotive Knowledge Graph (AutoKG) from textual data using Natural Language Processing (NLP) techniques with the application of automatic test case generation. The proposed pipeline primarily consists of the following components: 1) AutoOntology, an ontology that has been derived by analyzing several industry scale automotive domain software systems, 2) AutoRE, a Relation Extraction (RE) model to extract triplets from various sentence types typically found in the automotive domain, and 3) AutoVec, a neural embedding based algorithm for triplet matching and context-based search. We demonstrate the pipeline with an application of automatic test case generation from requirements using AutoKG.
{"title":"AutoKG - An Automotive Domain Knowledge Graph for Software Testing: A position paper","authors":"Vaibhav Kesri, Anmol Nayak, Karthikeyan Ponnalagu","doi":"10.1109/ICSTW52544.2021.00047","DOIUrl":"https://doi.org/10.1109/ICSTW52544.2021.00047","url":null,"abstract":"Industries have a significant amount of data in semi-structured and unstructured formats which are typically captured in text documents, spreadsheets, images, etc. This is especially the case with the software description documents used by domain experts in the automotive domain to perform tasks at various phases of the Software Development Life Cycle (SDLC). In this paper, we propose an end-to-end pipeline to extract an Automotive Knowledge Graph (AutoKG) from textual data using Natural Language Processing (NLP) techniques with the application of automatic test case generation. The proposed pipeline primarily consists of the following components: 1) AutoOntology, an ontology that has been derived by analyzing several industry scale automotive domain software systems, 2) AutoRE, a Relation Extraction (RE) model to extract triplets from various sentence types typically found in the automotive domain, and 3) AutoVec, a neural embedding based algorithm for triplet matching and context-based search. We demonstrate the pipeline with an application of automatic test case generation from requirements using AutoKG.","PeriodicalId":371680,"journal":{"name":"2021 IEEE International Conference on Software Testing, Verification and Validation Workshops (ICSTW)","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129012231","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-04-01DOI: 10.1109/ICSTW52544.2021.00046
Ali Tehrani Jamsaz, Mohammed Khaleel, R. Akbari, A. Jannesari
In this paper, we propose DeepRace, a novel approach toward detecting data race bugs in the source code. We build a deep neural network model to find data race bugs instead of creating a data race detector manually. Our model uses a one-layer convolutional neural network (CNN) with different window sizes to find data race. We adopt the class activation map in order to highlight the line of codes with a data race. Thus, the DeepRace model can detect the data race on a file-level and line of code level. We trained and tested the model with OpenMP and POSIX source code datasets consisting of more than 5000 and 8000 source code files respectively. Comparing to other race detectors, we only had a small number of false positives and false negatives up to 3 and 4 for each OpenMP data race.
{"title":"DeepRace: A learning-based data race detector","authors":"Ali Tehrani Jamsaz, Mohammed Khaleel, R. Akbari, A. Jannesari","doi":"10.1109/ICSTW52544.2021.00046","DOIUrl":"https://doi.org/10.1109/ICSTW52544.2021.00046","url":null,"abstract":"In this paper, we propose DeepRace, a novel approach toward detecting data race bugs in the source code. We build a deep neural network model to find data race bugs instead of creating a data race detector manually. Our model uses a one-layer convolutional neural network (CNN) with different window sizes to find data race. We adopt the class activation map in order to highlight the line of codes with a data race. Thus, the DeepRace model can detect the data race on a file-level and line of code level. We trained and tested the model with OpenMP and POSIX source code datasets consisting of more than 5000 and 8000 source code files respectively. Comparing to other race detectors, we only had a small number of false positives and false negatives up to 3 and 4 for each OpenMP data race.","PeriodicalId":371680,"journal":{"name":"2021 IEEE International Conference on Software Testing, Verification and Validation Workshops (ICSTW)","volume":"30 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131782086","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-04-01DOI: 10.1109/ICSTW52544.2021.00040
Sylvain Hallé, R. Khoury
The paper presents a theoretical foundation for test sequence generation based on an input specification. The set of possible test sequences is first partitioned according to a generic “triaging” function, which can be created from a state-machine specification in various ways. The notion of coverage metric is then expressed in terms of the categories produced by this function. Many existing test generation problems, such as t-way state or transition coverage, become particular cases of this generic framework. We then present algorithms for generating sets of test sequences providing guaranteed full coverage with respect to a metric, by building and processing a special type of graph called a Cayley graph. An implementation of these concepts is then experimentally evaluated against existing techniques, and shows it provides better performance in terms of running time and test suite size.
{"title":"Test Sequence Generation with Cayley Graphs","authors":"Sylvain Hallé, R. Khoury","doi":"10.1109/ICSTW52544.2021.00040","DOIUrl":"https://doi.org/10.1109/ICSTW52544.2021.00040","url":null,"abstract":"The paper presents a theoretical foundation for test sequence generation based on an input specification. The set of possible test sequences is first partitioned according to a generic “triaging” function, which can be created from a state-machine specification in various ways. The notion of coverage metric is then expressed in terms of the categories produced by this function. Many existing test generation problems, such as t-way state or transition coverage, become particular cases of this generic framework. We then present algorithms for generating sets of test sequences providing guaranteed full coverage with respect to a metric, by building and processing a special type of graph called a Cayley graph. An implementation of these concepts is then experimentally evaluated against existing techniques, and shows it provides better performance in terms of running time and test suite size.","PeriodicalId":371680,"journal":{"name":"2021 IEEE International Conference on Software Testing, Verification and Validation Workshops (ICSTW)","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123059241","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：