Pub Date : 2021-01-10DOI: 10.1109/EuMIC48047.2021.00030
Sumeet Londhe, Noam Shmilovitz, Shay Avner, Noam Bar-Helmer, S. Jameson, E. Socher
In this work a Ka-Band transceiver is presented in low cost 130nm CMOS. The front end consists of PA, LNA and SPDT. The PA is 3-stage differential cascode with capacitive cross coupling. The LNA starts with a single ended common source followed by 2 differential stages with RC feedback to extend bandwidth. The SPDT has parallel configuration with digital control. The PA has Psat of 17dBm with a small signal gain of 21dB. The LNA has a small signal gain of 24dB with a measured NF of 5.5dB. The SPDT has insertion loss of 2dB. The Rx has an IP1 of −18dBm with a small signal gain of 20dB. The power supply for the Tx/Rx is 2.6/2.4 V. The Tx draws 533mW with a max PAE of 14% from a 2.6 V supply. The Rx draws 103mW from a 2.4 V supply. The whole transceiver has a bandwidth of 9GHz. The chip area is 1.5mm2 including pads.
{"title":"34-42GHz CMOS Transceiver Frontend for Versatile Arrays","authors":"Sumeet Londhe, Noam Shmilovitz, Shay Avner, Noam Bar-Helmer, S. Jameson, E. Socher","doi":"10.1109/EuMIC48047.2021.00030","DOIUrl":"https://doi.org/10.1109/EuMIC48047.2021.00030","url":null,"abstract":"In this work a Ka-Band transceiver is presented in low cost 130nm CMOS. The front end consists of PA, LNA and SPDT. The PA is 3-stage differential cascode with capacitive cross coupling. The LNA starts with a single ended common source followed by 2 differential stages with RC feedback to extend bandwidth. The SPDT has parallel configuration with digital control. The PA has Psat of 17dBm with a small signal gain of 21dB. The LNA has a small signal gain of 24dB with a measured NF of 5.5dB. The SPDT has insertion loss of 2dB. The Rx has an IP1 of −18dBm with a small signal gain of 20dB. The power supply for the Tx/Rx is 2.6/2.4 V. The Tx draws 533mW with a max PAE of 14% from a 2.6 V supply. The Rx draws 103mW from a 2.4 V supply. The whole transceiver has a bandwidth of 9GHz. The chip area is 1.5mm2 including pads.","PeriodicalId":371692,"journal":{"name":"2020 15th European Microwave Integrated Circuits Conference (EuMIC)","volume":" 26","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133052302","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-01-10DOI: 10.1109/EuMIC48047.2021.00065
S. Guerrieri, C. Ramella, F. Bonani, G. Ghione
The novel technique introduced in [1] is exploited to address a full variability analysis of a GaAs MMIC X-band power amplifier, including the statistical variations of several technological parameters, both in the active and passive components. The active device is modelled by means of X-parameters, directly extracted from physics-based analysis. A non-50 Ω X-Par model is used to take into account the input port mismatch with respect to the conventional 50 Ω reference. The scattering parameters of the passive structures are extracted from accurate electromagnetic simulations and then imported into the circuit simulator through data intercharge files (e.g. MDIF or CITIfile) as a function of the most important MMIC fabrication parameters, e.g. the thickness of the MIM capacitor dielectric layer. The analysis shows that more than 10% of output power variations can be ascribed to the concurrent MIM and doping variations in conventional GaAs MMIC technology.
{"title":"Global Assessment of PA variability through concurrent Physics-based X-parameter and Electro-Magnetic simulations","authors":"S. Guerrieri, C. Ramella, F. Bonani, G. Ghione","doi":"10.1109/EuMIC48047.2021.00065","DOIUrl":"https://doi.org/10.1109/EuMIC48047.2021.00065","url":null,"abstract":"The novel technique introduced in [1] is exploited to address a full variability analysis of a GaAs MMIC X-band power amplifier, including the statistical variations of several technological parameters, both in the active and passive components. The active device is modelled by means of X-parameters, directly extracted from physics-based analysis. A non-50 Ω X-Par model is used to take into account the input port mismatch with respect to the conventional 50 Ω reference. The scattering parameters of the passive structures are extracted from accurate electromagnetic simulations and then imported into the circuit simulator through data intercharge files (e.g. MDIF or CITIfile) as a function of the most important MMIC fabrication parameters, e.g. the thickness of the MIM capacitor dielectric layer. The analysis shows that more than 10% of output power variations can be ascribed to the concurrent MIM and doping variations in conventional GaAs MMIC technology.","PeriodicalId":371692,"journal":{"name":"2020 15th European Microwave Integrated Circuits Conference (EuMIC)","volume":"105 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116012092","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-01-10DOI: 10.1109/EuMIC48047.2021.00036
G. Formicone, J. Custer
This publication introduces a solid-state technology based on RF GaN/SiC High Electron Mobility Transistors (HEMT) operating at 100 VDC in CW mode, and up to 145 V in pulse mode. In pulse mode, it is an ideal solution for high efficiency using drain modulation as demonstrated in quasistatic mode characterization from 100 V to 145 V. Results based on a 50 mm single die RF transistor are reported here demonstrating 600 W CW at 100 V bias with 80% drain efficiency, and 1 kW at 145 V bias with a pulse width of 100 µs and 10% duty cycle, also with 80% efficiency. Quasi-static drain modulation achieves 3 dB peak power dynamic range with bias modulated from 100 V to 145 V, and 6 dB from 50 V to 145 V. The design employs harmonic tuning techniques for class E, F or F−1power amplifiers to achieve high efficiency and assembly techniques that overcome heat dissipation in such high-power density transistors. These devices and circuits have been designed to operate at 325 and 650 MHz in use at Fermi National Laboratory.
{"title":"A GaN/SiC UHF PA for Particle Accelerators with 100-145V Quasi-Static Drain Modulation","authors":"G. Formicone, J. Custer","doi":"10.1109/EuMIC48047.2021.00036","DOIUrl":"https://doi.org/10.1109/EuMIC48047.2021.00036","url":null,"abstract":"This publication introduces a solid-state technology based on RF GaN/SiC High Electron Mobility Transistors (HEMT) operating at 100 VDC in CW mode, and up to 145 V in pulse mode. In pulse mode, it is an ideal solution for high efficiency using drain modulation as demonstrated in quasistatic mode characterization from 100 V to 145 V. Results based on a 50 mm single die RF transistor are reported here demonstrating 600 W CW at 100 V bias with 80% drain efficiency, and 1 kW at 145 V bias with a pulse width of 100 µs and 10% duty cycle, also with 80% efficiency. Quasi-static drain modulation achieves 3 dB peak power dynamic range with bias modulated from 100 V to 145 V, and 6 dB from 50 V to 145 V. The design employs harmonic tuning techniques for class E, F or F−1power amplifiers to achieve high efficiency and assembly techniques that overcome heat dissipation in such high-power density transistors. These devices and circuits have been designed to operate at 325 and 650 MHz in use at Fermi National Laboratory.","PeriodicalId":371692,"journal":{"name":"2020 15th European Microwave Integrated Circuits Conference (EuMIC)","volume":"21 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125725627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-01-10DOI: 10.1109/EuMIC48047.2021.00054
T. Johansen, M. Hossain, R. Doerner, H. Yacoub, K. Nosaeva, T. Shivan, W. Heinrich, V. Krozer
This paper presents a compact model for InP DHBTs in a transferred-substrate technology with a diamond heat spreader. The heat spreading layer is introduced to effectively remove the generated heat from the InP DHBTs but will also have a non-negligible influence on the device characteristics. Thermal vias connecting individual collectors of the InP DHBTs to the heat spreading layer act like open-circuited stubs and the electromagnetic environment of the device access structure is modified by the promixity of the diamond layer. The proposed compact modeling approach includes a multiline TRL calibration procedure using on-wafer structures for a definition of reference planes for model extraction, 3D electromagnetic simulation based extraction of the extrinsic parasitic network associated with via transitions and device electrodes in the presence of the diamond heat-spreading layer and the extraction of the remaining parameters of a large-signal HBT model from multi-bias S-parameters and static characteristics. The compact model is verified using a 500 nm InP DHBT by comparison against measured S-parameters and associated transistor gains in the frequency range up to 220 GHz and large-signal measurements at 94 GHz under class-A operation.
{"title":"Modeling of InP DHBTs in a Transferred-Substrate Technology with Diamond Heat Spreader","authors":"T. Johansen, M. Hossain, R. Doerner, H. Yacoub, K. Nosaeva, T. Shivan, W. Heinrich, V. Krozer","doi":"10.1109/EuMIC48047.2021.00054","DOIUrl":"https://doi.org/10.1109/EuMIC48047.2021.00054","url":null,"abstract":"This paper presents a compact model for InP DHBTs in a transferred-substrate technology with a diamond heat spreader. The heat spreading layer is introduced to effectively remove the generated heat from the InP DHBTs but will also have a non-negligible influence on the device characteristics. Thermal vias connecting individual collectors of the InP DHBTs to the heat spreading layer act like open-circuited stubs and the electromagnetic environment of the device access structure is modified by the promixity of the diamond layer. The proposed compact modeling approach includes a multiline TRL calibration procedure using on-wafer structures for a definition of reference planes for model extraction, 3D electromagnetic simulation based extraction of the extrinsic parasitic network associated with via transitions and device electrodes in the presence of the diamond heat-spreading layer and the extraction of the remaining parameters of a large-signal HBT model from multi-bias S-parameters and static characteristics. The compact model is verified using a 500 nm InP DHBT by comparison against measured S-parameters and associated transistor gains in the frequency range up to 220 GHz and large-signal measurements at 94 GHz under class-A operation.","PeriodicalId":371692,"journal":{"name":"2020 15th European Microwave Integrated Circuits Conference (EuMIC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121252358","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
R. Malmqvist, R. Jonsson, A. Bernland, M. Bao, R. Leblanc, K. Buisman, C. Fager, K. Andersson
This paper presents an experimental evaluation of two co-planar waveguide (CPW) based E/W-band amplifier MMICs realised in a 60 nm GaN-on-Si foundry process. A one-stage amplifier and a two-stage amplifier realised in this process have a measured maximum gain of 8 dB and 16 dB at 73–74 GHz, respectively. The two amplifiers have a measured gain of 3 dB and 7 dB at 93 GHz when the drain voltage (Vd) is 10 V and the drain current (Id) is 15 mA per stage. The two-stage amplifier has a measured noise figure (NF) of 2.7-3.8 dB and 2.9-4.1 dB at 90–95 GHz when the Id is 10 mA and Vd is 5 V and 10 V, respectively. The measured NF of this amplifier is equal to 4–6 dB at 92–95 GHz when an Id of 10–20 mA is used in each stage with same drain bias.
{"title":"E/W-Band CPW-based Amplifier MMICs Fabricated in a 60 nm GaN-on-Silicon Foundry Process","authors":"R. Malmqvist, R. Jonsson, A. Bernland, M. Bao, R. Leblanc, K. Buisman, C. Fager, K. Andersson","doi":"10.5281/ZENODO.4497009","DOIUrl":"https://doi.org/10.5281/ZENODO.4497009","url":null,"abstract":"This paper presents an experimental evaluation of two co-planar waveguide (CPW) based E/W-band amplifier MMICs realised in a 60 nm GaN-on-Si foundry process. A one-stage amplifier and a two-stage amplifier realised in this process have a measured maximum gain of 8 dB and 16 dB at 73–74 GHz, respectively. The two amplifiers have a measured gain of 3 dB and 7 dB at 93 GHz when the drain voltage (Vd) is 10 V and the drain current (Id) is 15 mA per stage. The two-stage amplifier has a measured noise figure (NF) of 2.7-3.8 dB and 2.9-4.1 dB at 90–95 GHz when the Id is 10 mA and Vd is 5 V and 10 V, respectively. The measured NF of this amplifier is equal to 4–6 dB at 92–95 GHz when an Id of 10–20 mA is used in each stage with same drain bias.","PeriodicalId":371692,"journal":{"name":"2020 15th European Microwave Integrated Circuits Conference (EuMIC)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122925530","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, a low jitter degradation subharmonically injection-locked (SIL) quadrature voltage-controlled oscillator (QVCO) with frequency-tracking loop is presented using 65 nm CMOS process for 5G frontend applications. The QVCO is designed using a modified self-injection coupling technique to enhance the quadrature accuracy. An analog-based frequency-tracking loop is employed in the QVCO to adaptively align the control voltage. As the subharmonic number is 4, the locking frequency is from 30 to 36.6 GHz with a 19.6% fractional bandwidth. The phase noise at 1 MHz offset is −130.3 dBc/Hz, and the jitter integrated from 1 kHz to 40 MHz is 8.7 fs with a degradation of within 7 fs. When the temperature is between 20°C and 70°C, the variations of phase noise, jitter, output power are within 2.5 dB, 5 fs, and 1.5 dB, respectively. The quadrature errors are within 0.5 dB and 0.9°.
{"title":"A 30-36.6 GHz Low Jitter Degradation SIL QVCO with Frequency-tracking Loop in 65 nm CMOS for 5G Frontend Applications","authors":"Jhe‐Wei Li, Wei-Cheng Chen, Ju-Chien Chou, Yu-Cheng Liu, Hong-Yeh Chang","doi":"10.1109/EuMIC48047.2021.00072","DOIUrl":"https://doi.org/10.1109/EuMIC48047.2021.00072","url":null,"abstract":"In this paper, a low jitter degradation subharmonically injection-locked (SIL) quadrature voltage-controlled oscillator (QVCO) with frequency-tracking loop is presented using 65 nm CMOS process for 5G frontend applications. The QVCO is designed using a modified self-injection coupling technique to enhance the quadrature accuracy. An analog-based frequency-tracking loop is employed in the QVCO to adaptively align the control voltage. As the subharmonic number is 4, the locking frequency is from 30 to 36.6 GHz with a 19.6% fractional bandwidth. The phase noise at 1 MHz offset is −130.3 dBc/Hz, and the jitter integrated from 1 kHz to 40 MHz is 8.7 fs with a degradation of within 7 fs. When the temperature is between 20°C and 70°C, the variations of phase noise, jitter, output power are within 2.5 dB, 5 fs, and 1.5 dB, respectively. The quadrature errors are within 0.5 dB and 0.9°.","PeriodicalId":371692,"journal":{"name":"2020 15th European Microwave Integrated Circuits Conference (EuMIC)","volume":"230 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122430709","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-01-10DOI: 10.1109/EuMIC48047.2021.00063
Patrícia Bouça, Ricardo Figueiredo, J. N. Matos, P. Vilarinho, N. Carvalho
This work presents a comparative study between adaptive filters for software-defined radio (SDR), using Barium Strontium Titanate (BST) tunable capacitor and varactor diode based filters. Since these filters can be used for jamming interference reduction in SDR implementations, their nonlinear behavior is of fundamental importance. This study is focused on exploring the intermodulation distortion (IMD) phenomenon in both filters. Thus, a comparison between these results will be made in the two configurations when using similar capacitive values. Although the BST capacitor-based filter allows higher tunability, it presents greater degree of nonlinearity, including memory effects like asymmetric IMD.
{"title":"Intermodulation Distortion Analysis of Microwave Tunable Filters Using Barium Strontium Titanate Capacitor and Varactor Diode","authors":"Patrícia Bouça, Ricardo Figueiredo, J. N. Matos, P. Vilarinho, N. Carvalho","doi":"10.1109/EuMIC48047.2021.00063","DOIUrl":"https://doi.org/10.1109/EuMIC48047.2021.00063","url":null,"abstract":"This work presents a comparative study between adaptive filters for software-defined radio (SDR), using Barium Strontium Titanate (BST) tunable capacitor and varactor diode based filters. Since these filters can be used for jamming interference reduction in SDR implementations, their nonlinear behavior is of fundamental importance. This study is focused on exploring the intermodulation distortion (IMD) phenomenon in both filters. Thus, a comparison between these results will be made in the two configurations when using similar capacitive values. Although the BST capacitor-based filter allows higher tunability, it presents greater degree of nonlinearity, including memory effects like asymmetric IMD.","PeriodicalId":371692,"journal":{"name":"2020 15th European Microwave Integrated Circuits Conference (EuMIC)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125343204","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-01-10DOI: 10.1109/EuMIC48047.2021.00023
Ali Ferschischi, S. Rehman, V. Riess, C. Carta, F. Ellinger
This paper presents a high data-rate, low-power and highly sensitive 60-GHz on-off-keying (OOK) receiver. The circuit is implemented in a 130-nm SiGe BiCMOS technology and occupies a total chip area of 0.82 mm2. The receiver consists of a low noise amplifier (LNA), an OOK demodulator and an output buffer. For robust operation, a dc offset cancellation technique is implemented. The receiver sensitivity is −41 dBm, while consuming 44 mW of dc power including the output buffer. Thanks to its wideband-characteristic, the circuit demonstrates, to the authors best knowledge, the highest data rate (DR) of 20 Gb/s among the already published V-band OOK receivers. This corresponds to an energy efficiency of 2.2 pJ/bit.
{"title":"20-Gb/s 60-GHz OOK Receiver for High-Data-Rate Short-Range Wireless Communications","authors":"Ali Ferschischi, S. Rehman, V. Riess, C. Carta, F. Ellinger","doi":"10.1109/EuMIC48047.2021.00023","DOIUrl":"https://doi.org/10.1109/EuMIC48047.2021.00023","url":null,"abstract":"This paper presents a high data-rate, low-power and highly sensitive 60-GHz on-off-keying (OOK) receiver. The circuit is implemented in a 130-nm SiGe BiCMOS technology and occupies a total chip area of 0.82 mm2. The receiver consists of a low noise amplifier (LNA), an OOK demodulator and an output buffer. For robust operation, a dc offset cancellation technique is implemented. The receiver sensitivity is −41 dBm, while consuming 44 mW of dc power including the output buffer. Thanks to its wideband-characteristic, the circuit demonstrates, to the authors best knowledge, the highest data rate (DR) of 20 Gb/s among the already published V-band OOK receivers. This corresponds to an energy efficiency of 2.2 pJ/bit.","PeriodicalId":371692,"journal":{"name":"2020 15th European Microwave Integrated Circuits Conference (EuMIC)","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125360804","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-01-10DOI: 10.1109/EuMIC48047.2021.00012
Ahmed S. H. Ahmed, M. Seo, A. Farid, M. Urteaga, J. Buckwalter, M. Rodwell
We report a compact and high efficiency D-band power amplifier in 250nm InP HBT technology. A compact and low loss 8:1 transmission line power combiner is demonstrated. The three-stage power amplifier combines 8 capacitively linearized common-base power cells. The amplifier has 23dBm peak power with 17.8% power added efficiency (PAE) and 16.5dB associated large-signal gain at 131GHz. At 131GHz, the small-signal gain is 21.9dB. The small-signal 3dB-bandwidth is 125.8-145.8GHz. Over the 127-151GHz bandwidth, the saturated output power is greater than 22.3dBm with greater than 15% associated PAE. The amplifier occupies 1.34mm2 die area and consumes 1.1W DC power. To the authors' knowledge, this result demonstrates a record PAE.
{"title":"A 200mW D-band Power Amplifier with 17.8% PAE in 250-nm InP HBT Technology","authors":"Ahmed S. H. Ahmed, M. Seo, A. Farid, M. Urteaga, J. Buckwalter, M. Rodwell","doi":"10.1109/EuMIC48047.2021.00012","DOIUrl":"https://doi.org/10.1109/EuMIC48047.2021.00012","url":null,"abstract":"We report a compact and high efficiency D-band power amplifier in 250nm InP HBT technology. A compact and low loss 8:1 transmission line power combiner is demonstrated. The three-stage power amplifier combines 8 capacitively linearized common-base power cells. The amplifier has 23dBm peak power with 17.8% power added efficiency (PAE) and 16.5dB associated large-signal gain at 131GHz. At 131GHz, the small-signal gain is 21.9dB. The small-signal 3dB-bandwidth is 125.8-145.8GHz. Over the 127-151GHz bandwidth, the saturated output power is greater than 22.3dBm with greater than 15% associated PAE. The amplifier occupies 1.34mm2 die area and consumes 1.1W DC power. To the authors' knowledge, this result demonstrates a record PAE.","PeriodicalId":371692,"journal":{"name":"2020 15th European Microwave Integrated Circuits Conference (EuMIC)","volume":"94 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127070666","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2021-01-10DOI: 10.1109/EuMIC48047.2021.00020
C. Ramella, C. Florian, E. Cipriani, M. Pirola, F. Giannini, P. Colantonio
In this contribution it is reported the design, implementation and characterization of a 4-stage single-ended Ka-band power amplifier based on 100 nm GaN/Si commercial process. The amplifier, designed for CW radar applications, has been measured under small-signal and pulsed large-signal conditions. The amplifier exhibits an output power above 4W, together with power added efficiency in excess of 28 % and operative gain larger than 25dB over the 34GHz-38GHz frequency range.
{"title":"Ka-band 4 W GaN/Si MMIC power amplifier for CW radar applications","authors":"C. Ramella, C. Florian, E. Cipriani, M. Pirola, F. Giannini, P. Colantonio","doi":"10.1109/EuMIC48047.2021.00020","DOIUrl":"https://doi.org/10.1109/EuMIC48047.2021.00020","url":null,"abstract":"In this contribution it is reported the design, implementation and characterization of a 4-stage single-ended Ka-band power amplifier based on 100 nm GaN/Si commercial process. The amplifier, designed for CW radar applications, has been measured under small-signal and pulsed large-signal conditions. The amplifier exhibits an output power above 4W, together with power added efficiency in excess of 28 % and operative gain larger than 25dB over the 34GHz-38GHz frequency range.","PeriodicalId":371692,"journal":{"name":"2020 15th European Microwave Integrated Circuits Conference (EuMIC)","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2021-01-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122208959","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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