Pub Date : 2017-03-01DOI: 10.1109/ICSCN.2017.8085646
K. Anusudha, Gopi Chand Naguboina
Reversible logic is the emerging field for research in present era. The aim of this paper is to design and synthesize a Programmable array Logic (PAL) and Programmable Logic array (PLA) using reversible logic with minimum quantum cost. The PAL is a Programmable Logic device which consists of programmable AND Gates and fixed OR gates array. The PLA is the PLD which contains programmable AND array and programmable OR array. The PLDs are the combinational circuits mainly used to realize Boolean functions on our interest. An n input and k output Boolean function f (a1, a2, a3,…. an) (referred as (n, k)) is said to be logically reversible if and only if, the number of inputs are equal to the number of outputs i.e., ‘n’ equals ‘k’ and the input pattern maps uniquely maps the output pattern. The reversible logic must run both forward and backward in such a way that the inputs can also be retrieved from outputs. There are many reversible logic gates in literature like NOT gate, Feynman Gate (CNOT gate), Double Feynman Gate, Peres Gate, TR gate, Seynman Gate and many more. Fan-out and Feed-back are not allowed in Logical Reversibility. To overcome the Fan out limitation, the signals from required output lines are duplicated to desired lines using additional reversible combinational circuits. Reversible Logic owns its applications in various fields which include Quantum Computing, Optical Computing, Nano-technology, Computer Graphics, low power VLSI etc., Reversible logic is gaining its own importance in recent years largely due to its property of low power consumption and low heat dissipation. In this paper, the design of PAL and PLA which has less heat dissipation and low power consumption is proposed. The designed circuits are analyzed in terms of quantum cost, garbage outputs and number of gates. The Circuit has been designed and simulated using Xilinx software and implemented on FPGA SPARTAN — 3E.
可逆逻辑是当前新兴的研究领域。本文的目的是用最小量子成本的可逆逻辑设计和合成可编程阵列逻辑(PAL)和可编程逻辑阵列(PLA)。PAL是一种可编程逻辑器件，它由可编程与门和固定或门阵列组成。PLA是包含可编程与阵列和可编程或阵列的PLD。pld是一种组合电路，主要用于实现我们感兴趣的布尔函数。一个n输入，k输出的布尔函数f (a1, a2, a3，....)An)(称为(n, k))在逻辑上是可逆的，当且仅当，输入的数量等于输出的数量，即' n '等于' k '，并且输入模式映射唯一地映射输出模式。可逆逻辑必须以能够从输出检索输入的方式向前和向后运行。文献中有许多可逆逻辑门，如非门，费曼门(CNOT门)，双费曼门，佩雷斯门，TR门，塞恩曼门等等。在逻辑可逆性中不允许扇出和反馈。为了克服扇出限制，使用额外的可逆组合电路将来自所需输出线的信号复制到所需线路。可逆逻辑在量子计算、光学计算、纳米技术、计算机图形学、低功耗VLSI等各个领域都有广泛的应用，近年来，由于其低功耗、低散热的特性，可逆逻辑得到了越来越多的重视。本文提出了一种低散热、低功耗的聚乳酸和聚乳酸的设计方案。从量子成本、垃圾输出和门数等方面对所设计的电路进行了分析。利用Xilinx软件对该电路进行了设计和仿真，并在FPGA SPARTAN - 3E上实现。
{"title":"Design and implementation of PAL and PLA using reversible logic on FPGA SPARTAN 3E","authors":"K. Anusudha, Gopi Chand Naguboina","doi":"10.1109/ICSCN.2017.8085646","DOIUrl":"https://doi.org/10.1109/ICSCN.2017.8085646","url":null,"abstract":"Reversible logic is the emerging field for research in present era. The aim of this paper is to design and synthesize a Programmable array Logic (PAL) and Programmable Logic array (PLA) using reversible logic with minimum quantum cost. The PAL is a Programmable Logic device which consists of programmable AND Gates and fixed OR gates array. The PLA is the PLD which contains programmable AND array and programmable OR array. The PLDs are the combinational circuits mainly used to realize Boolean functions on our interest. An n input and k output Boolean function f (a1, a2, a3,…. an) (referred as (n, k)) is said to be logically reversible if and only if, the number of inputs are equal to the number of outputs i.e., ‘n’ equals ‘k’ and the input pattern maps uniquely maps the output pattern. The reversible logic must run both forward and backward in such a way that the inputs can also be retrieved from outputs. There are many reversible logic gates in literature like NOT gate, Feynman Gate (CNOT gate), Double Feynman Gate, Peres Gate, TR gate, Seynman Gate and many more. Fan-out and Feed-back are not allowed in Logical Reversibility. To overcome the Fan out limitation, the signals from required output lines are duplicated to desired lines using additional reversible combinational circuits. Reversible Logic owns its applications in various fields which include Quantum Computing, Optical Computing, Nano-technology, Computer Graphics, low power VLSI etc., Reversible logic is gaining its own importance in recent years largely due to its property of low power consumption and low heat dissipation. In this paper, the design of PAL and PLA which has less heat dissipation and low power consumption is proposed. The designed circuits are analyzed in terms of quantum cost, garbage outputs and number of gates. The Circuit has been designed and simulated using Xilinx software and implemented on FPGA SPARTAN — 3E.","PeriodicalId":383458,"journal":{"name":"2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN)","volume":"42 2","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113981049","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-01DOI: 10.1109/ICSCN.2017.8085726
J. Karunya, P. Prakash
An optical signal gets distorted when it travels along the fiber optic transmission system. This mainly due to dispersion, this is one of the most important problems in the optical fiber transmission system. One approach used to compensate dispersion is Dispersion Compensating Fiber (DCF). In this paper Wavelength Division Multiplexing (WDM) system is implemented using DCF. This WDM system is analyzed with DCF and without DCF at different fiber length and frequency spacing. The performance of the DCF is analyzed using simulation results of the parameters like Quality factor, eye pattern and BER.
{"title":"Analysis of WDM system using DCF","authors":"J. Karunya, P. Prakash","doi":"10.1109/ICSCN.2017.8085726","DOIUrl":"https://doi.org/10.1109/ICSCN.2017.8085726","url":null,"abstract":"An optical signal gets distorted when it travels along the fiber optic transmission system. This mainly due to dispersion, this is one of the most important problems in the optical fiber transmission system. One approach used to compensate dispersion is Dispersion Compensating Fiber (DCF). In this paper Wavelength Division Multiplexing (WDM) system is implemented using DCF. This WDM system is analyzed with DCF and without DCF at different fiber length and frequency spacing. The performance of the DCF is analyzed using simulation results of the parameters like Quality factor, eye pattern and BER.","PeriodicalId":383458,"journal":{"name":"2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN)","volume":"51 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131516048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-01DOI: 10.1109/ICSCN.2017.8085736
S. Gayathri
Genetic Algorithms are group of mathematical models in computational science by exciting evolution in AI techniques nowadays. These algorithms preserve critical information by applying data structure with simple chromosome recombination operators by encoding solution to a specific problem. Genetic algorithms they are optimizer, in which range of problems applied to it are quite broad. Genetic Algorithms with its global search includes basic principles like selection, crossover and mutation. Data structures, algorithms and human brain inspiration are found for classification of data and for learning which works using Neural Networks. Artificial Intelligence (AI) it is a field, where so many tasks performed naturally by a human. When AI conventional methods are used in a computer it was proved as a complicated task. Applying Neural Networks techniques will create an internal structure of rules by which a program can learn by examples, to classify different inputs than mining techniques. This paper proposes a phishing websites classifier using improved polynomial neural networks in genetic algorithm.
{"title":"Phishing websites classifier using polynomial neural networks in genetic algorithm","authors":"S. Gayathri","doi":"10.1109/ICSCN.2017.8085736","DOIUrl":"https://doi.org/10.1109/ICSCN.2017.8085736","url":null,"abstract":"Genetic Algorithms are group of mathematical models in computational science by exciting evolution in AI techniques nowadays. These algorithms preserve critical information by applying data structure with simple chromosome recombination operators by encoding solution to a specific problem. Genetic algorithms they are optimizer, in which range of problems applied to it are quite broad. Genetic Algorithms with its global search includes basic principles like selection, crossover and mutation. Data structures, algorithms and human brain inspiration are found for classification of data and for learning which works using Neural Networks. Artificial Intelligence (AI) it is a field, where so many tasks performed naturally by a human. When AI conventional methods are used in a computer it was proved as a complicated task. Applying Neural Networks techniques will create an internal structure of rules by which a program can learn by examples, to classify different inputs than mining techniques. This paper proposes a phishing websites classifier using improved polynomial neural networks in genetic algorithm.","PeriodicalId":383458,"journal":{"name":"2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN)","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128083037","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-01DOI: 10.1109/ICSCN.2017.8085720
T. V. Prasula, D. Meganathan
This proposed work explains the design and simulation of a recycling folded cascode OTA based on the conventional folded cascode architecture. The benefit of recycling structure is that it delivers an enhanced performance when compared to that of a conventional folded cascode structure. The enhancement in gain, bandwidth and reduction in power for the recycling structure is achieved by reusing the idle transistors in the signal path. A 32nm CMOS process is used in HSPICE tool for simulations. When compared to the conventional folded cascode, the recycling folded cascode OTA achieves 4.5dB improvement in gain, 430MHz enhancement in bandwidth and 67μW reduction in power with the same load capacitor of 150fF. The proposed modified recycling OTA achieves 3.3GHz improvement in bandwidth and 467 μW reduction in power compared to existing recycling folded cascode OTA.
{"title":"Design and simulation of low power, high gain and high bandwidth recycling folded cascode OTA","authors":"T. V. Prasula, D. Meganathan","doi":"10.1109/ICSCN.2017.8085720","DOIUrl":"https://doi.org/10.1109/ICSCN.2017.8085720","url":null,"abstract":"This proposed work explains the design and simulation of a recycling folded cascode OTA based on the conventional folded cascode architecture. The benefit of recycling structure is that it delivers an enhanced performance when compared to that of a conventional folded cascode structure. The enhancement in gain, bandwidth and reduction in power for the recycling structure is achieved by reusing the idle transistors in the signal path. A 32nm CMOS process is used in HSPICE tool for simulations. When compared to the conventional folded cascode, the recycling folded cascode OTA achieves 4.5dB improvement in gain, 430MHz enhancement in bandwidth and 67μW reduction in power with the same load capacitor of 150fF. The proposed modified recycling OTA achieves 3.3GHz improvement in bandwidth and 467 μW reduction in power compared to existing recycling folded cascode OTA.","PeriodicalId":383458,"journal":{"name":"2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133154391","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-01DOI: 10.1109/ICSCN.2017.8085666
M. Suma, P. Madhumathy, S. B. Kumar
The sense amplifier circuit is a very important part of the memory. It is used to access the stored data in bit cell during read cycle. Sense intensifier enhances the little distinction between bit lines to the full swing level. Its execution influences the get to time and power dissemination of memory and henceforth by lessening the detecting deferral and power utilization of sense speaker the execution of memory makes strides. Since the majority of the memory related operations are perused operations, this causes a vast sparing in the general power scattered by the memory. Additionally as sense intensifiers scatters extensive amount of short out power instead of the dynamic power disseminated by the cell exhibit, substantial power is spared. The requirement for the hearty outline of low power fast CMOS simple VLSI circuits is developing immensely. This development is because of the innovative drive that originates from the decrease of the base component size to downsize the chip zone. Downsizing the transistor size can then coordinate more circuit segments are solitary chip zone and bring down the cost. Likewise littler geometry normally brings down the parasitic capacitances, which implies higher working pace and lower control utilization. For a comparative analysis, we will be cataloguing the different sense amplifiers in use currently, using various nanometer technologies such as 180nm, 90nm and 45nm. We will then be providing an extensive comparison using these technologies in order to provide a clear picture about the best technology to be used. The comparison will provide information regarding various parameters such as sensing delay and power consumption.
{"title":"Analysis of sense amplifier circuits in nanometer technologies","authors":"M. Suma, P. Madhumathy, S. B. Kumar","doi":"10.1109/ICSCN.2017.8085666","DOIUrl":"https://doi.org/10.1109/ICSCN.2017.8085666","url":null,"abstract":"The sense amplifier circuit is a very important part of the memory. It is used to access the stored data in bit cell during read cycle. Sense intensifier enhances the little distinction between bit lines to the full swing level. Its execution influences the get to time and power dissemination of memory and henceforth by lessening the detecting deferral and power utilization of sense speaker the execution of memory makes strides. Since the majority of the memory related operations are perused operations, this causes a vast sparing in the general power scattered by the memory. Additionally as sense intensifiers scatters extensive amount of short out power instead of the dynamic power disseminated by the cell exhibit, substantial power is spared. The requirement for the hearty outline of low power fast CMOS simple VLSI circuits is developing immensely. This development is because of the innovative drive that originates from the decrease of the base component size to downsize the chip zone. Downsizing the transistor size can then coordinate more circuit segments are solitary chip zone and bring down the cost. Likewise littler geometry normally brings down the parasitic capacitances, which implies higher working pace and lower control utilization. For a comparative analysis, we will be cataloguing the different sense amplifiers in use currently, using various nanometer technologies such as 180nm, 90nm and 45nm. We will then be providing an extensive comparison using these technologies in order to provide a clear picture about the best technology to be used. The comparison will provide information regarding various parameters such as sensing delay and power consumption.","PeriodicalId":383458,"journal":{"name":"2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116275483","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-01DOI: 10.1109/ICSCN.2017.8085691
G. Shanmugasundaram, Archiot Anil, S. Deepak, Faizal Ahmed
Accident's being the regular topic in this automobile powered world; road safety remains the major concern. Most of the accidents are not aided as fast as possible, because of passing late information about the accident to the help centers. To address this, we have developed a system in order to notify each and every helping hand to save an individual's life during accident and in tough situations. So, taking these situations into consideration we have used arduino interfaced along with GSM (SIM 300) and GPS (PMB-648), which passes messages to a helpline and reducing the burden of waiting in line at the toll plaza by developing auto toll pay system. This system also uses a speed sensor which sends a notification, if a vehicle is caught over speeding.
{"title":"Smart accident alert and toll pay system","authors":"G. Shanmugasundaram, Archiot Anil, S. Deepak, Faizal Ahmed","doi":"10.1109/ICSCN.2017.8085691","DOIUrl":"https://doi.org/10.1109/ICSCN.2017.8085691","url":null,"abstract":"Accident's being the regular topic in this automobile powered world; road safety remains the major concern. Most of the accidents are not aided as fast as possible, because of passing late information about the accident to the help centers. To address this, we have developed a system in order to notify each and every helping hand to save an individual's life during accident and in tough situations. So, taking these situations into consideration we have used arduino interfaced along with GSM (SIM 300) and GPS (PMB-648), which passes messages to a helpline and reducing the burden of waiting in line at the toll plaza by developing auto toll pay system. This system also uses a speed sensor which sends a notification, if a vehicle is caught over speeding.","PeriodicalId":383458,"journal":{"name":"2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124653892","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-01DOI: 10.1109/ICSCN.2017.8085712
A. Karpagam, M. Manikandan
Interpolation tool plays a vital role in estimating missing values. This classical problem aims to preserve the structural information-edges and textures, in the resultant image. In this process of developing a continuous function, distractions such as blur, noise or other artifacts should not be entertained. This paper provides an overview of commonly used interpolation algorithms. Comparative discussions are presented in this paper. This paper is focusing choice of interpolation for specific applications. Interpolation is applied in numerous fields like remote sensing, medical diagnosis, agriculture, geology, etc. Choosing appropriate interpolation is practically a rigorous study and it is the primary need for this analysis.
{"title":"Interpolation tool: Qualitative and quantitative analysis for machine vision applications","authors":"A. Karpagam, M. Manikandan","doi":"10.1109/ICSCN.2017.8085712","DOIUrl":"https://doi.org/10.1109/ICSCN.2017.8085712","url":null,"abstract":"Interpolation tool plays a vital role in estimating missing values. This classical problem aims to preserve the structural information-edges and textures, in the resultant image. In this process of developing a continuous function, distractions such as blur, noise or other artifacts should not be entertained. This paper provides an overview of commonly used interpolation algorithms. Comparative discussions are presented in this paper. This paper is focusing choice of interpolation for specific applications. Interpolation is applied in numerous fields like remote sensing, medical diagnosis, agriculture, geology, etc. Choosing appropriate interpolation is practically a rigorous study and it is the primary need for this analysis.","PeriodicalId":383458,"journal":{"name":"2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN)","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129869967","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-01DOI: 10.1109/ICSCN.2017.8085679
V. Venkatesan, M. Sandhya, B. M. Jenefer
A Computed Tomography scan employs various combinations of X-ray images taken from different angles to create cross sectional images of specific portions of a scanned object. It allows the user to view the interior regions of the object without dismantling or cutting. This process is complex and involves a lot of parameters. Peak voltage of X-ray source, total number of scans needed, source to iso center distance, angle step and source to detector distance are some of the required parameters for the computed tomography scan. An incorrect scan procedure leads to heavy losses in terms of time and cost. Therefore simulation of computed tomography scan is required to avoid these losses. Scan simulation is a vital task for determining the scan plan for optimal reconstruction of a given object of interest. This paper presents the need for this scan simulation and a survey on the various scan simulation techniques used in medical and industrial applications. It also discusses the various issues associated with the scan simulation techniques.
{"title":"Computed tomography scan simulation techniques: A survey","authors":"V. Venkatesan, M. Sandhya, B. M. Jenefer","doi":"10.1109/ICSCN.2017.8085679","DOIUrl":"https://doi.org/10.1109/ICSCN.2017.8085679","url":null,"abstract":"A Computed Tomography scan employs various combinations of X-ray images taken from different angles to create cross sectional images of specific portions of a scanned object. It allows the user to view the interior regions of the object without dismantling or cutting. This process is complex and involves a lot of parameters. Peak voltage of X-ray source, total number of scans needed, source to iso center distance, angle step and source to detector distance are some of the required parameters for the computed tomography scan. An incorrect scan procedure leads to heavy losses in terms of time and cost. Therefore simulation of computed tomography scan is required to avoid these losses. Scan simulation is a vital task for determining the scan plan for optimal reconstruction of a given object of interest. This paper presents the need for this scan simulation and a survey on the various scan simulation techniques used in medical and industrial applications. It also discusses the various issues associated with the scan simulation techniques.","PeriodicalId":383458,"journal":{"name":"2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN)","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124967621","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-01DOI: 10.1109/ICSCN.2017.8085702
Mirishkar Sai Ganesh, M. Karthik, B. Patnaik
This contribution presents an efficient technique for the speech enhancement of a signal using statistical estimators which are based on squared magnitude spectra's. In any speech enhancement systems, an estimate of power spectral density is required. As conventional methods for noise elimination fails due to the non-stationary properties of the speech signal, in this context, minimum mean square error (MMSE) and maximum a posterior (MAP) estimators are derived based on Gaussian statistical model. The acquisition function which is obtained in the MAP estimator is same as the acquisition function used in the ideal binary masking. As a binary masking depends on the signal-to-noise ratio (SNR), if the SNR value exceeds 0 dB then the value assumes to be 1 otherwise 0. The results accomplished using the proposed estimator embarked with better enhancement of the speech signal than the standard minimum mean square error spectral power estimator, with low residual noise and low speech distortion.
{"title":"An estimation theory-based approach for speech enhancement","authors":"Mirishkar Sai Ganesh, M. Karthik, B. Patnaik","doi":"10.1109/ICSCN.2017.8085702","DOIUrl":"https://doi.org/10.1109/ICSCN.2017.8085702","url":null,"abstract":"This contribution presents an efficient technique for the speech enhancement of a signal using statistical estimators which are based on squared magnitude spectra's. In any speech enhancement systems, an estimate of power spectral density is required. As conventional methods for noise elimination fails due to the non-stationary properties of the speech signal, in this context, minimum mean square error (MMSE) and maximum a posterior (MAP) estimators are derived based on Gaussian statistical model. The acquisition function which is obtained in the MAP estimator is same as the acquisition function used in the ideal binary masking. As a binary masking depends on the signal-to-noise ratio (SNR), if the SNR value exceeds 0 dB then the value assumes to be 1 otherwise 0. The results accomplished using the proposed estimator embarked with better enhancement of the speech signal than the standard minimum mean square error spectral power estimator, with low residual noise and low speech distortion.","PeriodicalId":383458,"journal":{"name":"2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN)","volume":"238 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130570376","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-03-01DOI: 10.1109/ICSCN.2017.8085664
R. Hariharan, P. Rani
In power system restoration process, the major issue is to identify the Black start unit, by providing cranking power to the unit and abundant start-up time for the Black-Start unit generator to start. There are many issues that arise in the delaying Blackout restoration process. This paper is proposed to avoid the faced issues by Electric vehicle charging station that act as Black-start unit to provide Cranking power to Non Black-Start Unit. Few intelligent integrated systems are developed by virtual instrumentation and tested in the different situations including the normal state and the restoration state.
{"title":"Blackout restoration process by PHEV charging station integrated system using virtual instrumentation","authors":"R. Hariharan, P. Rani","doi":"10.1109/ICSCN.2017.8085664","DOIUrl":"https://doi.org/10.1109/ICSCN.2017.8085664","url":null,"abstract":"In power system restoration process, the major issue is to identify the Black start unit, by providing cranking power to the unit and abundant start-up time for the Black-Start unit generator to start. There are many issues that arise in the delaying Blackout restoration process. This paper is proposed to avoid the faced issues by Electric vehicle charging station that act as Black-start unit to provide Cranking power to Non Black-Start Unit. Few intelligent integrated systems are developed by virtual instrumentation and tested in the different situations including the normal state and the restoration state.","PeriodicalId":383458,"journal":{"name":"2017 Fourth International Conference on Signal Processing, Communication and Networking (ICSCN)","volume":"31 5","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-03-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120997402","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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