Pub Date : 2017-04-01DOI: 10.1109/IEMENTECH.2017.8077005
Rajat Kumar, Navdeep M. Singh
Renewable energy is gaining more attention because conventional power plants are facing several environment problems. In the present scenario, wind power grid interfacing is one of the favorable approaches for electricity production. This paper introduces the MATLAB modeling and simulation of 5-Level and 3-Level neutral point clamped inverters for grid interfacing using SEPIC converter for wind energy application. SEPIC converter decreases the lower harmonic component value in the generator. SEPIC converter offers several advantages over other DC-DC converters like harmonics can be minimized and efficiency is thus improved in SEPIC converter. As the number of levels is high in inverter, harmonic content value is reduced so that there is no need of filter. NPC inverter provides high efficiency as switching of all the devices have been taken place at fundamental frequency. The performance assessment of 5-Level inverter over 3-Level inverter for reduction in the harmonic level has been discussed.
{"title":"Wind power grid interfacing using 3 level vs 5 level inverter with SEPIC converter","authors":"Rajat Kumar, Navdeep M. Singh","doi":"10.1109/IEMENTECH.2017.8077005","DOIUrl":"https://doi.org/10.1109/IEMENTECH.2017.8077005","url":null,"abstract":"Renewable energy is gaining more attention because conventional power plants are facing several environment problems. In the present scenario, wind power grid interfacing is one of the favorable approaches for electricity production. This paper introduces the MATLAB modeling and simulation of 5-Level and 3-Level neutral point clamped inverters for grid interfacing using SEPIC converter for wind energy application. SEPIC converter decreases the lower harmonic component value in the generator. SEPIC converter offers several advantages over other DC-DC converters like harmonics can be minimized and efficiency is thus improved in SEPIC converter. As the number of levels is high in inverter, harmonic content value is reduced so that there is no need of filter. NPC inverter provides high efficiency as switching of all the devices have been taken place at fundamental frequency. The performance assessment of 5-Level inverter over 3-Level inverter for reduction in the harmonic level has been discussed.","PeriodicalId":411574,"journal":{"name":"2017 1st International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128268625","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/IEMENTECH.2017.8076997
Saima Saddiq, N. Zafar, Farhan Ullah
In this paper, we present orders, customers, products, manufacturer, warehouse, transportation and payments components of our proposed smart logistics monitoring system model. This paper presents model which provide smart logistics service, identify customer demands, products and inventory management to develop smart logistics system. Four modules system management, order, customers, and manufacturer are described only here. It involves the wireless sensors, RFID, RTLS and actors to communicate with different components of the system. The proposed components require fewer resources in terms of sensors, RFID, RTLS, and actors. Further, sensors identify objects through RFID and it is readable through sensors from its barcode and barcode consists of objects details in terms of order registration, type, price, and color. The components of our proposed model are implemented by developing formal specification using VDM-SL, which is a formal specification language used for analysis of complex systems. The developed specification is validated, verified and analyzed using VDM-SL Toolbox.
{"title":"Formal modeling of smart logistics monitoring","authors":"Saima Saddiq, N. Zafar, Farhan Ullah","doi":"10.1109/IEMENTECH.2017.8076997","DOIUrl":"https://doi.org/10.1109/IEMENTECH.2017.8076997","url":null,"abstract":"In this paper, we present orders, customers, products, manufacturer, warehouse, transportation and payments components of our proposed smart logistics monitoring system model. This paper presents model which provide smart logistics service, identify customer demands, products and inventory management to develop smart logistics system. Four modules system management, order, customers, and manufacturer are described only here. It involves the wireless sensors, RFID, RTLS and actors to communicate with different components of the system. The proposed components require fewer resources in terms of sensors, RFID, RTLS, and actors. Further, sensors identify objects through RFID and it is readable through sensors from its barcode and barcode consists of objects details in terms of order registration, type, price, and color. The components of our proposed model are implemented by developing formal specification using VDM-SL, which is a formal specification language used for analysis of complex systems. The developed specification is validated, verified and analyzed using VDM-SL Toolbox.","PeriodicalId":411574,"journal":{"name":"2017 1st International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech)","volume":"274 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122760682","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/IEMENTECH.2017.8077014
P. Shinde, Soumen Sen, S. N. Shome
A wire driven parallel manipulator is pulled by several wires on motors or passive devices over pulleys at the other ends. The motors or passive ends are mounted on a framed structure and the platform moves within the volume. Wires can apply only unilateral force and so these manipulators need redundancy in actuation and characterized by Force closure of the wire tensions. This article presents an analysis of and method for determining the force-closure workspace. Due to elastic behaviour of wires and proportional gain of motor controller, the moving platform exhibits directional stiffness in any position within workspace. The stiffness again also varies on all over the workspace. This article presents a detailed analysis of the task space stiffness behaviour of the moving platform. Illustrations are given with numerical results of analyses on example cases of 4-wire driven planar and 8-wire driven spatial manipulators.
{"title":"Task space stiffness analysis of wire driven parallel manipulator","authors":"P. Shinde, Soumen Sen, S. N. Shome","doi":"10.1109/IEMENTECH.2017.8077014","DOIUrl":"https://doi.org/10.1109/IEMENTECH.2017.8077014","url":null,"abstract":"A wire driven parallel manipulator is pulled by several wires on motors or passive devices over pulleys at the other ends. The motors or passive ends are mounted on a framed structure and the platform moves within the volume. Wires can apply only unilateral force and so these manipulators need redundancy in actuation and characterized by Force closure of the wire tensions. This article presents an analysis of and method for determining the force-closure workspace. Due to elastic behaviour of wires and proportional gain of motor controller, the moving platform exhibits directional stiffness in any position within workspace. The stiffness again also varies on all over the workspace. This article presents a detailed analysis of the task space stiffness behaviour of the moving platform. Illustrations are given with numerical results of analyses on example cases of 4-wire driven planar and 8-wire driven spatial manipulators.","PeriodicalId":411574,"journal":{"name":"2017 1st International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127730828","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/IEMENTECH.2017.8077013
Diwakar Singh, Awadhesh Kumar
Electrocardiogram (ECG) is utilized in finding and treatment of various heart diseases. ECG data is compressed so that it can be effectively used in telemedicine. For telemedicine huge quantity of data signals are to be stored and sent to different places. So it is very essential to compress the ECG signal data in a resourceful way. Electrocardiogram (ECG) signals are mainly compressed for two reasons, on-line data transmission and effective and economical data storage. In the last five decades several data compression techniques has been developed for the compression of ECG signals. These techniques can be classified into three categories: direct data compression (DDC), transformation compression (TC), parameter extraction compression (PEC). In this paper a comparative study of turning point (TP) compression technique and fan compression technique is done. The comparison has been on parameters like compression ratio (CR), percentage root mean square difference (PRD) and quality score (QS). The main comparison has been made morphologically.
{"title":"Comparison between TP and fan data compression techniques of ECG signal","authors":"Diwakar Singh, Awadhesh Kumar","doi":"10.1109/IEMENTECH.2017.8077013","DOIUrl":"https://doi.org/10.1109/IEMENTECH.2017.8077013","url":null,"abstract":"Electrocardiogram (ECG) is utilized in finding and treatment of various heart diseases. ECG data is compressed so that it can be effectively used in telemedicine. For telemedicine huge quantity of data signals are to be stored and sent to different places. So it is very essential to compress the ECG signal data in a resourceful way. Electrocardiogram (ECG) signals are mainly compressed for two reasons, on-line data transmission and effective and economical data storage. In the last five decades several data compression techniques has been developed for the compression of ECG signals. These techniques can be classified into three categories: direct data compression (DDC), transformation compression (TC), parameter extraction compression (PEC). In this paper a comparative study of turning point (TP) compression technique and fan compression technique is done. The comparison has been on parameters like compression ratio (CR), percentage root mean square difference (PRD) and quality score (QS). The main comparison has been made morphologically.","PeriodicalId":411574,"journal":{"name":"2017 1st International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech)","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127740801","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/IEMENTECH.2017.8076952
A. Deyasi, Ritabrata Chakraborty
Transconductance characteristics of single electron transistor are analytically computed for different tunneling resistances and tunneling capacitances. For modeling purpose, it is assumed that source and drain ends are connected via quantum dot. Tunneling mechanism is considered as a stochastic process, and steady state master equation is solved to calculate free energy changes. Fermi Golden Rule (FGR) is considered to compute tunneling probabilities at drain and source ends. Some unusual variations are reported which sets the limit of equivalent circuit parameters for proper operation.
{"title":"Analytical computation of transconductance characteristics of single electron transistor","authors":"A. Deyasi, Ritabrata Chakraborty","doi":"10.1109/IEMENTECH.2017.8076952","DOIUrl":"https://doi.org/10.1109/IEMENTECH.2017.8076952","url":null,"abstract":"Transconductance characteristics of single electron transistor are analytically computed for different tunneling resistances and tunneling capacitances. For modeling purpose, it is assumed that source and drain ends are connected via quantum dot. Tunneling mechanism is considered as a stochastic process, and steady state master equation is solved to calculate free energy changes. Fermi Golden Rule (FGR) is considered to compute tunneling probabilities at drain and source ends. Some unusual variations are reported which sets the limit of equivalent circuit parameters for proper operation.","PeriodicalId":411574,"journal":{"name":"2017 1st International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech)","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114286097","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/IEMENTECH.2017.8076970
S. Agarwal, A. Swetapadma, C. Panigrahi, A. Dasgupta
Line commutated converter based high voltage transmission line suffers from converter faults where the converter experiences commutation failure of the device. This fault occurs when the ac voltage drops or the short circuit occurs and is more frequent in the inverter. The fast detection of a fault is essential because improper transferring of current from one device to another can cause stress on the device and interruption of transmitted power. In this paper, a fast scheme for protection against commutation failure due to decrease or faults in ac voltage is implemented using a fuzzy logic controller. The rectifier end data voltage and current signals are chosen as an input to detect the faults. This scheme has good selectivity, reliability, accuracy and robustness.
{"title":"Intelligent computing based converter fault identification in line commutated high voltage direct current transmission line","authors":"S. Agarwal, A. Swetapadma, C. Panigrahi, A. Dasgupta","doi":"10.1109/IEMENTECH.2017.8076970","DOIUrl":"https://doi.org/10.1109/IEMENTECH.2017.8076970","url":null,"abstract":"Line commutated converter based high voltage transmission line suffers from converter faults where the converter experiences commutation failure of the device. This fault occurs when the ac voltage drops or the short circuit occurs and is more frequent in the inverter. The fast detection of a fault is essential because improper transferring of current from one device to another can cause stress on the device and interruption of transmitted power. In this paper, a fast scheme for protection against commutation failure due to decrease or faults in ac voltage is implemented using a fuzzy logic controller. The rectifier end data voltage and current signals are chosen as an input to detect the faults. This scheme has good selectivity, reliability, accuracy and robustness.","PeriodicalId":411574,"journal":{"name":"2017 1st International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131238055","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/IEMENTECH.2017.8076968
M. Paul, Neha Kapoor, R. Modak, Tathagata Paul, R. R. Chaudhuri, S. D. Chowdhury, Mili Sarkar
In this paper, we have designed a β driven 1-bit full-adder circuit. Circuits based on threshold elements have raised extensive interest in recent years. It uses a CMOS(complementary metal oxide semiconductor field effect transistor) pair with variable β. Transformation of a regular analytic representation of the threshold function in a ratio form is the concept behind the design of the β driven circuit. Addition is the most fundamental arithmetic operation hence full adders are one of the most basic building blocks for computing circuits. The major advantage of this β-driven threshold logic based full adder circuit design is that the Full Adder is its simplicity and lower transistor count. The circuit is done using PSpice.
{"title":"Design of 1-bit Full Adder using β-driven threshold element","authors":"M. Paul, Neha Kapoor, R. Modak, Tathagata Paul, R. R. Chaudhuri, S. D. Chowdhury, Mili Sarkar","doi":"10.1109/IEMENTECH.2017.8076968","DOIUrl":"https://doi.org/10.1109/IEMENTECH.2017.8076968","url":null,"abstract":"In this paper, we have designed a β driven 1-bit full-adder circuit. Circuits based on threshold elements have raised extensive interest in recent years. It uses a CMOS(complementary metal oxide semiconductor field effect transistor) pair with variable β. Transformation of a regular analytic representation of the threshold function in a ratio form is the concept behind the design of the β driven circuit. Addition is the most fundamental arithmetic operation hence full adders are one of the most basic building blocks for computing circuits. The major advantage of this β-driven threshold logic based full adder circuit design is that the Full Adder is its simplicity and lower transistor count. The circuit is done using PSpice.","PeriodicalId":411574,"journal":{"name":"2017 1st International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129218013","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/IEMENTECH.2017.8076967
R. Chakrabarty, S. Dutta, Maitreyee Roy Malakar, Sagar Mukherjee, Rajib Ganguly
CMOS technology over Transistor is an important contribution in Very Large Scale Integrated technique for the last two decades. Quantum Dot Cellular Automata (QCA) brings as a replacement solution to the fundamental limits of CMOS technology. This paper is a proposal of making Quantum dot cellular automata (QCA) based Nano-calculator. In this Calculator we've simulated four basic operations: addition, subtraction, multiplication and division. QCA is an advance technology which overcomes some limitations of CMOS such as switching speed. QCA generated circuits operates in the order of terahertz frequency range where circuits does not require any extra power supply for operation.
{"title":"Nano-Calculator using Quantum Dot Cellular Automata (QCA)","authors":"R. Chakrabarty, S. Dutta, Maitreyee Roy Malakar, Sagar Mukherjee, Rajib Ganguly","doi":"10.1109/IEMENTECH.2017.8076967","DOIUrl":"https://doi.org/10.1109/IEMENTECH.2017.8076967","url":null,"abstract":"CMOS technology over Transistor is an important contribution in Very Large Scale Integrated technique for the last two decades. Quantum Dot Cellular Automata (QCA) brings as a replacement solution to the fundamental limits of CMOS technology. This paper is a proposal of making Quantum dot cellular automata (QCA) based Nano-calculator. In this Calculator we've simulated four basic operations: addition, subtraction, multiplication and division. QCA is an advance technology which overcomes some limitations of CMOS such as switching speed. QCA generated circuits operates in the order of terahertz frequency range where circuits does not require any extra power supply for operation.","PeriodicalId":411574,"journal":{"name":"2017 1st International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech)","volume":"43 4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117250080","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/iementech.2017.8077008
R. Garai, P. Maity, Raisana Hossain, P. Roy, T. K. Rana
Smart city is being implemented in many places where lot of modern and efficient systems have been installed to aim for a better and secured place to live in. Model of a smart village following the concept of a smart city is presented in this manuscript as the effect of integrated technological changes can be best realized in a place which has none. Thus a remote and isolated village location is chosen where the modern civilization has not touched. The design makes the village self-sufficient in respect of electric power, water supply, street lighting, security, education and communication. Application of non-conventional methods of energy generation is the key for betterment as discussed here. Renewable and non-polluted power is generated from solar heat. The heat energy is captured and stored in water for use at night and in absence of sun. The solar heat energy tapped in water is utilized to rotate the turbines to provide electric power to each house. Additional power is also generated from piezoelectric substances like PZT, incorporated in the busy corners of a village, where the stress generated by human weight while walking is converted to electricity. Energy efficient street lamps with controlled light intensity as per the requirement have been designed. Water is provided to houses in cold and hot forms. Computers, mobile application for individual and educational places will enrich the place. Normal and urgent medical facilities are introduced with the availability of uninterrupted power.
{"title":"Smart village","authors":"R. Garai, P. Maity, Raisana Hossain, P. Roy, T. K. Rana","doi":"10.1109/iementech.2017.8077008","DOIUrl":"https://doi.org/10.1109/iementech.2017.8077008","url":null,"abstract":"Smart city is being implemented in many places where lot of modern and efficient systems have been installed to aim for a better and secured place to live in. Model of a smart village following the concept of a smart city is presented in this manuscript as the effect of integrated technological changes can be best realized in a place which has none. Thus a remote and isolated village location is chosen where the modern civilization has not touched. The design makes the village self-sufficient in respect of electric power, water supply, street lighting, security, education and communication. Application of non-conventional methods of energy generation is the key for betterment as discussed here. Renewable and non-polluted power is generated from solar heat. The heat energy is captured and stored in water for use at night and in absence of sun. The solar heat energy tapped in water is utilized to rotate the turbines to provide electric power to each house. Additional power is also generated from piezoelectric substances like PZT, incorporated in the busy corners of a village, where the stress generated by human weight while walking is converted to electricity. Energy efficient street lamps with controlled light intensity as per the requirement have been designed. Water is provided to houses in cold and hot forms. Computers, mobile application for individual and educational places will enrich the place. Normal and urgent medical facilities are introduced with the availability of uninterrupted power.","PeriodicalId":411574,"journal":{"name":"2017 1st International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech)","volume":"136 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116216699","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2017-04-01DOI: 10.1109/IEMENTECH.2017.8077001
Proshikshya Mukherjee, Tapaswini Samant, Trupti Mayee, Tanmaya Swain, A. Datta
A Wireless Sensor Network (WSN) plays a very important role within the future wireless communication domain due to its intelligence, low cost and small size. With the wireless interfaces, these will communicate with one another just in case of cooperative communication in single or multiple hops. Multiple nodes are required for co-operative communication where the Stable Enable Protocol (SEP) and SEP — Vector Quantization (SEP-V) is used for cluster and active cluster head (CH) formation. Further Dijkstra Algorithm is used to find the shortest path between the active cluster heads (CHs) and high energy utilization respectively. The main issue of inter-cluster communication is carried out in earlier work using SEP and SEP-V protocols. The proposed work illustrates the SEP-Vector Quantization Dijkstra (SEP-VD) protocol, for shortest path active cluster head (CH) communication on a Cooperative communication network. From the applications point of view, SEP-VD determines the lowest energy path. SEP-V provides the intra-cluster communication between the cluster head and nodes. Using Dijkstra's Algorithm, the minimum distance is calculated connecting the active cluster heads which creates the shortest path resulting in energy efficient technique. Further the spectral distortion of the proposed technique has been analyzed for practical implementation.
{"title":"A hybrid and energy saving approach for hierarchical routing protocol using SEP-VD","authors":"Proshikshya Mukherjee, Tapaswini Samant, Trupti Mayee, Tanmaya Swain, A. Datta","doi":"10.1109/IEMENTECH.2017.8077001","DOIUrl":"https://doi.org/10.1109/IEMENTECH.2017.8077001","url":null,"abstract":"A Wireless Sensor Network (WSN) plays a very important role within the future wireless communication domain due to its intelligence, low cost and small size. With the wireless interfaces, these will communicate with one another just in case of cooperative communication in single or multiple hops. Multiple nodes are required for co-operative communication where the Stable Enable Protocol (SEP) and SEP — Vector Quantization (SEP-V) is used for cluster and active cluster head (CH) formation. Further Dijkstra Algorithm is used to find the shortest path between the active cluster heads (CHs) and high energy utilization respectively. The main issue of inter-cluster communication is carried out in earlier work using SEP and SEP-V protocols. The proposed work illustrates the SEP-Vector Quantization Dijkstra (SEP-VD) protocol, for shortest path active cluster head (CH) communication on a Cooperative communication network. From the applications point of view, SEP-VD determines the lowest energy path. SEP-V provides the intra-cluster communication between the cluster head and nodes. Using Dijkstra's Algorithm, the minimum distance is calculated connecting the active cluster heads which creates the shortest path resulting in energy efficient technique. Further the spectral distortion of the proposed technique has been analyzed for practical implementation.","PeriodicalId":411574,"journal":{"name":"2017 1st International Conference on Electronics, Materials Engineering and Nano-Technology (IEMENTech)","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2017-04-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114223516","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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