This paper present an idea about the wireless adhoc network which is used in vehicle to vehicle Anti-Collision design system for determining collision course between two or more number of vehicles. This system is giving an idea to generate node information that can be used for finding location awareness between the vehicles. Searching of other vehicles in the moving area is of primary importance to help the driver safely with negotiating speed, acceleration & deceleration. In these position the vehicle must acquire its own positional knowledge with respect to others and identify it's a possible collision. In this paper we used an active alarming system for detecting a collision between two or more numbers vehicles using GPS and IEEE802.15.4 MAC/PHY specification compatible system on chip. We design a mechanism or system for the safety coordinates of a vehicle based on its parameters i.e. distance, current speed, acceleration. This safety coordinates are used to get size of a vehicle thus detecting a possible collision. Firstly, we simulate a scenario up to nearly 10 vehicles in the area and test it practically achievable throughput using commercially available system on chip design. We simulate our result in NS2 and study the number of packet loss.
{"title":"A design approach based on design strategies and simulation of wireless adhoc communication network using intelligent transportation system","authors":"P. Ashtankar, S. Dorle","doi":"10.1109/ICCN.2015.5","DOIUrl":"https://doi.org/10.1109/ICCN.2015.5","url":null,"abstract":"This paper present an idea about the wireless adhoc network which is used in vehicle to vehicle Anti-Collision design system for determining collision course between two or more number of vehicles. This system is giving an idea to generate node information that can be used for finding location awareness between the vehicles. Searching of other vehicles in the moving area is of primary importance to help the driver safely with negotiating speed, acceleration & deceleration. In these position the vehicle must acquire its own positional knowledge with respect to others and identify it's a possible collision. In this paper we used an active alarming system for detecting a collision between two or more numbers vehicles using GPS and IEEE802.15.4 MAC/PHY specification compatible system on chip. We design a mechanism or system for the safety coordinates of a vehicle based on its parameters i.e. distance, current speed, acceleration. This safety coordinates are used to get size of a vehicle thus detecting a possible collision. Firstly, we simulate a scenario up to nearly 10 vehicles in the area and test it practically achievable throughput using commercially available system on chip design. We simulate our result in NS2 and study the number of packet loss.","PeriodicalId":431743,"journal":{"name":"2015 International Conference on Communication Networks (ICCN)","volume":"10 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134111913","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wireless Sensor Network is utilized as a part of numerous applications like defense application, surrounding observing, traffic, security, modern detecting, smart homes, computing framework security, etc. In each utilization of wireless sensor network energy is the scare assets of nodes. It drains more energy in transmissions and processing. For the purpose of conserving node's energy round robin technique for cluster head selection is used. In such manner energy can be conserved for more number of rounds. The clustering method is versatile and applied on static nodes. Here every nodes is at least once a cluster head depending on round robin method.
{"title":"Enhanced Cluster-head selection using round robin technique in WSN","authors":"Ruchi Sharma, Gunjan Jain, Shashikant Gupta","doi":"10.1109/ICCN.2015.8","DOIUrl":"https://doi.org/10.1109/ICCN.2015.8","url":null,"abstract":"Wireless Sensor Network is utilized as a part of numerous applications like defense application, surrounding observing, traffic, security, modern detecting, smart homes, computing framework security, etc. In each utilization of wireless sensor network energy is the scare assets of nodes. It drains more energy in transmissions and processing. For the purpose of conserving node's energy round robin technique for cluster head selection is used. In such manner energy can be conserved for more number of rounds. The clustering method is versatile and applied on static nodes. Here every nodes is at least once a cluster head depending on round robin method.","PeriodicalId":431743,"journal":{"name":"2015 International Conference on Communication Networks (ICCN)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130098295","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The recent development in the era of physiological instrumentation is to avoid the long duration hospitalization with the help wearable remote monitoring systems. Low power and portability along with the speed and high performance are the main issues related with such system design and their development. In this paper a wearable data acquisition system capable to measure body parameters like temperature, ECG signal and heartbeats is developed and experimented. Module functionality is realized using low power digital sensors and an ultra-low power, high performance cortex core MSP 432 microcontroller unit. Bluetooth and GSM module is used for wireless real time signal transmission. Comparative power measurements in terms of voltage and current are also done for the realized wearable module.
{"title":"Development of low power cardiac telemetry system","authors":"V. G. Girhepunje, S. Chede","doi":"10.1109/ICCN.2015.27","DOIUrl":"https://doi.org/10.1109/ICCN.2015.27","url":null,"abstract":"The recent development in the era of physiological instrumentation is to avoid the long duration hospitalization with the help wearable remote monitoring systems. Low power and portability along with the speed and high performance are the main issues related with such system design and their development. In this paper a wearable data acquisition system capable to measure body parameters like temperature, ECG signal and heartbeats is developed and experimented. Module functionality is realized using low power digital sensors and an ultra-low power, high performance cortex core MSP 432 microcontroller unit. Bluetooth and GSM module is used for wireless real time signal transmission. Comparative power measurements in terms of voltage and current are also done for the realized wearable module.","PeriodicalId":431743,"journal":{"name":"2015 International Conference on Communication Networks (ICCN)","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123065789","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This study analyses and compares the performance of 3T bulk CMOS Dynamic Random Access (DRAM) cell, 3T FinFET (Fin Field Effect Transistor) DRAM cell and 3T FinFET based Capacitor-less DRAM cell designs. The designs were done at 45nm technology. FinFET is a good candidate for replacing bulk CMOS (Complementary Metal-Oxide Semiconductor) for future nanometer scale technology. The capacitor-less DRAM utilizes a gated diode as reservoir element as opposed to capacitor, this led to reduction in leakages and access time. A gated diode is a two terminal MOS in which charge is stored when gate to source voltage is greater than the threshold voltage; otherwise a negligible charge is stored. Memory design is one of the interesting subjects in semiconductor technology. Many modern processors use DRAM for on chip data and program memory. DRAM has dominated solid state memories used for primary storage in most advanced processors as compared to SRAM (Static Random Access Memory), because it occupies less area per cell. Off-state leakage is the major drawback of DRAM, so improving this leakage power will be critical to the system power dissipation. The three cells were designed and their average power, leakage parameters and noise were simulated on Cadence Virtuoso tool and the results were analyzed. We investigate that the use of FinFET Technology improves the performance of the DRAM as compared to bulk CMOS and also compare it to the DRAM with gated-diode. In this work it has shown that the 3T FinFET with gated-diode as the capacitor has better performance in terms of leakage parameters.
本研究分析并比较了3T体CMOS动态随机存取(DRAM)单元、3T FinFET (Fin Field Effect Transistor) DRAM单元和基于3T FinFET的无电容DRAM单元设计的性能。设计采用45纳米技术。在未来的纳米尺度技术中，FinFET是取代大块CMOS(互补金属氧化物半导体)的一个很好的候选者。无电容DRAM采用门控二极管作为储层元件而不是电容器，从而减少了泄漏和访问时间。门控二极管是当栅源电压大于阈值电压时存储电荷的双端MOS;否则，存储的电荷可以忽略不计。存储器设计是半导体技术中一个有趣的课题。许多现代处理器使用DRAM作为片上数据和程序存储器。与SRAM(静态随机存取存储器)相比，DRAM在大多数高级处理器中主要用于固态存储器，因为它每个单元占用的面积更小。失态泄漏是DRAM的主要缺点，因此提高失态泄漏功率对系统功耗至关重要。对三种电池进行了设计，并在Cadence Virtuoso工具上对其平均功率、泄漏参数和噪声进行了仿真，并对结果进行了分析。我们研究了FinFET技术的使用提高了DRAM与批量CMOS的性能，并将其与具有门控二极管的DRAM进行了比较。研究表明，以栅极二极管为电容的3T FinFET在泄漏参数方面具有更好的性能。
{"title":"Comparative Evaluation of different 3T DRAM Cells at 45nm Technology","authors":"Peter Bukelani Musiiwa, S. Akashe","doi":"10.1109/ICCN.2015.16","DOIUrl":"https://doi.org/10.1109/ICCN.2015.16","url":null,"abstract":"This study analyses and compares the performance of 3T bulk CMOS Dynamic Random Access (DRAM) cell, 3T FinFET (Fin Field Effect Transistor) DRAM cell and 3T FinFET based Capacitor-less DRAM cell designs. The designs were done at 45nm technology. FinFET is a good candidate for replacing bulk CMOS (Complementary Metal-Oxide Semiconductor) for future nanometer scale technology. The capacitor-less DRAM utilizes a gated diode as reservoir element as opposed to capacitor, this led to reduction in leakages and access time. A gated diode is a two terminal MOS in which charge is stored when gate to source voltage is greater than the threshold voltage; otherwise a negligible charge is stored. Memory design is one of the interesting subjects in semiconductor technology. Many modern processors use DRAM for on chip data and program memory. DRAM has dominated solid state memories used for primary storage in most advanced processors as compared to SRAM (Static Random Access Memory), because it occupies less area per cell. Off-state leakage is the major drawback of DRAM, so improving this leakage power will be critical to the system power dissipation. The three cells were designed and their average power, leakage parameters and noise were simulated on Cadence Virtuoso tool and the results were analyzed. We investigate that the use of FinFET Technology improves the performance of the DRAM as compared to bulk CMOS and also compare it to the DRAM with gated-diode. In this work it has shown that the 3T FinFET with gated-diode as the capacitor has better performance in terms of leakage parameters.","PeriodicalId":431743,"journal":{"name":"2015 International Conference on Communication Networks (ICCN)","volume":"52 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127243958","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, it is analyzed the performance of routing protocols based on the evaluation of different parameters used in MANETs (Mobile Ad-Hoc Networks). The results show that DSR provides better throughput as compared to AODV in lower mobility Scenario. At the same time, it also gives less number of drop packets and low End-to-End delay as compared to AODV in lower mobility. Therefore it concludes that the performance of DSR over AODV is better in this scenario.
{"title":"Analyzing the performance of routing protocols based on evaluation of different parameters in MANETs","authors":"S. Srivastava, R. Raut, P. Karule","doi":"10.1109/ICCN.2015.50","DOIUrl":"https://doi.org/10.1109/ICCN.2015.50","url":null,"abstract":"In this paper, it is analyzed the performance of routing protocols based on the evaluation of different parameters used in MANETs (Mobile Ad-Hoc Networks). The results show that DSR provides better throughput as compared to AODV in lower mobility Scenario. At the same time, it also gives less number of drop packets and low End-to-End delay as compared to AODV in lower mobility. Therefore it concludes that the performance of DSR over AODV is better in this scenario.","PeriodicalId":431743,"journal":{"name":"2015 International Conference on Communication Networks (ICCN)","volume":"97 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126891058","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Today, Cloud computing has been rising as new technology as well as new business model. The increasing cloud computing services offer great opportunities for clients to find the maximum service at finest pricing, which however raises new challenges on how to select the best service out of the huge group. A variety of computing resources facilitate the execution of tasks in Cloud computing environment. Therefore, it becomes necessary to select appropriate node for executing a task which enhances the performance of large-scale cloud computing environment. It is time-consuming for consumers to collect the necessary information and analyze all service providers to make the decision. This is also a highly demanding task from a computational perspective, because the same computations may be conducted repeatedly by multiple consumers who have similar requirements. Load balancing is the process of distributing the load among various nodes of a distributed system to improve both resource utilization and job response time. Load balancing ensures that all the processor in the system does approximately an equal amount of work at any instant of time. CloudAnalyst is a tool that helps developers to simulate large-scale Cloud applications with the purpose of understanding performance of such applications under various deployment configurations. The simulated results provided in this paper based on the scheduling algorithm Three level hierarchical load balancing policy is being compared with different algorithm to estimate response time.
{"title":"Effective selection of node for cloud environment using makespan","authors":"Kunjal Garala, Hemanshi Dobariya","doi":"10.1109/ICCN.2015.28","DOIUrl":"https://doi.org/10.1109/ICCN.2015.28","url":null,"abstract":"Today, Cloud computing has been rising as new technology as well as new business model. The increasing cloud computing services offer great opportunities for clients to find the maximum service at finest pricing, which however raises new challenges on how to select the best service out of the huge group. A variety of computing resources facilitate the execution of tasks in Cloud computing environment. Therefore, it becomes necessary to select appropriate node for executing a task which enhances the performance of large-scale cloud computing environment. It is time-consuming for consumers to collect the necessary information and analyze all service providers to make the decision. This is also a highly demanding task from a computational perspective, because the same computations may be conducted repeatedly by multiple consumers who have similar requirements. Load balancing is the process of distributing the load among various nodes of a distributed system to improve both resource utilization and job response time. Load balancing ensures that all the processor in the system does approximately an equal amount of work at any instant of time. CloudAnalyst is a tool that helps developers to simulate large-scale Cloud applications with the purpose of understanding performance of such applications under various deployment configurations. The simulated results provided in this paper based on the scheduling algorithm Three level hierarchical load balancing policy is being compared with different algorithm to estimate response time.","PeriodicalId":431743,"journal":{"name":"2015 International Conference on Communication Networks (ICCN)","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127837162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Nowadays, with technological advancement, it is simple for miscreants produce unlawful multimedia information duplicates. Different methods for copyright insurance of free information are being produced every day. Digital watermarking is a procedure, where computerized inserting of the copyright data/watermark into the information to be ensured. The two different major methods for doing as such are the robust transform domain and spatial domain. In this paper combination of fingerprint verification methods with watermarking technology to provide copyright protection and authentication of digital images is proposed. In proposing technique for better accuracy combine DWT with RSA and LSB. The proposed approach gives perfect results from previous work. In this study, we calculate false matching ratio (FMR), false acceptance ratio (FAR), mean square error (MSE), accuracy and peak signal noise ratio (PSNR). The experimental outcomes for FMR and FRR are 0.01% and 9.99%. PSNR value is varying from 70-95%. MSE lies between 0 and 7. Also, we applied attacks on watermarked image (like noise and rotate). Also, calculate accuracy of each image and it is lie between 60-75%.
{"title":"Fingerprint watermarking and steganography for ATM transaction using LSB-RSA and 3-DWT algorithm","authors":"Mayank Garg, Shashikant Gupta, P. Khatri","doi":"10.1109/ICCN.2015.48","DOIUrl":"https://doi.org/10.1109/ICCN.2015.48","url":null,"abstract":"Nowadays, with technological advancement, it is simple for miscreants produce unlawful multimedia information duplicates. Different methods for copyright insurance of free information are being produced every day. Digital watermarking is a procedure, where computerized inserting of the copyright data/watermark into the information to be ensured. The two different major methods for doing as such are the robust transform domain and spatial domain. In this paper combination of fingerprint verification methods with watermarking technology to provide copyright protection and authentication of digital images is proposed. In proposing technique for better accuracy combine DWT with RSA and LSB. The proposed approach gives perfect results from previous work. In this study, we calculate false matching ratio (FMR), false acceptance ratio (FAR), mean square error (MSE), accuracy and peak signal noise ratio (PSNR). The experimental outcomes for FMR and FRR are 0.01% and 9.99%. PSNR value is varying from 70-95%. MSE lies between 0 and 7. Also, we applied attacks on watermarked image (like noise and rotate). Also, calculate accuracy of each image and it is lie between 60-75%.","PeriodicalId":431743,"journal":{"name":"2015 International Conference on Communication Networks (ICCN)","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2015-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121843972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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