Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471020
Grace Metri, Abhishek Agrawal, R. Peri, M. Brockmeyer, Weisong Shi
Smartphones and tablets are enabling people to perform day to day tasks which were previously impossible to perform without a personal computer. Smartphones and tablets are, by nature, highly dependent on battery life. As a result, a major challenge faced by developers is to understand how their software impact power usage of a device because users of applications tend to evaluate an application not just by its utility and performance but by its impact on battery drainage as well. As a result, developers need to debug the energy efficiency of their applications alongside debugging their performance. In this paper, we explain the power profiling techniques used to determine energy efficiency of applications on Android devices. We also introduce our Software Power Monitor (SoftPowerMon) tool which can aid developers debug applications from an energy perspective and can even help platform developers' develop more efficient systems. Then, using SoftPowerMon, we power profile three different devices: two smartphones and a tablet. We conclude by comparing the performance overhead of our tool to other tools and we show that SoftPowerMon can answer “why” a specific amount of power is consumed on a device as opposed to “how much” power is consumed.
{"title":"A simplistic way for power profiling of mobile devices","authors":"Grace Metri, Abhishek Agrawal, R. Peri, M. Brockmeyer, Weisong Shi","doi":"10.1109/ICEAC.2012.6471020","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471020","url":null,"abstract":"Smartphones and tablets are enabling people to perform day to day tasks which were previously impossible to perform without a personal computer. Smartphones and tablets are, by nature, highly dependent on battery life. As a result, a major challenge faced by developers is to understand how their software impact power usage of a device because users of applications tend to evaluate an application not just by its utility and performance but by its impact on battery drainage as well. As a result, developers need to debug the energy efficiency of their applications alongside debugging their performance. In this paper, we explain the power profiling techniques used to determine energy efficiency of applications on Android devices. We also introduce our Software Power Monitor (SoftPowerMon) tool which can aid developers debug applications from an energy perspective and can even help platform developers' develop more efficient systems. Then, using SoftPowerMon, we power profile three different devices: two smartphones and a tablet. We conclude by comparing the performance overhead of our tool to other tools and we show that SoftPowerMon can answer “why” a specific amount of power is consumed on a device as opposed to “how much” power is consumed.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129033987","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471003
Grace Metri, Abhishek Agrawal, R. Peri, Weisong Shi
Smartphones emerged as the new necessary gadget to many. A smartphone can combine some or all functionalities of several other devices such as a personal computer, phone, personal game console, music player, radio, and/or GPS. Unlike most of the above listed technologies which are switched ON on a need-to basis, a smartphone is always ON. Since a smartphone can run background tasks even during idle mode and since it is limited by its battery life, it becomes necessary to understand what really happens in the background and how it affects the battery life and consequently how to improve it. To this end, we analyzed two smartphone platforms specifically looking at how the energy consumption varies depending on the background applications and network connection type. For instance, we show that you can increase the energy efficiency of an iPhone by up to 59% when streaming music on Wi-Fi as opposed to 3G. Also, when the phone is using 3G, we show that network applications running in the background can reduce the energy efficiency of an iPhone by up to 72% when compared to real idle state. Our observation sheds light on what is eating up the battery life of a smartphone and led us to provide optimization techniques to increase the battery life.
{"title":"What is eating up battery life on my SmartPhone: A case study","authors":"Grace Metri, Abhishek Agrawal, R. Peri, Weisong Shi","doi":"10.1109/ICEAC.2012.6471003","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471003","url":null,"abstract":"Smartphones emerged as the new necessary gadget to many. A smartphone can combine some or all functionalities of several other devices such as a personal computer, phone, personal game console, music player, radio, and/or GPS. Unlike most of the above listed technologies which are switched ON on a need-to basis, a smartphone is always ON. Since a smartphone can run background tasks even during idle mode and since it is limited by its battery life, it becomes necessary to understand what really happens in the background and how it affects the battery life and consequently how to improve it. To this end, we analyzed two smartphone platforms specifically looking at how the energy consumption varies depending on the background applications and network connection type. For instance, we show that you can increase the energy efficiency of an iPhone by up to 59% when streaming music on Wi-Fi as opposed to 3G. Also, when the phone is using 3G, we show that network applications running in the background can reduce the energy efficiency of an iPhone by up to 72% when compared to real idle state. Our observation sheds light on what is eating up the battery life of a smartphone and led us to provide optimization techniques to increase the battery life.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"2014 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130267426","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471006
K. Schröder, W. Nebel
This paper introduces a method to accomplish specific target loads in virtualization based data centers. Within the last few years, the development of data centers moved into high-grade flexible architectures that adapt to the needs (by means of virtualization). This flexibility can be used by load management methods to minimize and also to manipulate the energy demand in order to adapt to price fluctuations and to prevent demand peaks in power grid as well. We developed a method that is able to accomplish specific load profile optimized for this. Estimations done show that the chosen approach satisfies this task very well.
{"title":"Demand response and site management for cloud based Services","authors":"K. Schröder, W. Nebel","doi":"10.1109/ICEAC.2012.6471006","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471006","url":null,"abstract":"This paper introduces a method to accomplish specific target loads in virtualization based data centers. Within the last few years, the development of data centers moved into high-grade flexible architectures that adapt to the needs (by means of virtualization). This flexibility can be used by load management methods to minimize and also to manipulate the energy demand in order to adapt to price fluctuations and to prevent demand peaks in power grid as well. We developed a method that is able to accomplish specific load profile optimized for this. Estimations done show that the chosen approach satisfies this task very well.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"447 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132994991","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471016
R. Khanna, Jaiber John, Thanunathan Rangarajan
The increasing trend of high density computing environments have exacerbated the cooling infrastructure of the modern datacenters which contributes to mounting energy costs due to uncoordinated operation. By integrating information technology and infrastructure management through continuous monitoring, a balance between energy requirements of compute and cooling equipment can be achieved. Building an online thermal profile calculation with certain measure of accuracy is a complex problem due to the number of variables involved. In this paper we propose a phase-aware workload placement scheme that helps in reducing thermal variance in a cluster of compute nodes. We use a phase-aware machine learning approach to forecast server thermal profile which is then used for predicting the cluster-level thermal variance. We leverage Intel Xeon class server platform sensors and machine monitoring capability for fine grained assessment of power, thermal and compute utilization. We are able achieve thermal balance by applying intelligent placement algorithms by predetermining the thermal impact of a variation in workload's utilization on a prospective cluster of server using the forecasted temperature. Results from a prototype implementation on a typical server-cluster environment have demonstrated accurate thermal prediction and significant reduction in thermal variance.
{"title":"Phase-aware predictive thermal modeling for proactive load-balancing of compute clusters","authors":"R. Khanna, Jaiber John, Thanunathan Rangarajan","doi":"10.1109/ICEAC.2012.6471016","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471016","url":null,"abstract":"The increasing trend of high density computing environments have exacerbated the cooling infrastructure of the modern datacenters which contributes to mounting energy costs due to uncoordinated operation. By integrating information technology and infrastructure management through continuous monitoring, a balance between energy requirements of compute and cooling equipment can be achieved. Building an online thermal profile calculation with certain measure of accuracy is a complex problem due to the number of variables involved. In this paper we propose a phase-aware workload placement scheme that helps in reducing thermal variance in a cluster of compute nodes. We use a phase-aware machine learning approach to forecast server thermal profile which is then used for predicting the cluster-level thermal variance. We leverage Intel Xeon class server platform sensors and machine monitoring capability for fine grained assessment of power, thermal and compute utilization. We are able achieve thermal balance by applying intelligent placement algorithms by predetermining the thermal impact of a variation in workload's utilization on a prospective cluster of server using the forecasted temperature. Results from a prototype implementation on a typical server-cluster environment have demonstrated accurate thermal prediction and significant reduction in thermal variance.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"70 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131298729","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471008
Sheng Guo, Yong Zhang, Zhikai Song, Fan Shu
Power saving is an important user experience for the applications running on Ultrabook, the next generation mobile PC platform with more portable features. However, traditional PC games, as one kind of the primary applications on Ultrabook, have few energy efficiency concern and practice so far. This paper analyzes the property & strategy of PC game power optimization, presents the practical optimization methods and the tools available for game developers. The Case study of a real game optimized with these methods and tools indicates the obvious power improvement.
{"title":"Optimize power for portable games on Ultrabook","authors":"Sheng Guo, Yong Zhang, Zhikai Song, Fan Shu","doi":"10.1109/ICEAC.2012.6471008","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471008","url":null,"abstract":"Power saving is an important user experience for the applications running on Ultrabook, the next generation mobile PC platform with more portable features. However, traditional PC games, as one kind of the primary applications on Ultrabook, have few energy efficiency concern and practice so far. This paper analyzes the property & strategy of PC game power optimization, presents the practical optimization methods and the tools available for game developers. The Case study of a real game optimized with these methods and tools indicates the obvious power improvement.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"158 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123896828","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471009
A. Sil, K. Balusu, Venkat Yalamanchili, R. Challa, Neeharikha Gogineni, M. Bayoumi
Due to limited life-time of battery, the energy constrained system for sensor platform has drawn a strong interest for ultra-low power research in recent years. In this paper, an energy efficient 32-bit RISC processor is discussed. The design is targeted for branch and data intensive computations. The design includes both architectural and circuit techniques to optimize energy consumption. An advance branch technique is introduced to reduce stalls in branch intensive application, which in turn decreases energy wastage due to incorrect branch decision. Architectural innovation also includes low power data memory access policy. On the circuit front, energy consumption is minimized by scaling down the supply voltage near to threshold. The 24Kb memory incorporates subthreshold 6T SRAM cell to ensure read stability at subthreshold voltage down to 0.18V. The design consumes 562pJ/instruction at optimal core and memory supply 0.5V and 0.33V respectively, for operating frequency 650KHz in 90nm technology.
{"title":"An energy-efficient 32-bit RISC processor for sensor platform in 90nm technology","authors":"A. Sil, K. Balusu, Venkat Yalamanchili, R. Challa, Neeharikha Gogineni, M. Bayoumi","doi":"10.1109/ICEAC.2012.6471009","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471009","url":null,"abstract":"Due to limited life-time of battery, the energy constrained system for sensor platform has drawn a strong interest for ultra-low power research in recent years. In this paper, an energy efficient 32-bit RISC processor is discussed. The design is targeted for branch and data intensive computations. The design includes both architectural and circuit techniques to optimize energy consumption. An advance branch technique is introduced to reduce stalls in branch intensive application, which in turn decreases energy wastage due to incorrect branch decision. Architectural innovation also includes low power data memory access policy. On the circuit front, energy consumption is minimized by scaling down the supply voltage near to threshold. The 24Kb memory incorporates subthreshold 6T SRAM cell to ensure read stability at subthreshold voltage down to 0.18V. The design consumes 562pJ/instruction at optimal core and memory supply 0.5V and 0.33V respectively, for operating frequency 650KHz in 90nm technology.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116558052","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471024
Sarah Abdallah, A. Chehab, I. Elhajj, A. Kayssi
Many emerging computer applications may be classified into recognition, mining, and synthesis (RMS) applications, or into stream-based media applications. One interesting and useful property of such applications is that they are tolerant to errors. In fact, these applications allow discrepancies in intermediate computations, but nevertheless are able to provide “acceptable” results. Research in this area leveraged this error tolerance in order to relax the zero-error tolerance requirement at the hardware level, and to shift error correction or concealment to the software application level. The main advantage of using such stochastic hardware architectures is in the major energy savings that are obtained since the circuits can be operated at reduced power supply levels. The hardware errors may be due to different components in the computer system. The purpose of this paper is to conduct a survey on techniques used in the design of stochastic architectures.
{"title":"Stochastic hardware architectures: A survey","authors":"Sarah Abdallah, A. Chehab, I. Elhajj, A. Kayssi","doi":"10.1109/ICEAC.2012.6471024","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471024","url":null,"abstract":"Many emerging computer applications may be classified into recognition, mining, and synthesis (RMS) applications, or into stream-based media applications. One interesting and useful property of such applications is that they are tolerant to errors. In fact, these applications allow discrepancies in intermediate computations, but nevertheless are able to provide “acceptable” results. Research in this area leveraged this error tolerance in order to relax the zero-error tolerance requirement at the hardware level, and to shift error correction or concealment to the software application level. The main advantage of using such stochastic hardware architectures is in the major energy savings that are obtained since the circuits can be operated at reduced power supply levels. The hardware errors may be due to different components in the computer system. The purpose of this paper is to conduct a survey on techniques used in the design of stochastic architectures.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117306558","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471023
K. Gharehbaghi, H. Uluşan, Ö. Zorlu, A. Muhtaroğlu, H. Kulah
In this paper a 90 nm power management circuit for vibration based electromagnetic energy harvesters is introduced to generate 1 V from the rectified DC voltage. A mode selector block is designed to detect the output DC voltage level of the rectifier and adjust the mode of the driver block. In order to set the output to the desired level, a regulation system with negative feedback topology is utilized. The circuit is able to operate with input voltages as low as 0.25 V. The simulation results also show that the power conversion efficiency of the regulated system is almost constant for wide range of input voltages.
{"title":"A fully integrated power management circuit for electromagnetic energy harvesting applications","authors":"K. Gharehbaghi, H. Uluşan, Ö. Zorlu, A. Muhtaroğlu, H. Kulah","doi":"10.1109/ICEAC.2012.6471023","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471023","url":null,"abstract":"In this paper a 90 nm power management circuit for vibration based electromagnetic energy harvesters is introduced to generate 1 V from the rectified DC voltage. A mode selector block is designed to detect the output DC voltage level of the rectifier and adjust the mode of the driver block. In order to set the output to the desired level, a regulation system with negative feedback topology is utilized. The circuit is able to operate with input voltages as low as 0.25 V. The simulation results also show that the power conversion efficiency of the regulated system is almost constant for wide range of input voltages.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121049792","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471015
Esmaeil Amini, Z. Jeddi, S. Farah, M. Bayoumi
In this paper, we first introduce a parallel Elliptic Curve Cryptography (ECC) architecture that performs the operations required for ECC scalar point multiplication on GF(2m) operands and then we analyze the performance metrics of the architecture. The architecture is modular, can handle various operands sizes. The architecture performs several different operations in parallel when each operation requires small key size and uses power gating technique to deactivate the unutilized modules to save power. An exhaustive simulation-based study of the different performance aspect of architecture is provided considering the input data patterns, the granularity of the system and the parallelism level of the architecture.
{"title":"Comparing performance metrics of a parallel ECC architecture vs. input data patterns and granularity","authors":"Esmaeil Amini, Z. Jeddi, S. Farah, M. Bayoumi","doi":"10.1109/ICEAC.2012.6471015","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471015","url":null,"abstract":"In this paper, we first introduce a parallel Elliptic Curve Cryptography (ECC) architecture that performs the operations required for ECC scalar point multiplication on GF(2m) operands and then we analyze the performance metrics of the architecture. The architecture is modular, can handle various operands sizes. The architecture performs several different operations in parallel when each operation requires small key size and uses power gating technique to deactivate the unutilized modules to save power. An exhaustive simulation-based study of the different performance aspect of architecture is provided considering the input data patterns, the granularity of the system and the parallelism level of the architecture.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"112 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116618524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471022
R. Awwad, Ripan Das, T. Arabi, Hazem M. Hajj
Users of mobile devices typically charge their devices over night. In these situations, it is acceptable to the users for the phone to take several hours to charge. But at times, such as when traveling, users want fast charging for their devices, and would like to have the battery maintain high charging capacity for an extended period without need to recharge. However, the battery's charging capacity diminishes after many charging and discharging cycles. At that point, the mobile device starts requiring more frequent charging, which becomes very disruptive for travelers. As a result, fast charging and maintaining battery quality and capacity retention over extended number of charging-discharging cycles is a valuable user experience for mobile device users. Traditional constant current constant voltage(CC-CV) charging methods require higher density batteries to be charged with lower charging current leading to long charging time up to 4.5 hrs - 5hrs. In this paper, we propose an alternative faster approach to battery charging based on multi-rate decisions without compromising battery longevity. Our experiments show that the battery charge time can be increased by ~ 3x, leading to 1.2hrs time needed to charge. The results also show that the battery can be charged beyond 100% rated capacity to almost 102.5% and still maintaining lower skin temperature.
{"title":"A fast charging Multi-C technique for mobile devices","authors":"R. Awwad, Ripan Das, T. Arabi, Hazem M. Hajj","doi":"10.1109/ICEAC.2012.6471022","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471022","url":null,"abstract":"Users of mobile devices typically charge their devices over night. In these situations, it is acceptable to the users for the phone to take several hours to charge. But at times, such as when traveling, users want fast charging for their devices, and would like to have the battery maintain high charging capacity for an extended period without need to recharge. However, the battery's charging capacity diminishes after many charging and discharging cycles. At that point, the mobile device starts requiring more frequent charging, which becomes very disruptive for travelers. As a result, fast charging and maintaining battery quality and capacity retention over extended number of charging-discharging cycles is a valuable user experience for mobile device users. Traditional constant current constant voltage(CC-CV) charging methods require higher density batteries to be charged with lower charging current leading to long charging time up to 4.5 hrs - 5hrs. In this paper, we propose an alternative faster approach to battery charging based on multi-rate decisions without compromising battery longevity. Our experiments show that the battery charge time can be increased by ~ 3x, leading to 1.2hrs time needed to charge. The results also show that the battery can be charged beyond 100% rated capacity to almost 102.5% and still maintaining lower skin temperature.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"13 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134249991","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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