Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471017
H. Uluşan, K. Gharehbaghi, Ö. Zorlu, A. Muhtaroğlu, H. Kulah
This paper presents a fully self-powered low voltage and low power active rectifier circuit for vibration-based electromagnetic (EM) energy harvesters. A passive AC/DC doubler is used to provide a supply voltage for the active rectifier circuit. The proposed circuit is designed using standard 90 nm TSMC CMOS technology. The simulation results show that the proposed active rectifier circuit has voltage conversion ratio higher than 150% when the input peak voltage is more than 100 mV at open-load condition. The maximum power conversion efficiency of the circuit is 92% with 500 mV input peak voltage and 40 kΩ load resistance. Moreover, the rectifier is able to operate with low frequency input signals commonly available from vibrational energy harvesters.
{"title":"A self-powered rectifier circuit for low-voltage energy harvesting applications","authors":"H. Uluşan, K. Gharehbaghi, Ö. Zorlu, A. Muhtaroğlu, H. Kulah","doi":"10.1109/ICEAC.2012.6471017","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471017","url":null,"abstract":"This paper presents a fully self-powered low voltage and low power active rectifier circuit for vibration-based electromagnetic (EM) energy harvesters. A passive AC/DC doubler is used to provide a supply voltage for the active rectifier circuit. The proposed circuit is designed using standard 90 nm TSMC CMOS technology. The simulation results show that the proposed active rectifier circuit has voltage conversion ratio higher than 150% when the input peak voltage is more than 100 mV at open-load condition. The maximum power conversion efficiency of the circuit is 92% with 500 mV input peak voltage and 40 kΩ load resistance. Moreover, the rectifier is able to operate with low frequency input signals commonly available from vibrational energy harvesters.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"306 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116339592","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471025
F. Saab, I. Elhajj, A. Chehab, A. Kayssi
One of the serious challenges facing smartphones and other portable devices is battery life. We aim at improving the energy efficiency of multimedia applications for improved battery life while maintaining an acceptable level of user experience. In this paper, we design a stochastic processing technique for JPEG to limit its energy consumption particularly on mobile devices. This is a first step towards improving the energy efficiency for MPEG, since video streaming and conferencing applications are some of the most energy-consuming applications. We demonstrate the feasibility of using stochastic processing for multimedia encoders and analyze the resulting energy savings.
{"title":"Energy efficient JPEG using stochastic processing","authors":"F. Saab, I. Elhajj, A. Chehab, A. Kayssi","doi":"10.1109/ICEAC.2012.6471025","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471025","url":null,"abstract":"One of the serious challenges facing smartphones and other portable devices is battery life. We aim at improving the energy efficiency of multimedia applications for improved battery life while maintaining an acceptable level of user experience. In this paper, we design a stochastic processing technique for JPEG to limit its energy consumption particularly on mobile devices. This is a first step towards improving the energy efficiency for MPEG, since video streaming and conferencing applications are some of the most energy-consuming applications. We demonstrate the feasibility of using stochastic processing for multimedia encoders and analyze the resulting energy savings.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"94 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133447171","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471012
Stefan Janacek, K. Schröder, Gunnar Schomaker, W. Nebel, Marco Ruschen, Gunter Pistoor
Power demand of data centers is a topic of great interest and numerous research papers. Most handle power saving by using virtualization technologies and server consolidation. In this position paper, we propose the idea of approaching a specific power consumption of an entire data center by using virtual machine migration strategies. To achieve this goal, several models of data center components are needed. We illustrate the models we developed as well as the measurement set-up and results we have. These are especially models for server power estimation and for a virtual machine power breakdown. At the end of the paper, we present our further ideas and future research intentions.
{"title":"Modeling and approaching a cost transparent, specific data center power consumption","authors":"Stefan Janacek, K. Schröder, Gunnar Schomaker, W. Nebel, Marco Ruschen, Gunter Pistoor","doi":"10.1109/ICEAC.2012.6471012","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471012","url":null,"abstract":"Power demand of data centers is a topic of great interest and numerous research papers. Most handle power saving by using virtualization technologies and server consolidation. In this position paper, we propose the idea of approaching a specific power consumption of an entire data center by using virtual machine migration strategies. To achieve this goal, several models of data center components are needed. We illustrate the models we developed as well as the measurement set-up and results we have. These are especially models for server power estimation and for a virtual machine power breakdown. At the end of the paper, we present our further ideas and future research intentions.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"71 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127615230","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471010
W. Pathirana, A. Muhtaroğlu
A novel interface circuit topology with power management is presented for ultra-low voltage DC-DC step-up conversion. The proposed 90 nm CMOS circuit avoids off-chip components or non-standards processes, and is suitable for ultralow voltage system-on-chip applications. Comparative analysis was performed with a commercial low voltage DC-DC converter to identify the relative advantages and disadvantages of the integrated approach. The circuit can be started up from input voltage as low as 0.2V based on the simulations, and generates 2.3V with 12% of maximum efficiency.
{"title":"Low voltage DC-DC conversion without magnetic components for energy harvesting","authors":"W. Pathirana, A. Muhtaroğlu","doi":"10.1109/ICEAC.2012.6471010","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471010","url":null,"abstract":"A novel interface circuit topology with power management is presented for ultra-low voltage DC-DC step-up conversion. The proposed 90 nm CMOS circuit avoids off-chip components or non-standards processes, and is suitable for ultralow voltage system-on-chip applications. Comparative analysis was performed with a commercial low voltage DC-DC converter to identify the relative advantages and disadvantages of the integrated approach. The circuit can be started up from input voltage as low as 0.2V based on the simulations, and generates 2.3V with 12% of maximum efficiency.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114483106","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471001
K. Salah, A. El-Rouby, H. Ragai, Y. Ismail
The effects of substrate doping density on the electrical performance of a TSV are investigated in this paper. The previously introduced lumped circuit model for TSV structure is used for a lightly-doped silicon structure. A new lumped circuit model based on the field distribution in a heavily-doped silicon substrate is proposed and its physical understanding is explained. Both circuit models for the lightly-doped and heavily-doped cases are validated using full-wave simulations up to 10 GHz.
{"title":"Effect of non-uniform substrate doping profile on the electrical performance of through-silicon-via for low power application","authors":"K. Salah, A. El-Rouby, H. Ragai, Y. Ismail","doi":"10.1109/ICEAC.2012.6471001","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471001","url":null,"abstract":"The effects of substrate doping density on the electrical performance of a TSV are investigated in this paper. The previously introduced lumped circuit model for TSV structure is used for a lightly-doped silicon structure. A new lumped circuit model based on the field distribution in a heavily-doped silicon substrate is proposed and its physical understanding is explained. Both circuit models for the lightly-doped and heavily-doped cases are validated using full-wave simulations up to 10 GHz.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121356034","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-12-01DOI: 10.1109/ICEAC.2012.6471005
T. Schluessler, Jacky Romano, Stas Gurtovoy, Guy Zadicario, James Fox
Rendering 3D workloads using the least power possible is an increasingly important quality of computing platforms. Current platforms do not achieve this goal because they power the Central Processing Units (CPUs) at frequencies above the minimum required for these workloads to operate without performance loss. Higher than necessary frequencies yield greater than necessary power consumption. This paper describes a method for limiting CPU frequency while running 3D workloads to reduce power consumption with minimal performance loss. Using this method on an Intel® 3rd generation CoreTM processor reduces CPU power consumption by an average of 9% with no significant performance impact.
{"title":"Limiting CPU power consumption for efficient computation of 3D workloads","authors":"T. Schluessler, Jacky Romano, Stas Gurtovoy, Guy Zadicario, James Fox","doi":"10.1109/ICEAC.2012.6471005","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471005","url":null,"abstract":"Rendering 3D workloads using the least power possible is an increasingly important quality of computing platforms. Current platforms do not achieve this goal because they power the Central Processing Units (CPUs) at frequencies above the minimum required for these workloads to operate without performance loss. Higher than necessary frequencies yield greater than necessary power consumption. This paper describes a method for limiting CPU frequency while running 3D workloads to reduce power consumption with minimal performance loss. Using this method on an Intel® 3rd generation CoreTM processor reduces CPU power consumption by an average of 9% with no significant performance impact.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"26 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2012-12-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132278111","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2011-11-01DOI: 10.1109/ICEAC.2012.6471007
D. Browning, A. M. E. Ansary, M. Shalaby
Notebook and Laptop Original Equipment Manufacturers (OEMs) place great emphasis on creating unique system designs to differentiate themselves in the mobile market. These systems are developed from the `outside in' with the focus on how the system is perceived by the end-user. As a consequence, very little consideration is given to the interconnections or power of the devices within the system with a mentality of `just make it fit'. In this paper we discuss the challenges of Notebook system design and the steps by which system floor-planning tools and algorithms can be used to provide an automated method to optimize this process to ensure all required components most optimally fit inside the Notebook system.
{"title":"System floorplanning optimization","authors":"D. Browning, A. M. E. Ansary, M. Shalaby","doi":"10.1109/ICEAC.2012.6471007","DOIUrl":"https://doi.org/10.1109/ICEAC.2012.6471007","url":null,"abstract":"Notebook and Laptop Original Equipment Manufacturers (OEMs) place great emphasis on creating unique system designs to differentiate themselves in the mobile market. These systems are developed from the `outside in' with the focus on how the system is perceived by the end-user. As a consequence, very little consideration is given to the interconnections or power of the devices within the system with a mentality of `just make it fit'. In this paper we discuss the challenges of Notebook system design and the steps by which system floor-planning tools and algorithms can be used to provide an automated method to optimize this process to ensure all required components most optimally fit inside the Notebook system.","PeriodicalId":436221,"journal":{"name":"2012 International Conference on Energy Aware Computing","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2011-11-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121078193","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：