Most of the photo voltaic (PV) arrays often work in harsh outdoor environment, and undergo various faults, such as local material aging, shading, open circuit, short circuit and so on. The generation of these faults will reduce the power generation efficiency, and when a fault occurs in a PV model, the PV model and the systems connected to it are also damaged. In this paper, an on-line distributed monitoring system based on XBee wireless sensors network is designed to monitor the output current, voltage and irradiation of each PV module, and the temperature and the irradiation of the environment. A simulation PV module model is established, based on which some common faults are simulated and fault training samples are obtained. Finally, a memetic algorithm optimized Back Propagation ANN fault diagnosis model is built and trained by the fault samples data. Experiment result shows that the system can detect the common faults of PV array with high accuracy.
{"title":"Dynamic Monitoring and Optimization of Fault Diagnosis of Photo Voltaic Solar Power System Using ANN and Memetic Algorithm","authors":"B. Ganeshprabu, M. Geethanjali","doi":"10.4236/CS.2016.711300","DOIUrl":"https://doi.org/10.4236/CS.2016.711300","url":null,"abstract":"Most of the photo voltaic (PV) arrays often work in harsh outdoor environment, and undergo various faults, such as local material aging, shading, open circuit, short circuit and so on. The generation of these faults will reduce the power generation efficiency, and when a fault occurs in a PV model, the PV model and the systems connected to it are also damaged. In this paper, an on-line distributed monitoring system based on XBee wireless sensors network is designed to monitor the output current, voltage and irradiation of each PV module, and the temperature and the irradiation of the environment. A simulation PV module model is established, based on which some common faults are simulated and fault training samples are obtained. Finally, a memetic algorithm optimized Back Propagation ANN fault diagnosis model is built and trained by the fault samples data. Experiment result shows that the system can detect the common faults of PV array with high accuracy.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"07 1","pages":"3531-3540"},"PeriodicalIF":0.0,"publicationDate":"2016-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70464203","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper focuses on a Z source cascaded multilevel inverter which is designed to minimize harmonics in the output voltage. A balanced dc-link peak voltage can be achieved. The power generation module is built by PV panels which are connected to Z-Source Cascade H-bridge inverter. Cascaded multilevel inverter can achieve the distributed maximum power point tracking to increase the system efficiency and achieve high voltage/high power grid tie without a transformer. This paper analyzes the different PWM switching scheme and the operating states of a ZSI module and comparison is made with different PWM and total harmonic distortion of various PWM schemes.
{"title":"Performance Metric of Z Source CHB Multilevel Inverter FED IM for Selective Harmonic Elimination and THD Reduction","authors":"V. Maheswari, V. Nandagopal, C. Kannan","doi":"10.4236/CS.2016.711317","DOIUrl":"https://doi.org/10.4236/CS.2016.711317","url":null,"abstract":"This paper focuses on a Z source cascaded \u0000multilevel inverter which is designed to minimize harmonics in the output voltage. A balanced dc-link peak \u0000voltage can be achieved. The power generation module is built by PV panels \u0000which are connected to Z-Source \u0000Cascade H-bridge inverter. Cascaded multilevel inverter can achieve the distributed \u0000maximum power point tracking to increase the system efficiency and achieve high \u0000voltage/high power grid tie without a transformer. This paper analyzes the \u0000different PWM switching scheme and the operating states of a ZSI module and \u0000comparison is made with different PWM and total harmonic distortion of various \u0000PWM schemes.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"07 1","pages":"3794-3806"},"PeriodicalIF":0.0,"publicationDate":"2016-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70465999","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This paper signifies the study of modeling and simulation of a single phase matrix converter for induction heating system. The working principle and the control method, using PID are revealing in detail. The performance of the system is carried out in MATLAB/Simulink environment with pulse width modulation switching strategy by varying the duty cycle. PID control is employed to obtain the better performance for a specified input supply for various output frequencies. The proposed control strategy of AC to AC converter has been discussed with a wide range of operating frequencies and results in low Total Harmonic Distortion.
{"title":"A General Approach for Direct Conversion of Single Phase AC to AC Converter for Induction Heating System","authors":"P. Umasankar, S. S. Kumar","doi":"10.4236/CS.2016.711325","DOIUrl":"https://doi.org/10.4236/CS.2016.711325","url":null,"abstract":"This paper signifies the \u0000study of modeling and simulation of a single phase matrix converter for \u0000induction heating system. The working principle and the control method, using \u0000PID are revealing in detail. The performance of the system is carried out in \u0000MATLAB/Simulink environment with pulse width modulation switching strategy by \u0000varying the duty cycle. PID control is employed to obtain the better performance for \u0000a specified input supply for various output frequencies. The proposed control \u0000strategy of AC to AC converter has been discussed with a wide range of operating frequencies and results in low Total Harmonic \u0000Distortion.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"07 1","pages":"3896-3910"},"PeriodicalIF":0.0,"publicationDate":"2016-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70466529","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Optimal power flow problem plays a major role in the operation and planning of power systems. It assists in acquiring the optimized solution for the optimal power flow problem. It consists of several objective functions and constraints. This paper solves the multiobjective optimal power flow problem using a new hybrid technique by combining the particle swarm optimization and ant colony optimization. This hybrid method overcomes the drawback in local search such as stagnation and premature convergence and also enhances the global search with chemical communication signal. The best results are extracted using fuzzy approach from the hybrid algorithm solution. These methods have been examined with the power flow objectives such as cost, loss and voltage stability index by individuals and multiobjective functions. The proposed algorithms applied to IEEE 30 and IEEE 118-bus test system and the results are analyzed and validated. The proposed algorithm results record the best compromised solution with minimum execution time compared with the particle swarm optimization.
{"title":"Hybrid Swarm Algorithm for Multiobjective Optimal Power Flow Problem","authors":"K. Rajalashmi, S. Prabha","doi":"10.4236/CS.2016.711304","DOIUrl":"https://doi.org/10.4236/CS.2016.711304","url":null,"abstract":"Optimal power flow problem \u0000plays a major role in the operation and planning of power systems. It assists \u0000in acquiring the optimized solution for the optimal power flow problem. It \u0000consists of \u0000several objective functions and constraints. This paper solves the \u0000multiobjective optimal power flow problem using a new hybrid technique by combining \u0000the particle swarm optimization and ant colony optimization. This hybrid method overcomes the drawback in local \u0000search such as stagnation and premature convergence and also enhances the \u0000global search with chemical communication signal. The best results are \u0000extracted using fuzzy approach from the hybrid algorithm solution. These \u0000methods have been examined with the power flow objectives such as cost, loss \u0000and voltage stability index by individuals and multiobjective functions. The \u0000proposed algorithms applied to IEEE 30 and IEEE 118-bus \u0000test system and the results are analyzed and validated. The proposed algorithm \u0000results record the best compromised solution with minimum execution time \u0000compared with the particle swarm optimization.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"07 1","pages":"3589-3603"},"PeriodicalIF":0.0,"publicationDate":"2016-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70464483","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, the design of a proportional integral controller (PIC) plus fuzzy logic controller (FLC) for the negative output elementary super lift Luo converter (NOESLLC) operated in discontinuous conduction mode (DCM) is presented. In spite of the many benefits viz. the high voltage transfer gain, the high efficiency, and the reduced inductor current and the capacitor voltage ripples, it natured with non-minimum phase. This characteristic makes the control of NOESLLC cumbersome. Any attempt of direct controlling the output voltage may erupt to instability. To overcome this problem, indirect regulation of the output voltage based on the two-loop controller is devised. The savvy in the inductor current control improves the dynamic response of the output voltage. The FLC is designed for the outer (voltage) loop while the inner (current) loop is controlled by the PIC. For the developed ?19.6 V NOESLLC, the dynamic performances for different perturbations (line, load and component variations) are obtained for PIC plus FLC and compared with PIC plus PIC. The study of two cases is performed at various operating regions by developing the MATLAB/Simulink model.
针对工作在不连续导通模式(DCM)下的负输出初等超升力罗变换器(NOESLLC)，设计了比例积分控制器(PIC)加模糊控制器(FLC)。尽管它具有高电压转移增益、高效率、减小电感电流和电容器电压波动等优点，但它具有非最小相位的特性。这个特性使得NOESLLC的控制很麻烦。任何直接控制输出电压的企图都可能导致不稳定。为了克服这一问题，设计了基于双环控制器的输出电压间接调节。电感电流控制的巧妙改进了输出电压的动态响应。FLC设计用于外部(电压)环，而内部(电流)环由PIC控制。对于开发的19.6 V NOESLLC，获得了PIC + FLC在不同扰动(线路、负载和分量变化)下的动态性能，并与PIC + PIC进行了比较。通过开发MATLAB/Simulink模型，在不同的操作区域对两个案例进行了研究。
{"title":"Indirect Output Voltage Control in Negative Output Elementary Super Lift Luo Converter Using PIC plus FLC in Discontinuous Conduction Mode","authors":"S. Muthukaruppasamy, A. Abudhahir","doi":"10.4236/CS.2016.711310","DOIUrl":"https://doi.org/10.4236/CS.2016.711310","url":null,"abstract":"In this paper, the design of a proportional integral controller (PIC) \u0000plus fuzzy logic controller (FLC) for the negative output elementary super lift \u0000Luo converter (NOESLLC) operated in discontinuous conduction mode (DCM) is \u0000presented. In spite of the many benefits viz. \u0000the high voltage transfer gain, the high efficiency, and the reduced inductor \u0000current and the capacitor voltage ripples, it natured with non-minimum phase. \u0000This characteristic makes the control of NOESLLC cumbersome. Any attempt of \u0000direct controlling the output voltage may erupt to instability. To overcome \u0000this problem, indirect regulation of the output voltage based on the two-loop \u0000controller is devised. The savvy in the inductor current control improves the \u0000dynamic response of the output voltage. The FLC is designed for the outer \u0000(voltage) loop while the inner (current) loop is controlled by the PIC. For the \u0000developed ?19.6 V NOESLLC, the dynamic performances for different perturbations (line, \u0000load and component variations) are obtained for PIC plus FLC and compared with \u0000PIC plus PIC. The study of two cases is performed at various operating regions \u0000by developing the MATLAB/Simulink model.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"07 1","pages":"3685-3704"},"PeriodicalIF":0.0,"publicationDate":"2016-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70465457","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
This project proposes a novel dual-input matrix converter (DIMC) which is used to integrate the output of the wind energy to a power grid. The proposed matrix converter is developed based on the traditional indirect matrix converter under reverse power flow operation mode, but with its six-switch voltage source converter replaced by a nine-switch configuration followed by the current source inverter (CSI). Matrix electric power conversion topologies and their switch functions are flexible and are used for specific applications. With the additional three switches, the proposed DIMC can provide six input terminals, which make it possible to integrate two independent AC sources from two independent wind turbines into a single grid tied power electronics interface. Commanded currents can be extracted from the two input sources to the grid. The proposed PI control and modulation schemes guaranteed sinusoidal input and output waveforms as well as reduced THD. The simulation results are provided to validate the effectiveness of the proposed control and modulation schemes for the proposed converter.
{"title":"Three Phase Dual Input Direct Matrix Converter for Integration of Two AC Sources from Wind Turbines","authors":"M. Saravanan, T. S. Sivakumaran","doi":"10.4236/CS.2016.711318","DOIUrl":"https://doi.org/10.4236/CS.2016.711318","url":null,"abstract":"This project proposes a novel dual-input matrix \u0000converter (DIMC) which is used to integrate the output of the wind energy to a \u0000power grid. The proposed matrix converter is developed based on the traditional \u0000indirect matrix converter under reverse power flow operation mode, but with its \u0000six-switch voltage source converter replaced by a nine-switch configuration followed by the current source \u0000inverter (CSI). Matrix electric power conversion topologies and their switch \u0000functions are flexible and are used for specific applications. With the \u0000additional three switches, the proposed DIMC can provide six input terminals, \u0000which make it possible to integrate two independent AC sources from two \u0000independent wind turbines into a single grid tied power electronics interface. \u0000Commanded currents can be extracted from the two input sources to the grid. The \u0000proposed PI control and modulation schemes guaranteed sinusoidal input and \u0000output waveforms as well as reduced THD. The simulation results are provided to \u0000validate the effectiveness of the proposed control and modulation schemes for \u0000the proposed converter.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"07 1","pages":"3807-3817"},"PeriodicalIF":0.0,"publicationDate":"2016-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70465679","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
An open source high level synthesis fixed-to-floating and floating-to-fixed conversion tool is presented for embedded design, communication systems, and signal processing applications. Many systems use a fixed point number system. Fixed point numbers often need to be converted to floating point numbers for higher accuracy, dynamic range, fixed-length transmission limitations or end user requirements. A similar conversion system is needed to convert floating point numbers to fixed point numbers due to the advantages that fixed point numbers offer when compared with floating point number systems, such as compact hardware, reduced verification time and design effort. The latest embedded and SoC designs use both number systems together to improve accuracy or reduce required hardware in the same design. The proposed open source design and verification tool converts fixed point numbers to floating point numbers, and floating point numbers to fixed point numbers using the IEEE-754 floating point number standard. This open source design tool generates HDL code and its test bench that can be implemented in FPGA and VLSI systems. The design can be compiled and simulated using open source Iverilog/GTKWave and verified using Octave. A high level synthesis tool and GUI are designed using C#. The proposed design tool can increase productivity by reducing the design and verification time, as well as reduce the development cost due to the open source nature of the design tool. The proposed design tool can be used as a standalone block generator or implemented into current designs to improve range, accuracy, and reduce the development cost. The generated design has been implemented on Xilinx FPGAs.
{"title":"Open Source Synthesis and Verification Tool for Fixed-to-Floating and Floating-to-Fixed Points Conversions","authors":"S. Aslan, E. Mohammad, Azim Hassan Salamy","doi":"10.4236/CS.2016.711323","DOIUrl":"https://doi.org/10.4236/CS.2016.711323","url":null,"abstract":"An open source high level synthesis fixed-to-floating and floating-to-fixed conversion tool is presented for embedded design, communication systems, and signal processing applications. Many systems use a fixed point number system. Fixed point numbers often need to be converted to floating point numbers for higher accuracy, dynamic range, fixed-length transmission limitations or end user requirements. A similar conversion system is needed to convert floating point numbers to fixed point numbers due to the advantages that fixed point numbers offer when compared with floating point number systems, such as compact hardware, reduced verification time and design effort. The latest embedded and SoC designs use both number systems together to improve accuracy or reduce required hardware in the same design. The proposed open source design and verification tool converts fixed point numbers to floating point numbers, and floating point numbers to fixed point numbers using the IEEE-754 floating point number standard. This open source design tool generates HDL code and its test bench that can be implemented in FPGA and VLSI systems. The design can be compiled and simulated using open source Iverilog/GTKWave and verified using Octave. A high level synthesis tool and GUI are designed using C#. The proposed design tool can increase productivity by reducing the design and verification time, as well as reduce the development cost due to the open source nature of the design tool. The proposed design tool can be used as a standalone block generator or implemented into current designs to improve range, accuracy, and reduce the development cost. The generated design has been implemented on Xilinx FPGAs.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"07 1","pages":"3874-3885"},"PeriodicalIF":0.0,"publicationDate":"2016-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70466301","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The aim of this study is to evaluate the performance of BP neural network techniques in predicting earthquakes occurring in the region of Himalayan belt (with the use of different types of input data). These parameters are extracted from Himalayan Earthquake catalogue comprised of all minor, major events and their aftershock sequences in the Himalayan basin for the past 128 years from 1887 to 2015. This data warehouse contains event data, event time with seconds, latitude, longitude, depth, standard deviation and magnitude. These field data are converted into eight mathematically computed parameters known as seismicity indicators. These seismicity indicators have been used to train the BP Neural Network for better decision making and predicting the magnitude of the pre-defined future time period. These mathematically computed indicators considered are the clustered based on every events above 2.5 magnitude, total number of events from past years to 2014, frequency-magnitude distribution b-values, Gutenberg-Richter inverse power law curve for the n events, the rate of square root of seismic energy released during the n events, energy released from the event, the mean square deviation about the regression line based on the Gutenberg-Richer inverse power law for the n events, coefficient of variation of mean time and average value of the magnitude for last n events. We propose a three-layer feed forward BP neural network model to identify factors, with the actual occurrence of the earthquake magnitude M and other seven mathematically computed parameters seismicity indicators as input and target vectors in Himalayan basin area. We infer through comparing curve as observed from seismometer in Himalayan Earthquake catalogue comprised of all events above magnitude 2.5 mg, their aftershock sequences in the Himalayan basin of year 2015 and BP neural network predicting earthquakes in 2015. The model yields good prediction result for the earthquakes of magnitude between 4.0 and 6.0.
{"title":"A BP Artificial Neural Network Model for Earthquake Magnitude Prediction in Himalayas, India","authors":"S. Narayanakumar, K. Raja","doi":"10.4236/CS.2016.711294","DOIUrl":"https://doi.org/10.4236/CS.2016.711294","url":null,"abstract":"The aim \u0000of this study is to evaluate the performance of BP neural network techniques in \u0000predicting earthquakes occurring in the region of Himalayan belt (with the use \u0000of different types of input data). These \u0000parameters are extracted from Himalayan Earthquake catalogue comprised of all \u0000minor, major events and their aftershock sequences in the Himalayan basin for \u0000the past 128 years from 1887 to 2015. This data warehouse contains event data, \u0000event time with seconds, latitude, longitude, depth, standard deviation and magnitude. \u0000These field data are converted into eight mathematically computed parameters known as \u0000seismicity indicators. These seismicity indicators have been used to train the \u0000BP Neural Network for better decision making and predicting the magnitude of \u0000the pre-defined future time period. These mathematically computed indicators \u0000considered are the clustered based on every events above 2.5 magnitude, total \u0000number of events from past years to 2014, frequency-magnitude \u0000distribution b-values, Gutenberg-Richter inverse power law curve for the n \u0000events, the rate of square root of seismic energy released during the n events, \u0000energy released from the event, the mean square deviation about the regression \u0000line based on the Gutenberg-Richer inverse power law for the n events, \u0000coefficient of variation of mean time and average value of the magnitude for \u0000last n events. We propose a three-layer feed forward BP neural network model to \u0000identify factors, with the actual occurrence of the earthquake magnitude M and \u0000other seven mathematically computed parameters seismicity indicators as input \u0000and target vectors in Himalayan basin area. We infer through comparing curve as observed from seismometer in Himalayan Earthquake catalogue \u0000comprised of all events above magnitude 2.5 mg, their aftershock sequences in \u0000the Himalayan basin of year 2015 and BP neural network predicting earthquakes in 2015. The model yields good prediction result for the \u0000earthquakes of magnitude between 4.0 and 6.0.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"07 1","pages":"3456-3468"},"PeriodicalIF":0.0,"publicationDate":"2016-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70463803","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The paper proposes a Current Source Multilevel Inverter (CSMLI) with single rating inductor topology. Multilevel inverters are most familiar with power converter’s applications due to reduced dv/dt, di/dt stress, and very efficient for reducing harmonic distortion in the output voltage and output current. The proposed nine-level current source inverter has been tested under symmetrical and asymmetrical modes of operation, and their activities are compared using PI and Fuzzy PI (Proportional Integral) controllers with multicarrier PWM (Pulse Width Modulation) strategy. MATLAB/Simulink simulation has been made for the proposed converter to obtain its performance measures. Some experimental results are given to verify the presented Current Source Multilevel Inverter.
{"title":"Analysis of Symmetrical and Asymmetrical Current Source Multilevel Inverter","authors":"D. Tamilarasi, T. S. Sivakumaran","doi":"10.4236/CS.2016.711295","DOIUrl":"https://doi.org/10.4236/CS.2016.711295","url":null,"abstract":"The paper proposes a Current Source Multilevel \u0000Inverter (CSMLI) with single rating inductor topology. Multilevel inverters are \u0000most familiar with power converter’s applications due to reduced dv/dt, di/dt stress, and very efficient for reducing harmonic distortion in the output voltage \u0000and output current. The proposed nine-level current source inverter has been tested under symmetrical and asymmetrical modes of \u0000operation, and their activities are compared using PI and Fuzzy \u0000PI (Proportional Integral) controllers with \u0000multicarrier PWM (Pulse Width Modulation) strategy. MATLAB/Simulink \u0000simulation has been made for the proposed converter to obtain its performance \u0000measures. Some experimental results are given to verify the \u0000presented Current Source Multilevel Inverter.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"07 1","pages":"3469-3484"},"PeriodicalIF":0.0,"publicationDate":"2016-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70463966","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The multi-hop wireless networks that provide the feasible means of communication and information access in real time services are named as Mobile Ad-hoc Networks (MANETS). The Dual Busy-Tone Multiple Access (DBTMA) mechanism concedes the RTS-CTS scheme to establish communication between two nodes and medium access for applications with a high QoS requirement by assigning two narrow band busy-tones to notify the on-going transmission. In this paper, we obtained results relative to the interest of AODV based reactive routing protocol for MANETS and DBTMA mechanism. The performance is governed under real time sound traffic through simulation using NS-2. The performance of the protocol is measured in terms of various QoS metrics that include route discovery time, throughput, delay and hops per route which are calculated, and graphs have been plotted. A simulation result shows that very substantial improvements in terms of AODV performance parameters and minimum delay are attained due to increased routing responsiveness.
{"title":"Impact of DBTMA (Dual Busy-Tone Multiple Access) on AODV (Ad-Hoc on Demand Vector) Routing Protocol","authors":"S. Vanitha, G. Mohankumar","doi":"10.4236/CS.2016.711305","DOIUrl":"https://doi.org/10.4236/CS.2016.711305","url":null,"abstract":"The multi-hop wireless networks that provide the feasible means of communication and information access in real time services are named as Mobile Ad-hoc Networks (MANETS). The Dual Busy-Tone Multiple Access (DBTMA) mechanism concedes the RTS-CTS scheme to establish communication between two nodes and medium access for applications with a high QoS requirement by assigning two narrow band busy-tones to notify the on-going transmission. In this paper, we obtained results relative to the interest of AODV based reactive routing protocol for MANETS and DBTMA mechanism. The performance is governed under real time sound traffic through simulation using NS-2. The performance of the protocol is measured in terms of various QoS metrics that include route discovery time, throughput, delay and hops per route which are calculated, and graphs have been plotted. A simulation result shows that very substantial improvements in terms of AODV performance parameters and minimum delay are attained due to increased routing responsiveness.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"07 1","pages":"3604-3616"},"PeriodicalIF":0.0,"publicationDate":"2016-09-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"70464536","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
京公网安备 11010802042870号
京ICP备2023020795号-1
扫码关注我们
求助内容：
应助结果提醒方式：