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A New Current Conveyor Full-Wave Rectifier for Low Frequency/Small Signal Medical Applications 一种低频/小信号医用新型电流输送全波整流器
Pub Date : 2018-03-15 DOI: 10.4236/CS.2018.93006
A. Monpapassorn
This paper presents a new current conveyor (CCII+) full-wave rectifier for low frequency/small signal medical applications. The proposed rectifier is based on the current conveyor full-wave rectifier proposed previously, but the proposed rectifier is better in view of no need diodes to rectify, and no need bias sources to overcome the zero crossing error. It needs only two CCII+s, two resistors, and three simple current mirrors, which is easy for IC implementation and for building in many countries. The PSPICE simulation with the current conveyor CCII+ in the current feedback opamp AD844 IC and the 2N2222 bipolar current mirror shows the good low frequency/small signal rectification, the operation voltage of down to 6 .
本文介绍了一种新型电流输送(CCII+)全波整流器,用于低频/小信号医疗应用。本文提出的整流器是在先前提出的电流输送全波整流器的基础上,但由于不需要二极管进行整流,也不需要偏置源来克服过零误差,因此本文提出的整流器更好。它只需要两个CCII+s,两个电阻和三个简单的电流镜,易于集成电路的实现和许多国家的建设。在PSPICE仿真中采用电流输送器CCII+在电流反馈opamp AD844 IC和2N2222双极电流反射镜进行了良好的低频/小信号整流,工作电压降至6。
{"title":"A New Current Conveyor Full-Wave Rectifier for Low Frequency/Small Signal Medical Applications","authors":"A. Monpapassorn","doi":"10.4236/CS.2018.93006","DOIUrl":"https://doi.org/10.4236/CS.2018.93006","url":null,"abstract":"This paper presents a new current conveyor (CCII+) full-wave rectifier for low frequency/small signal medical applications. The proposed rectifier is based on the current conveyor full-wave rectifier proposed previously, but the proposed rectifier is better in view of no need diodes to rectify, and no need bias sources to overcome the zero crossing error. It needs only two CCII+s, two resistors, and three simple current mirrors, which is easy for IC implementation and for building in many countries. The PSPICE simulation with the current conveyor CCII+ in the current feedback opamp AD844 IC and the 2N2222 bipolar current mirror shows the good low frequency/small signal rectification, the operation voltage of down to 6 .","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"9 1","pages":"58-65"},"PeriodicalIF":0.0,"publicationDate":"2018-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44240162","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Electronically Controllable Quadrature Sinusoidal Oscillator Using VD-DIBAs 采用VD DIBA的电子可控正交正弦振荡器
Pub Date : 2018-03-15 DOI: 10.4236/CS.2018.93004
K. L. Pushkar
A new voltage-mode quadrature sinusoidal oscillator (QSO) using two voltage differencing-differential input buffered amplifiers (VD-DIBAs) and only three passive components (two capacitors and a resistor) is presented. The proposed QSO circuit offers advantages of independent electronic control of both oscillation frequency and condition of oscillation, availability of two quadrature voltage outputs and low active and passive sensitivities. SPICE simulation results have been included using 0.35 μm MIETEC technology to confirm the validity of the proposed QSO oscillator.
提出了一种新型电压型正交正弦振荡器(QSO),该振荡器采用两个电压差分-差分输入缓冲放大器(vd - diba)和三个无源元件(两个电容和一个电阻)。所提出的QSO电路具有振荡频率和振荡条件的独立电子控制、两个正交电压输出的可用性以及低的有源和无源灵敏度等优点。采用0.35 μm MIETEC技术的SPICE仿真结果验证了所提出QSO振荡器的有效性。
{"title":"Electronically Controllable Quadrature Sinusoidal Oscillator Using VD-DIBAs","authors":"K. L. Pushkar","doi":"10.4236/CS.2018.93004","DOIUrl":"https://doi.org/10.4236/CS.2018.93004","url":null,"abstract":"A new voltage-mode quadrature sinusoidal oscillator (QSO) using two voltage differencing-differential input buffered amplifiers (VD-DIBAs) and only three passive components (two capacitors and a resistor) is presented. The proposed QSO circuit offers advantages of independent electronic control of both oscillation frequency and condition of oscillation, availability of two quadrature voltage outputs and low active and passive sensitivities. SPICE simulation results have been included using 0.35 μm MIETEC technology to confirm the validity of the proposed QSO oscillator.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"09 1","pages":"41-48"},"PeriodicalIF":0.0,"publicationDate":"2018-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42643059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
Design of Digital to Analog Converters with Arbitrary Radix 任意基数模转换器的设计
Pub Date : 2018-03-15 DOI: 10.4236/CS.2018.93005
T. Rathore
There are DAC structures available in the literature for radix r = 2, 3, and 4; but how they are arrived at is missing. No general structure is available for any radix r. The aim of the paper is, therefore, to fulfil these gaps. To start with, the design relations are derived for the simplest possible attenuator circuit when connected to a voltage source V and a series resistance R, such that the complete circuit offers the Thevenin resistance R. Spread relations for this attenuator are derived. An example when 3 such attenuators with different attenuation constants are connected in cascade is given. Interestingly, the two attenuators with attenuation factors 1/2 and 1/3 have the same spread of 2. A generalized attenuator is then obtained when N number of identical attenuators are connected in cascade. This is modified to derive a digital to analog converter for any radix r.
文献中存在可用于基数r=2、3和4的DAC结构;但它们是如何到达的还不清楚。没有任何基数r的通用结构。因此,本文的目的是填补这些空白。首先,当连接到电压源V和串联电阻R时,导出了最简单可能的衰减器电路的设计关系,使得整个电路提供Thevenin电阻R。导出了该衰减器的扩展关系。给出了三个不同衰减常数的衰减器级联的例子。有趣的是,衰减因子为1/2和1/3的两个衰减器具有相同的2的扩展。当N个相同的衰减器级联时,得到了一个广义衰减器。这被修改为导出任何基数r的数模转换器。
{"title":"Design of Digital to Analog Converters with Arbitrary Radix","authors":"T. Rathore","doi":"10.4236/CS.2018.93005","DOIUrl":"https://doi.org/10.4236/CS.2018.93005","url":null,"abstract":"There are DAC structures available in the literature for radix r = 2, 3, and 4; but how they are arrived at is missing. No general structure is available for any radix r. The aim of the paper is, therefore, to fulfil these gaps. To start with, the design relations are derived for the simplest possible attenuator circuit when connected to a voltage source V and a series resistance R, such that the complete circuit offers the Thevenin resistance R. Spread relations for this attenuator are derived. An example when 3 such attenuators with different attenuation constants are connected in cascade is given. Interestingly, the two attenuators with attenuation factors 1/2 and 1/3 have the same spread of 2. A generalized attenuator is then obtained when N number of identical attenuators are connected in cascade. This is modified to derive a digital to analog converter for any radix r.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"09 1","pages":"49-57"},"PeriodicalIF":0.0,"publicationDate":"2018-03-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42585831","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Development of a Solar Controller with MLI Control MLI控制太阳能控制器的研制
Pub Date : 2018-02-08 DOI: 10.4236/CS.2018.92003
M. Wade, Moussa Gueye, Ousmane Sow, Daouda Sow, Babou Dione, G. Sissoko
This work presents the development of a solar regulator which manages the charge and discharge of a (lead) battery installed in a photovoltaic system in order to extend its lifetime. The regulator is controlled by a microcontroller (PIC16F877A) and protects the battery against overcharging, deep discharge, but also against temperature drifts. The operating principle is based on the control of a DC-DC converter by a rectangular signal MLI generated by the microcontroller. In addition to the protection function of the regulator, there is included a control and monitoring panel consisting of a visualization interface on which the system quantities can be observed. Thus, it will be given to the user to be able to act on the system. This display interface uses as a display an LCD screen and LEDs. Simulation results are presented to illustrate the operation of the proposed solar controller.
这项工作介绍了太阳能调节器的开发,该调节器管理安装在光伏系统中的(铅)电池的充电和放电,以延长其寿命。调节器由微控制器(PIC16F877A)控制,可保护电池免受过度充电、深度放电以及温度漂移的影响。其工作原理基于由微控制器产生的矩形信号MLI对DC-DC转换器的控制。除了调节器的保护功能外,还包括一个由可视化界面组成的控制和监测面板,在该界面上可以观察系统数量。因此,它将被赋予用户能够对系统进行操作。此显示接口使用LCD屏幕和LED作为显示器。仿真结果说明了所提出的太阳能控制器的操作。
{"title":"Development of a Solar Controller with MLI Control","authors":"M. Wade, Moussa Gueye, Ousmane Sow, Daouda Sow, Babou Dione, G. Sissoko","doi":"10.4236/CS.2018.92003","DOIUrl":"https://doi.org/10.4236/CS.2018.92003","url":null,"abstract":"This work presents the development of a solar regulator which manages the charge and discharge of a (lead) battery installed in a photovoltaic system in order to extend its lifetime. The regulator is controlled by a microcontroller (PIC16F877A) and protects the battery against overcharging, deep discharge, but also against temperature drifts. The operating principle is based on the control of a DC-DC converter by a rectangular signal MLI generated by the microcontroller. In addition to the protection function of the regulator, there is included a control and monitoring panel consisting of a visualization interface on which the system quantities can be observed. Thus, it will be given to the user to be able to act on the system. This display interface uses as a display an LCD screen and LEDs. Simulation results are presented to illustrate the operation of the proposed solar controller.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"09 1","pages":"22-40"},"PeriodicalIF":0.0,"publicationDate":"2018-02-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47008590","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
Review of the Global Trend of Interconnect Reliability for Integrated Circuit 集成电路互连可靠性全球发展趋势综述
Pub Date : 2018-02-08 DOI: 10.4236/CS.2018.92002
Q. Lin, Haifeng Wu, Guoqing Jia
Interconnect reliability has been regarded as a discipline that must be seriously taken into account from the early design phase of integrated circuit (IC). In order to study the status and trend of the interconnect reliability, a comprehensive review of the published literatures is carried out. This can depict the global trend of ICs’ interconnect reliability and help the new entrants to understand the present situation of this area.
互连可靠性从集成电路设计初期就被认为是一个必须认真考虑的问题。为了研究互连可靠性的现状和发展趋势,对已发表的文献进行了全面的综述。这可以描绘ic互连可靠性的全球趋势,并帮助新进入者了解这一领域的现状。
{"title":"Review of the Global Trend of Interconnect Reliability for Integrated Circuit","authors":"Q. Lin, Haifeng Wu, Guoqing Jia","doi":"10.4236/CS.2018.92002","DOIUrl":"https://doi.org/10.4236/CS.2018.92002","url":null,"abstract":"Interconnect reliability has been regarded as a discipline that must be seriously taken into account from the early design phase of integrated circuit (IC). In order to study the status and trend of the interconnect reliability, a comprehensive review of the published literatures is carried out. This can depict the global trend of ICs’ interconnect reliability and help the new entrants to understand the present situation of this area.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"09 1","pages":"9-21"},"PeriodicalIF":0.0,"publicationDate":"2018-02-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"41750615","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 9
Single-Resistance Controlled Sinusoidal Oscillator Employing Single Universal Voltage Conveyor 采用单通用电压传送器的单电阻控制正弦振荡器
Pub Date : 2018-01-25 DOI: 10.4236/CS.2018.91001
K. L. Pushkar
In this paper, a new single-resistance controlled sinusoidal oscillator (SRCO) using single universal voltage conveyor (UVC) has been presented. The proposed SRCO employs single universal voltage conveyor, three resistors, and two capacitors. The proposed configuration offers the following advantageous features (1) independent control of condition of oscillation and frequency of oscillation (2) low passive sensitivities. The validity of the proposed SRCO has been established by SPICE (version 16.5) simulations using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm technology.
本文提出了一种采用单通用电压传送器(UVC)的新型单电阻控制正弦振荡器(SRCO)。所提出的SRCO采用单个通用电压传送器、三个电阻器和两个电容器。所提出的配置提供了以下有利特征(1)振荡条件和振荡频率的独立控制(2)低无源灵敏度。利用台湾半导体制造公司(TSMC)0.18μm技术,通过SPICE(16.5版)模拟,确定了所提出的SRCO的有效性。
{"title":"Single-Resistance Controlled Sinusoidal Oscillator Employing Single Universal Voltage Conveyor","authors":"K. L. Pushkar","doi":"10.4236/CS.2018.91001","DOIUrl":"https://doi.org/10.4236/CS.2018.91001","url":null,"abstract":"In this paper, a new single-resistance controlled sinusoidal oscillator (SRCO) using single universal voltage conveyor (UVC) has been presented. The proposed SRCO employs single universal voltage conveyor, three resistors, and two capacitors. The proposed configuration offers the following advantageous features (1) independent control of condition of oscillation and frequency of oscillation (2) low passive sensitivities. The validity of the proposed SRCO has been established by SPICE (version 16.5) simulations using Taiwan Semiconductor Manufacturing Company (TSMC) 0.18 μm technology.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"09 1","pages":"1-7"},"PeriodicalIF":0.0,"publicationDate":"2018-01-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46713130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 8
A New Voltage-Mode Universal Biquadratic Filter Using Single UVC 一种新型电压型通用双二次型单UVC滤波器
Pub Date : 2017-12-27 DOI: 10.4236/CS.2017.812020
K. L. Pushkar, Kavya Gupta, Pinky Vivek
The paper presents a new universal biquadratic filter using single universal voltage conveyor (UVC), two resistors and two capacitors. The offered structure has three inputs and one output and can realise all the five basic biquadratic filters: high-pass (HP), low-pass (LP), band-reject (BR), band-pass (BP) and all-pass (AP) from the same circuit topology. The proposed universal filter also provides following advantageous features, not available simultaneously in any UVC based universal biquadratic filter so far: (i) low active and passive sensitivities, (ii) independent control of natural frequency (ω0) and bandwidth (BW) and (iii) no requirement of any component matching condition and inversion of input signal(s) (as needed in most of the earlier reported structures). The workability of proposed structure has been presented by SPICE (Version 16.5) simulation using 0.18 μm TSMC technology.
本文提出了一种新的通用双二次滤波器,该滤波器采用单通用电压传送器、两个电阻器和两个电容器。所提供的结构具有三个输入和一个输出,并且可以实现来自相同电路拓扑的所有五个基本双二次滤波器:高通(HP)、低通(LP)、带阻(BR)、带通(BP)和全通(AP)。所提出的通用滤波器还提供了迄今为止在任何基于UVC的通用双二次滤波器中都不能同时获得的以下有利特征:(i)低的有源和无源灵敏度,(ii)固有频率(ω0)和带宽(BW)的独立控制,以及(iii)不需要任何分量匹配条件和输入信号的反转(如大多数早期报道的结构所需)。采用0.18μm台积电技术,通过SPICE(16.5版)模拟,给出了所提出结构的可操作性。
{"title":"A New Voltage-Mode Universal Biquadratic Filter Using Single UVC","authors":"K. L. Pushkar, Kavya Gupta, Pinky Vivek","doi":"10.4236/CS.2017.812020","DOIUrl":"https://doi.org/10.4236/CS.2017.812020","url":null,"abstract":"The paper presents a new universal biquadratic filter using single universal voltage conveyor (UVC), two resistors and two capacitors. The offered structure has three inputs and one output and can realise all the five basic biquadratic filters: high-pass (HP), low-pass (LP), band-reject (BR), band-pass (BP) and all-pass (AP) from the same circuit topology. The proposed universal filter also provides following advantageous features, not available simultaneously in any UVC based universal biquadratic filter so far: (i) low active and passive sensitivities, (ii) independent control of natural frequency (ω0) and bandwidth (BW) and (iii) no requirement of any component matching condition and inversion of input signal(s) (as needed in most of the earlier reported structures). The workability of proposed structure has been presented by SPICE (Version 16.5) simulation using 0.18 μm TSMC technology.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"08 1","pages":"275-284"},"PeriodicalIF":0.0,"publicationDate":"2017-12-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44156183","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Efficient VLSI Implementation of the C-MANTEC Conn Algorithm by Using PID Controllers 用PID控制器实现C-MANTEC Conn算法的高效VLSI实现
Pub Date : 2017-11-03 DOI: 10.4236/CS.2017.811018
J. Caleb, M. Kannan
Through the research on the existing C-MANTEC neural network and PID control technology, this paper presents an improved C-MANTEC algorithm based on PID control system. The combining of the artificial neural networks with conventional PID control helps in exploring their respective advantages to forming the intelligent PID control. From UCI Repository cancer dataset, the developed system is tested. The results show that the scheme can not only improve the speed of the algorithm in the training process but also improve the generalization capability of the network, which further enhances the performance of PID controllers. The overall power consumed is also reduced to a greater extent.
通过对现有C-MANTEC神经网络和PID控制技术的研究,提出了一种基于PID控制系统的改进C-MANTEC算法。将人工神经网络与传统PID控制相结合,有助于探索它们各自的优势,形成智能PID控制。从UCI知识库癌症数据集,对所开发的系统进行了测试。结果表明,该方案不仅提高了算法在训练过程中的速度,而且提高了网络的泛化能力,进一步提高了PID控制器的性能。消耗的总功率也在更大程度上减少。
{"title":"Efficient VLSI Implementation of the C-MANTEC Conn Algorithm by Using PID Controllers","authors":"J. Caleb, M. Kannan","doi":"10.4236/CS.2017.811018","DOIUrl":"https://doi.org/10.4236/CS.2017.811018","url":null,"abstract":"Through the research on the existing C-MANTEC neural network and PID control technology, this paper presents an improved C-MANTEC algorithm based on PID control system. The combining of the artificial neural networks with conventional PID control helps in exploring their respective advantages to forming the intelligent PID control. From UCI Repository cancer dataset, the developed system is tested. The results show that the scheme can not only improve the speed of the algorithm in the training process but also improve the generalization capability of the network, which further enhances the performance of PID controllers. The overall power consumed is also reduced to a greater extent.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"08 1","pages":"253-260"},"PeriodicalIF":0.0,"publicationDate":"2017-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44811627","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 2
Analysis of Electronic Circuits with the Signal Flow Graph Method 用信号流图法分析电子电路
Pub Date : 2017-11-03 DOI: 10.4236/CS.2017.811019
Feim Ridvan Rasim, S. Sattler
In this work a method called “signal flow graph (SFG)” is presented. A signal-flow graph describes a system by its signal flow by directed and weighted graph; the signals are applied to nodes and functions on edges. The edges of the signal flow graph are small processing units, through which the incoming signals are processed in a certain form. In this case, the result is sent to the outgoing node. The SFG allows a good visual inspection into complex feedback problems. Furthermore such a presentation allows for a clear and unambiguous description of a generating system, for example, a netview. A Signal Flow Graph (SFG) allows a fast and practical network analysis based on a clear data presentation in graphic format of the mathematical linear equations of the circuit. During creation of a SFG the Direct Current-Case (DC-Case) was observed since the correct current and voltage directions was drawn from zero frequency. In addition, the mathematical axioms, which are based on field algebra, are declared. In this work we show you in addition: How we check our SFG whether it is a consistent system or not. A signal flow graph can be verified by generating the identity of the signal flow graph itself, illustrated by the inverse signal flow graph (SFG−1). Two signal flow graphs are always generated from one circuit, so that the signal flow diagram already presented in previous sections corresponds to only half of the solution. The other half of the solution is the so-called identity, which represents the (SFG−1). If these two graphs are superposed with one another, so called 1-edges are created at the node points. In Boolean algebra, these 1-edges are given the value 1, whereas this value can be identified with a zero in the field algebra.
本文提出了一种称为“信号流图(SFG)”的方法。信号流图用有向图和加权图来描述系统的信号流;这些信号被应用于边缘上的节点和函数。信号流图的边缘是小的处理单元,输入的信号通过这些处理单元以一定的形式进行处理。在这种情况下,结果被发送到传出节点。SFG允许对复杂的反馈问题进行良好的视觉检查。此外,这样的表示允许对生成系统(例如,网络视图)进行清晰和明确的描述。信号流图(SFG)基于电路数学线性方程的图形格式的清晰数据表示,允许快速实用的网络分析。在创建SFG期间,观察到直流情况(DC-Case),因为正确的电流和电压方向是从零频率绘制的。此外,还声明了基于域代数的数学公理。在这项工作中,我们还向您展示:我们如何检查我们的SFG是否是一个一致的系统。可以通过生成信号流图本身的恒等式来验证信号流图,由逆信号流图(SFG−1)表示。一个电路总是生成两个信号流图,因此前面章节中已经给出的信号流图只对应解决方案的一半。解的另一半是所谓的恒等式,表示(SFG−1)。如果这两个图相互叠加,则在节点上创建所谓的1边。在布尔代数中,这些1边被赋值为1,而这个值在域代数中可以用零来标识。
{"title":"Analysis of Electronic Circuits with the Signal Flow Graph Method","authors":"Feim Ridvan Rasim, S. Sattler","doi":"10.4236/CS.2017.811019","DOIUrl":"https://doi.org/10.4236/CS.2017.811019","url":null,"abstract":"In this work a method called “signal flow graph (SFG)” is presented. A signal-flow graph describes a system by its signal flow by directed and weighted graph; the signals are applied to nodes and functions on edges. The edges of the signal flow graph are small processing units, through which the incoming signals are processed in a certain form. In this case, the result is sent to the outgoing node. The SFG allows a good visual inspection into complex feedback problems. Furthermore such a presentation allows for a clear and unambiguous description of a generating system, for example, a netview. A Signal Flow Graph (SFG) allows a fast and practical network analysis based on a clear data presentation in graphic format of the mathematical linear equations of the circuit. During creation of a SFG the Direct Current-Case (DC-Case) was observed since the correct current and voltage directions was drawn from zero frequency. In addition, the mathematical axioms, which are based on field algebra, are declared. In this work we show you in addition: How we check our SFG whether it is a consistent system or not. A signal flow graph can be verified by generating the identity of the signal flow graph itself, illustrated by the inverse signal flow graph (SFG−1). Two signal flow graphs are always generated from one circuit, so that the signal flow diagram already presented in previous sections corresponds to only half of the solution. The other half of the solution is the so-called identity, which represents the (SFG−1). If these two graphs are superposed with one another, so called 1-edges are created at the node points. In Boolean algebra, these 1-edges are given the value 1, whereas this value can be identified with a zero in the field algebra.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"08 1","pages":"261-274"},"PeriodicalIF":0.0,"publicationDate":"2017-11-03","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48783384","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 4
Error Analysis of Approximate Calculation of Voltage Divider Biased Common-Emitter Amplifier 分压器偏置共发射极放大器近似计算的误差分析
Pub Date : 2017-10-17 DOI: 10.4236/CS.2017.810017
Xinwu Chen, Jingjing Xue, Shuangbo Xie, W. Huang, Peng Wang, Ke Gong, Lijuan Zhong
Voltage divider biasing common emitter amplifier is one of the core contents in analog circuit curriculum, and almost all of traditional textbooks apply approximate calculation method to estimate all characteristic parameters. In calculating quiescent point, transistor base current is generally ignored to get the approximate base potential and emitter current, then other operating parameters, and AC small signal parameters can be acquired. The main purpose of this paper is to compare traditional and Thevenin equivalent methods and to get the difference of the two methods. A Formula is given to calculate the error of the traditional method. Example calculating reveals that the traditional method can generate an error about 10%, and even severe for small signal amplifier with higher quiescent point.
分压器偏置共射极放大器是模拟电路课程的核心内容之一,传统的教科书几乎都采用近似计算方法来估计所有的特性参数。在计算静态点时,通常忽略晶体管基极电流以获得近似的基极电势和发射极电流,然后可以获得其他操作参数,以及AC小信号参数。本文的主要目的是比较传统方法和Thevenin等效方法,并得出这两种方法的区别。给出了传统方法误差的计算公式。实例计算表明,对于静态点较高的小信号放大器,传统方法产生的误差约为10%,甚至严重。
{"title":"Error Analysis of Approximate Calculation of Voltage Divider Biased Common-Emitter Amplifier","authors":"Xinwu Chen, Jingjing Xue, Shuangbo Xie, W. Huang, Peng Wang, Ke Gong, Lijuan Zhong","doi":"10.4236/CS.2017.810017","DOIUrl":"https://doi.org/10.4236/CS.2017.810017","url":null,"abstract":"Voltage divider biasing common emitter amplifier is one of the core contents in analog circuit curriculum, and almost all of traditional textbooks apply approximate calculation method to estimate all characteristic parameters. In calculating quiescent point, transistor base current is generally ignored to get the approximate base potential and emitter current, then other operating parameters, and AC small signal parameters can be acquired. The main purpose of this paper is to compare traditional and Thevenin equivalent methods and to get the difference of the two methods. A Formula is given to calculate the error of the traditional method. Example calculating reveals that the traditional method can generate an error about 10%, and even severe for small signal amplifier with higher quiescent point.","PeriodicalId":63422,"journal":{"name":"电路与系统(英文)","volume":"08 1","pages":"247-252"},"PeriodicalIF":0.0,"publicationDate":"2017-10-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46872207","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
引用次数: 1
期刊
电路与系统(英文)
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