Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496543
M. A. Mohammed Ansar Ali, D. Adimugasivasakthi
Dynamic topology control in multi-hop wireless networks is a focus received much interest in the research society. In this our development, explore the joint power control, channel assignment, and radio interface selection for dynamic provisioning of link bandwidth in infrastructure multi-radio multichannel wireless networks in occurrence of channel variability and external interference. To characterize the logical relationship between spatial contention constraints and transmit power, originate the joint power control and radio-channel assignment as a generalized disjunctive programming problem. The generalized Benders decomposition technique is applied for decomposing the radio-channel assignment (combinatorial conditions) and network resource allocation (continuous conditions) so that the problem can be solved efficiently. In this algorithm is assured to converge to the optimal solution within a finite number of iterations. These schemes in providing reducing outage, packet failure possibility and larger nosiness margin.
{"title":"Dynamic topology control in multi-radio multichannel wireless system","authors":"M. A. Mohammed Ansar Ali, D. Adimugasivasakthi","doi":"10.1109/ICEVENT.2013.6496543","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496543","url":null,"abstract":"Dynamic topology control in multi-hop wireless networks is a focus received much interest in the research society. In this our development, explore the joint power control, channel assignment, and radio interface selection for dynamic provisioning of link bandwidth in infrastructure multi-radio multichannel wireless networks in occurrence of channel variability and external interference. To characterize the logical relationship between spatial contention constraints and transmit power, originate the joint power control and radio-channel assignment as a generalized disjunctive programming problem. The generalized Benders decomposition technique is applied for decomposing the radio-channel assignment (combinatorial conditions) and network resource allocation (continuous conditions) so that the problem can be solved efficiently. In this algorithm is assured to converge to the optimal solution within a finite number of iterations. These schemes in providing reducing outage, packet failure possibility and larger nosiness margin.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"21 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86263855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496534
M. Rajavelan, S. Ananthi, K. Padmanabhan
This paper proposes and implements the PIC microcontroller based Surface Plasmon resonance analysis of bio molecular interaction. Surface Plasmon resonance [SPR] has becoming an important optical bio-sensing technology in the areas of medical, biological , biochemistry, pollution detection, aircraft and laboratory research. The SPR works on the principle of TIR, that when the stepper motor mounted laser beam moving back and forth is focused on the hypotenuse of the gold coated BK-7 prism at an angle greater than the critical angle, hence the laser beam gets reflected back and SPR is generated outward side of the gold coated surface is measured using LDR. The generation of SPR is measured in terms of Refractive index, the refractive index changes with respect to the applied sample (Dielectric loading). Hence even for a small change in molecular interaction can be found using SPR. The laboratory prototype of PIC microcontroller based SPR was characterized in terms of reflectance and intensity with respect to the incident beam. In the design of instrument PIC 16F73 microcontroller is used to control the laser movement back and forth through stepper motor to increase the fastness and accuracy. This paper explains and demonstrates the importance of PIC microcontroller in the design and control of the instrument.
{"title":"Optimal angular movement of laser beam in SPR using an embedded controller","authors":"M. Rajavelan, S. Ananthi, K. Padmanabhan","doi":"10.1109/ICEVENT.2013.6496534","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496534","url":null,"abstract":"This paper proposes and implements the PIC microcontroller based Surface Plasmon resonance analysis of bio molecular interaction. Surface Plasmon resonance [SPR] has becoming an important optical bio-sensing technology in the areas of medical, biological , biochemistry, pollution detection, aircraft and laboratory research. The SPR works on the principle of TIR, that when the stepper motor mounted laser beam moving back and forth is focused on the hypotenuse of the gold coated BK-7 prism at an angle greater than the critical angle, hence the laser beam gets reflected back and SPR is generated outward side of the gold coated surface is measured using LDR. The generation of SPR is measured in terms of Refractive index, the refractive index changes with respect to the applied sample (Dielectric loading). Hence even for a small change in molecular interaction can be found using SPR. The laboratory prototype of PIC microcontroller based SPR was characterized in terms of reflectance and intensity with respect to the incident beam. In the design of instrument PIC 16F73 microcontroller is used to control the laser movement back and forth through stepper motor to increase the fastness and accuracy. This paper explains and demonstrates the importance of PIC microcontroller in the design and control of the instrument.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"29 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77819368","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496527
M. Priyadarshini, S. Padma, P. Dharshana
In this paper, the speed-regulation problem for induction motor system under field oriented control framework is studied. For the speed loop, a standard internal model controller is first designed based on a model of Induction motor by analyzing the relationship between reference quadrature axis current and speed. Considering the disadvantages that the standard IMC method is sensitive to control input saturation and provides a poor load disturbance rejection performance, a modified IMC is introduced where a feedback control term is added to form a composite control structure. For the two current-loops, PI algorithms are employed respectively. Simulation results using MATLAB show the effectiveness of the proposed control method.
{"title":"Standard and modified internal model control for induction motor speed-regulation","authors":"M. Priyadarshini, S. Padma, P. Dharshana","doi":"10.1109/ICEVENT.2013.6496527","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496527","url":null,"abstract":"In this paper, the speed-regulation problem for induction motor system under field oriented control framework is studied. For the speed loop, a standard internal model controller is first designed based on a model of Induction motor by analyzing the relationship between reference quadrature axis current and speed. Considering the disadvantages that the standard IMC method is sensitive to control input saturation and provides a poor load disturbance rejection performance, a modified IMC is introduced where a feedback control term is added to form a composite control structure. For the two current-loops, PI algorithms are employed respectively. Simulation results using MATLAB show the effectiveness of the proposed control method.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"49 2 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"85037106","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496530
K. R. Chairma Lakshmi, K. Shankar, M. Thangaraj, A. Abudhahir
This work aims to analyze the performance of two popular Maximum Power Point Tracking (MPPT) algorithms, namely Modified Perturb and Observe (P&O) and Incremental Conductance (IncCond) algorithm, by simulation method. The purpose of this analysis is to adopt one of the MPPT algorithms for improving the performance of solar photovoltaic (SPV) power generation system. The performance of SPV power generation system is affected by irradiance, temperature of panel and load. The parameters for simulation of solar panel and other associated blocks were built based on researchers' geographical location. The results of simulation done in MATLAB/Simulink environment show that the performance of IncCond algorithm performs better than Modified P&O algorithm.
{"title":"Performance analysis of MPPT algorithms for enhancing the efficiency of SPV power generation system: A simulation study","authors":"K. R. Chairma Lakshmi, K. Shankar, M. Thangaraj, A. Abudhahir","doi":"10.1109/ICEVENT.2013.6496530","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496530","url":null,"abstract":"This work aims to analyze the performance of two popular Maximum Power Point Tracking (MPPT) algorithms, namely Modified Perturb and Observe (P&O) and Incremental Conductance (IncCond) algorithm, by simulation method. The purpose of this analysis is to adopt one of the MPPT algorithms for improving the performance of solar photovoltaic (SPV) power generation system. The performance of SPV power generation system is affected by irradiance, temperature of panel and load. The parameters for simulation of solar panel and other associated blocks were built based on researchers' geographical location. The results of simulation done in MATLAB/Simulink environment show that the performance of IncCond algorithm performs better than Modified P&O algorithm.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"139 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88154153","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496557
Vinothkumar B, Kumar, T. Tntroductton
One of the most important challenges for practical face recognition systems is to make recognition more reliable under uncontrolled lighting conditions. We tackle this by using novel illumination-insensitive preprocessing method. The proposed face recognition system consists of a preprocessing stage, a hybrid Fourier-based facial feature extraction, and Principal Component Linear Discriminant Analysis (PCLDA). In the preprocessing stage, an “Integral Normalized Gradient Image”, (INGI) is obtained by transform a face image into an illumination-insensitive image. The effect of illumination gets reduced in the INGI by normalizing and integrating the smoothed gradients of a facial image. The hybrid Fourier features are extracted from three different Fourier domains in different frequency bandwidths by using a frequency band model selection, and further by adding PCLDA the robustness of the system gets improved. In face recognition, it is not possible to process with the entire extracted features, hence the dimension of the feature vectors has to be reduced. In this paper, this is done by using the linear method called PCLDA. The proposed system using the Yale B data set which is having a 2-D face images under various environmental variations such as illumination changes and expression changes.
{"title":"A novel preprocessing method and PCLDA algorithm for face recognition under difficult lighting conditions","authors":"Vinothkumar B, Kumar, T. Tntroductton","doi":"10.1109/ICEVENT.2013.6496557","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496557","url":null,"abstract":"One of the most important challenges for practical face recognition systems is to make recognition more reliable under uncontrolled lighting conditions. We tackle this by using novel illumination-insensitive preprocessing method. The proposed face recognition system consists of a preprocessing stage, a hybrid Fourier-based facial feature extraction, and Principal Component Linear Discriminant Analysis (PCLDA). In the preprocessing stage, an “Integral Normalized Gradient Image”, (INGI) is obtained by transform a face image into an illumination-insensitive image. The effect of illumination gets reduced in the INGI by normalizing and integrating the smoothed gradients of a facial image. The hybrid Fourier features are extracted from three different Fourier domains in different frequency bandwidths by using a frequency band model selection, and further by adding PCLDA the robustness of the system gets improved. In face recognition, it is not possible to process with the entire extracted features, hence the dimension of the feature vectors has to be reduced. In this paper, this is done by using the linear method called PCLDA. The proposed system using the Yale B data set which is having a 2-D face images under various environmental variations such as illumination changes and expression changes.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"44 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86339694","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496541
G. Ramadoss, G. Prakash
The multi-band orthogonal frequency division multiplexing modem needs to process large amount of computations in short time for support of high data rates from 53 to 480 Mbps. In order to satisfy the performance requirement while reducing power consumption, a multi way parallel architecture has been proposed. In this paper introduced several novel optimization techniques for resource efficient implementation of the baseband modem which has 8-way, parallel architecture, such as new processing structures for a (de)interleaver and a packet synchronizer and a carrier frequency offset compensator. Also, we describe how to efficiently design several other components. The detailed analysis shows that our optimization techniques could reduce the gate count by 27.6% on average, while none of techniques degraded the overall system performance. With 0.18-μm CMOS process, the gate count and power consumption of entire baseband modem were about 474 kgates and 248 mW at 66 MHz.
{"title":"Implementation of low power MB-OFDM PHY baseband modem with parallel architecture","authors":"G. Ramadoss, G. Prakash","doi":"10.1109/ICEVENT.2013.6496541","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496541","url":null,"abstract":"The multi-band orthogonal frequency division multiplexing modem needs to process large amount of computations in short time for support of high data rates from 53 to 480 Mbps. In order to satisfy the performance requirement while reducing power consumption, a multi way parallel architecture has been proposed. In this paper introduced several novel optimization techniques for resource efficient implementation of the baseband modem which has 8-way, parallel architecture, such as new processing structures for a (de)interleaver and a packet synchronizer and a carrier frequency offset compensator. Also, we describe how to efficiently design several other components. The detailed analysis shows that our optimization techniques could reduce the gate count by 27.6% on average, while none of techniques degraded the overall system performance. With 0.18-μm CMOS process, the gate count and power consumption of entire baseband modem were about 474 kgates and 248 mW at 66 MHz.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"2 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90831528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496538
S. Gnanavel, S. Ramakrishan, N. M. Kumar
A Multimedia transmission such as video streaming over wireless networks has grown dramatically in recent years. The downlink transmission of multiple video sequences to multiple users over a shared resource-limited wireless channel, however, is a tough task. We face many challenges in this area like time-varying channel conditions, limited available resources, such as bandwidth and power, and the different transmission requirements of different video content. This work takes into account the time-varying nature of the wireless channels, as well as the importance of individual video packets, to develop a cross-layer resource allocation and packet scheduling scheme for multiuser video streaming over wireless networks. Assuming that accurate channel feedback is not available at the scheduler, random channel losses combined with complex error concealment at the receiver make it impossible for the scheduler to determine the actual distortion of the sequence at the receiver. Therefore, the objective of the optimization is to minimize the expected distortion of the received sequence, where the expectation is calculated at the scheduler with respect to the packet loss probability in the channel. The expected distortion is used to order the packets in the transmission queue of each user, and then gradients of the expected distortion are used to efficiently allocate resources across users.
{"title":"A cross layer resource allocation for multiuser video transmission over wireless networks","authors":"S. Gnanavel, S. Ramakrishan, N. M. Kumar","doi":"10.1109/ICEVENT.2013.6496538","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496538","url":null,"abstract":"A Multimedia transmission such as video streaming over wireless networks has grown dramatically in recent years. The downlink transmission of multiple video sequences to multiple users over a shared resource-limited wireless channel, however, is a tough task. We face many challenges in this area like time-varying channel conditions, limited available resources, such as bandwidth and power, and the different transmission requirements of different video content. This work takes into account the time-varying nature of the wireless channels, as well as the importance of individual video packets, to develop a cross-layer resource allocation and packet scheduling scheme for multiuser video streaming over wireless networks. Assuming that accurate channel feedback is not available at the scheduler, random channel losses combined with complex error concealment at the receiver make it impossible for the scheduler to determine the actual distortion of the sequence at the receiver. Therefore, the objective of the optimization is to minimize the expected distortion of the received sequence, where the expectation is calculated at the scheduler with respect to the packet loss probability in the channel. The expected distortion is used to order the packets in the transmission queue of each user, and then gradients of the expected distortion are used to efficiently allocate resources across users.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"20 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90908784","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496579
V. Vijayalakshmi, R. Seshadri, S. Ramakrishnan
This project deals with the comparison of the VLSI design of the carry look-ahead adder (CLAA) based 32-bit unsigned integer multiplier and the VLSI design of the carry select adder (CSLA) based 32-bit unsigned integer multiplier. Both the VLSI design of multiplier multiplies two 32-bit unsigned integer values and gives a product term of 64-bit values. The CLAA based multiplier uses the delay time of 99ns for performing multiplication operation where as in CSLA based multiplier also uses nearly the same delay time for multiplication operation. But the area needed for CLAA multiplier is reduced to 31% by the CSLA based multiplier to complete the multiplication operation. These multipliers are implemented using Altera Quartus II and timing diagrams are viewed through avan waves.
{"title":"Design and implementation of 32 bit unsigned multiplier using CLAA and CSLA","authors":"V. Vijayalakshmi, R. Seshadri, S. Ramakrishnan","doi":"10.1109/ICEVENT.2013.6496579","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496579","url":null,"abstract":"This project deals with the comparison of the VLSI design of the carry look-ahead adder (CLAA) based 32-bit unsigned integer multiplier and the VLSI design of the carry select adder (CSLA) based 32-bit unsigned integer multiplier. Both the VLSI design of multiplier multiplies two 32-bit unsigned integer values and gives a product term of 64-bit values. The CLAA based multiplier uses the delay time of 99ns for performing multiplication operation where as in CSLA based multiplier also uses nearly the same delay time for multiplication operation. But the area needed for CLAA multiplier is reduced to 31% by the CSLA based multiplier to complete the multiplication operation. These multipliers are implemented using Altera Quartus II and timing diagrams are viewed through avan waves.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"104 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"87711887","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496560
B. Pushparaj, C. Paramasivam
This paper present a high-performance and low-complexity modified radix-25 512-point Fast Fourier transform (FFT) architecture using an eight data-path pipelined approach for high rate wireless personal area network applications. A novel modified radix-25 FFT algorithm that reduces the hardware complexity is proposed. This method can reduce the number of complex multiplications and the size of the twiddle factor memory. It also uses a complex constant multiplier instead of a complex Booth multiplier. The results demonstrate that the total gate count of the proposed FFT architecture is 11, 894. Furthermore the highest throughput rate is up to 2.4 GS/s at 310 MHz while requiring much less hardware complexity.
{"title":"High performance and low power modified radix-25 FFT architecture for high rate WPAN application","authors":"B. Pushparaj, C. Paramasivam","doi":"10.1109/ICEVENT.2013.6496560","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496560","url":null,"abstract":"This paper present a high-performance and low-complexity modified radix-25 512-point Fast Fourier transform (FFT) architecture using an eight data-path pipelined approach for high rate wireless personal area network applications. A novel modified radix-25 FFT algorithm that reduces the hardware complexity is proposed. This method can reduce the number of complex multiplications and the size of the twiddle factor memory. It also uses a complex constant multiplier instead of a complex Booth multiplier. The results demonstrate that the total gate count of the proposed FFT architecture is 11, 894. Furthermore the highest throughput rate is up to 2.4 GS/s at 310 MHz while requiring much less hardware complexity.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"20 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81789022","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496593
M. S. Suraj, D. Muralidharan, K. Seshu Kumar
In this work, we present the NOC router architecture with five port support which utilizes dual crossbar arrangement, the latency which arises due to the dual cross bar architecture is reduced by using predominant routing algorithm. This arrangement is more efficient and reduces about 10 % of device utilization.
{"title":"A HDL based reduced area NOC router architecture","authors":"M. S. Suraj, D. Muralidharan, K. Seshu Kumar","doi":"10.1109/ICEVENT.2013.6496593","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496593","url":null,"abstract":"In this work, we present the NOC router architecture with five port support which utilizes dual crossbar arrangement, the latency which arises due to the dual cross bar architecture is reduced by using predominant routing algorithm. This arrangement is more efficient and reduces about 10 % of device utilization.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"16 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77019254","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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