Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496586
D. Kannadassan, R. Karthik, P. Mallick, M. Baghini
This paper presents the fabrication and comparative study of barrier type Al2O3 & TiO2 Metal-Insulator-Metal (MIM) capacitor using anodic oxidation technique. With high capacitance density (> 5fF/μm2) and low leakage current density (10nA/cm2), both the capacitors show excellent performance and meet the ITRS recommendations for the year 2015. With a detailed study on frequency dependence of capacitance and conduction mechanisms, the evaluation of capacitor performance is done for the RF and Mixed signal applications. The barrier type anodic oxides are suggested as a dielectric material for high performance MIM capacitors.
{"title":"Anodic alumina and titania MIM capacitors - an experimental comparative study","authors":"D. Kannadassan, R. Karthik, P. Mallick, M. Baghini","doi":"10.1109/ICEVENT.2013.6496586","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496586","url":null,"abstract":"This paper presents the fabrication and comparative study of barrier type Al2O3 & TiO2 Metal-Insulator-Metal (MIM) capacitor using anodic oxidation technique. With high capacitance density (> 5fF/μm2) and low leakage current density (10nA/cm2), both the capacitors show excellent performance and meet the ITRS recommendations for the year 2015. With a detailed study on frequency dependence of capacitance and conduction mechanisms, the evaluation of capacitor performance is done for the RF and Mixed signal applications. The barrier type anodic oxides are suggested as a dielectric material for high performance MIM capacitors.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"73 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76723528","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496568
A. Vithyavallipriya, B. Sankaragomathi, T. Ramakrishnan
This paper presents a modern semi supervised scheme for the detection and segmentation of abnormalities present in the brain MR images. The high degree of automation can be attained by using semi supervised learning, because it does not require any pathology modeling. If the dimensionality of the data is large then the estimation of the probability density function is not possible. To overcome this every image is handled as a network of locally coherent image partitions. Median filter is used for preserving edges while removing noise. Contrast enhancement automatically adjusts the intensity values of the image to achieve a better quality. The block wise separation is carried out by calculating the parameter like principal component analysis (PCA), Eigen value, Eigen vector, maximum likelihood function. The maximum likelihood function which estimating the abnormality for each partition is formulated. The likelihood function consists of a model and a data term and is formulated as a quadratic programming problem.
{"title":"Segmentation and location of abnormality in brain MR images using distributed estimation","authors":"A. Vithyavallipriya, B. Sankaragomathi, T. Ramakrishnan","doi":"10.1109/ICEVENT.2013.6496568","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496568","url":null,"abstract":"This paper presents a modern semi supervised scheme for the detection and segmentation of abnormalities present in the brain MR images. The high degree of automation can be attained by using semi supervised learning, because it does not require any pathology modeling. If the dimensionality of the data is large then the estimation of the probability density function is not possible. To overcome this every image is handled as a network of locally coherent image partitions. Median filter is used for preserving edges while removing noise. Contrast enhancement automatically adjusts the intensity values of the image to achieve a better quality. The block wise separation is carried out by calculating the parameter like principal component analysis (PCA), Eigen value, Eigen vector, maximum likelihood function. The maximum likelihood function which estimating the abnormality for each partition is formulated. The likelihood function consists of a model and a data term and is formulated as a quadratic programming problem.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"1 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83484695","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496562
C. Priya, D. Saraswathi, S. Baskar, V. Shailesh
Over the past three decades, Micro-Electro-Mechanical Systems (MEMS) have provided advancements in different fields of electronics. MEMS technology also enabled microwave and antenna engineers to produce some existing and novel radio-frequency components resulting as a new research field, namely RF MEMS. The use of MEMS technology for RF and microwave applications promises to solve many limitations, RF MEMS can reduce manufacturing cost, size, weight, and improve performance and battery life. In terms of performance, MEMS can provide low-loss switching and tuning of microwave circuits with higher dynamic range, lour cost, and greater flexibility than the competing techniques. In this paper we proposed a reconfigurable patch Antenna structures using MEMS switches. This concept leads to reduction in space and multiple functionality from a single antenna structure.
{"title":"A novel cram of reconfigurable patch antenna using RF MEMS","authors":"C. Priya, D. Saraswathi, S. Baskar, V. Shailesh","doi":"10.1109/ICEVENT.2013.6496562","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496562","url":null,"abstract":"Over the past three decades, Micro-Electro-Mechanical Systems (MEMS) have provided advancements in different fields of electronics. MEMS technology also enabled microwave and antenna engineers to produce some existing and novel radio-frequency components resulting as a new research field, namely RF MEMS. The use of MEMS technology for RF and microwave applications promises to solve many limitations, RF MEMS can reduce manufacturing cost, size, weight, and improve performance and battery life. In terms of performance, MEMS can provide low-loss switching and tuning of microwave circuits with higher dynamic range, lour cost, and greater flexibility than the competing techniques. In this paper we proposed a reconfigurable patch Antenna structures using MEMS switches. This concept leads to reduction in space and multiple functionality from a single antenna structure.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"53 2 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78443429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496590
S. Manju, V. Sornagopal
Carry Select adder (CSLA) is known to be the fastest adder among the Conventional adder structures. This work uses an efficient Carry select adder by sharing the Common Boolean logic (CLB) term. After a logic simplification, we only need one OR gate and one inverter gate for carry and summation operation. Through the multiplexer, we can select the correct output according to the logic states of the carry in signal. Based on this modification Square root CSLA (SQRT CSLA) architecture have been developed and compared with the regular and Modified SQRT CSLA architecture. The Modified CSLA architecture has been developed using Binary to Excess -1 converter (BEC). This paper proposes an efficient method which replaces a BEC using common Boolean logic. The result analysis shows that the proposed architecture achieves the three folded advantages in terms of area, delay and power.
{"title":"An efficient SQRT architecture of Carry Select adder design by Common Boolean logic","authors":"S. Manju, V. Sornagopal","doi":"10.1109/ICEVENT.2013.6496590","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496590","url":null,"abstract":"Carry Select adder (CSLA) is known to be the fastest adder among the Conventional adder structures. This work uses an efficient Carry select adder by sharing the Common Boolean logic (CLB) term. After a logic simplification, we only need one OR gate and one inverter gate for carry and summation operation. Through the multiplexer, we can select the correct output according to the logic states of the carry in signal. Based on this modification Square root CSLA (SQRT CSLA) architecture have been developed and compared with the regular and Modified SQRT CSLA architecture. The Modified CSLA architecture has been developed using Binary to Excess -1 converter (BEC). This paper proposes an efficient method which replaces a BEC using common Boolean logic. The result analysis shows that the proposed architecture achieves the three folded advantages in terms of area, delay and power.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"59 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77406872","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496545
C. Subha, S. Malarkan, K. Vaithinathan
The performance of wireless sensor networks strongly depends on their network lifetime. As a result, Dynamic Power Management approaches with the purpose of reduction of energy consumption in sensor node, after deployment and designing of the network, have drawn attentions of many research studies. Recently, there have been a strong interest to use the intelligent tools especially neural networks in energy efficient approach of Wireless sensor networks, due to their simple parallel distributed computation, distributed storage, data robustness, auto-classification off sensor nodes and sensor reading. Dimensionality reduction and prediction of classification of sensor data obtained simply from the outputs of the neural-networks algorithms can lead to lower communication costs and energy conservation. All these characteristics are well considered in the neural network based algorithms such as ART, ART1, FUZZY ART, IVEBF and EBCS. These algorithms and their performance in improving the lifetime of the WSN are discussed in this paper.
{"title":"A survey on energy efficient neural network based clustering models in wireless sensor networks","authors":"C. Subha, S. Malarkan, K. Vaithinathan","doi":"10.1109/ICEVENT.2013.6496545","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496545","url":null,"abstract":"The performance of wireless sensor networks strongly depends on their network lifetime. As a result, Dynamic Power Management approaches with the purpose of reduction of energy consumption in sensor node, after deployment and designing of the network, have drawn attentions of many research studies. Recently, there have been a strong interest to use the intelligent tools especially neural networks in energy efficient approach of Wireless sensor networks, due to their simple parallel distributed computation, distributed storage, data robustness, auto-classification off sensor nodes and sensor reading. Dimensionality reduction and prediction of classification of sensor data obtained simply from the outputs of the neural-networks algorithms can lead to lower communication costs and energy conservation. All these characteristics are well considered in the neural network based algorithms such as ART, ART1, FUZZY ART, IVEBF and EBCS. These algorithms and their performance in improving the lifetime of the WSN are discussed in this paper.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"22 1","pages":"1-6"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77678688","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496587
Harish Anand Ti, D. Vaithiyanathan, R. Seshasayanan
As floating point operations are complex, hence its implementation in Field Programmable Gate Array (FPGAs) consumes large amount of resources. FPGAs becomes inefficient if Floating Point Units (FPUs) are unutilized, to overcome this issue, a novel architecture is proposed in this paper for optimizing the floating point computation units in hybrid FPGAs in terms of achieving a better reduction in both area and power. The proposed architecture involves an algorithmic (logarithmic) approach for computing floating point numerical operations. It performs all the four basic arithmetic operations using simple hardware like adders, look up tables and interpolation steps. This methodology is used to evaluate a variety of FPU architecture optimizations. The model is being evaluated by comparing with the existing architectures like embedded FPUs and other FPU units in the FPGAs in terms of area, power, speed and high throughput. The simulation results of our model in cadence encounter tool shows the proposed architecture scales nearly 28 percent area and consumes 36 percent less power than existing FPUs. And also our method scales very well with an increase in required accuracy compared to the existing techniques.
{"title":"Optimized architecture for Floating Point computation Unit","authors":"Harish Anand Ti, D. Vaithiyanathan, R. Seshasayanan","doi":"10.1109/ICEVENT.2013.6496587","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496587","url":null,"abstract":"As floating point operations are complex, hence its implementation in Field Programmable Gate Array (FPGAs) consumes large amount of resources. FPGAs becomes inefficient if Floating Point Units (FPUs) are unutilized, to overcome this issue, a novel architecture is proposed in this paper for optimizing the floating point computation units in hybrid FPGAs in terms of achieving a better reduction in both area and power. The proposed architecture involves an algorithmic (logarithmic) approach for computing floating point numerical operations. It performs all the four basic arithmetic operations using simple hardware like adders, look up tables and interpolation steps. This methodology is used to evaluate a variety of FPU architecture optimizations. The model is being evaluated by comparing with the existing architectures like embedded FPUs and other FPU units in the FPGAs in terms of area, power, speed and high throughput. The simulation results of our model in cadence encounter tool shows the proposed architecture scales nearly 28 percent area and consumes 36 percent less power than existing FPUs. And also our method scales very well with an increase in required accuracy compared to the existing techniques.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"35 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"81288233","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496565
A. S. Muthanantha Murugavel, S. Ramakrishnan, U. Maheswari, B. S. Sabetha
In this paper, we have proposed a novel wavelet based CSI feature and a novel Adaptive Multi-Class Support Vector Machine (SVM) for the multi-class electroencephalogram (EEG) signals classification with the emphasis on epileptic seizure detection. The purpose was to determine an optimum classification scheme for this problem and also to infer clues about the extracted features. Wavelets have played an important role in biomedical signal processing for its ability to capture localized spatial-frequency information of EEG signal. CSI is used to develop a normalized index which state the maximum difference between the seizure and non-seizure states between the frequency range of 1-30Hz. The adaptive MSVM works well for high dimensional, multi-class data streams. Decision making was performed in two stages: feature extraction by computing the Combined Seizure Index and classification using the classifiers trained on the extracted features. We have compared the adaptive MSVM with the benchmark EEG dataset. Our experimental results show that the adaptive MSVM with wavelet based features which will represent the EEG signals and the classification methods trained on these features achieved high classification accuracies with better false rate and sensitivity.
{"title":"Combined Seizure Index with Adaptive Multi-Class SVM for epileptic EEG classification","authors":"A. S. Muthanantha Murugavel, S. Ramakrishnan, U. Maheswari, B. S. Sabetha","doi":"10.1109/ICEVENT.2013.6496565","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496565","url":null,"abstract":"In this paper, we have proposed a novel wavelet based CSI feature and a novel Adaptive Multi-Class Support Vector Machine (SVM) for the multi-class electroencephalogram (EEG) signals classification with the emphasis on epileptic seizure detection. The purpose was to determine an optimum classification scheme for this problem and also to infer clues about the extracted features. Wavelets have played an important role in biomedical signal processing for its ability to capture localized spatial-frequency information of EEG signal. CSI is used to develop a normalized index which state the maximum difference between the seizure and non-seizure states between the frequency range of 1-30Hz. The adaptive MSVM works well for high dimensional, multi-class data streams. Decision making was performed in two stages: feature extraction by computing the Combined Seizure Index and classification using the classifiers trained on the extracted features. We have compared the adaptive MSVM with the benchmark EEG dataset. Our experimental results show that the adaptive MSVM with wavelet based features which will represent the EEG signals and the classification methods trained on these features achieved high classification accuracies with better false rate and sensitivity.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"3 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"82326154","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496529
Q. Sultana, A. D. Sarma, M. Q. Javeed
In LAAS with airport pseudolites (APLs), error introduced in the signals due to tropospheric time delay proves to be the largest in pseudolite error budget. In this paper, tropospheric delay (TD) is estimated using Hopfield model and RTCA model for a typical LAAS scenario. Hopfield model is used to estimate delay in GPS signal and RTCA model is used to estimate delay in pseudolite signal. As the tropospheric delay is a function of meteorological parameters, these parameter values are collected from India Meteorological Department (IMD) for Hyderabad city, India, for a typical day. These data values are interpolated with respect to altitude for the estimation of TD at various heights. For an altitude of 1.94 m TD in APL signal is estimated as 7.2 m (approx.) and TD in GPS signal is estimated as 2.75 m. When the aircraft just touches the runway touchdown point, TD in APL signal reduces to insignificant value and TD in GPS signal increases to 3.25 m.
{"title":"Estimation of tropospheric time delay for Indian LAAS","authors":"Q. Sultana, A. D. Sarma, M. Q. Javeed","doi":"10.1109/ICEVENT.2013.6496529","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496529","url":null,"abstract":"In LAAS with airport pseudolites (APLs), error introduced in the signals due to tropospheric time delay proves to be the largest in pseudolite error budget. In this paper, tropospheric delay (TD) is estimated using Hopfield model and RTCA model for a typical LAAS scenario. Hopfield model is used to estimate delay in GPS signal and RTCA model is used to estimate delay in pseudolite signal. As the tropospheric delay is a function of meteorological parameters, these parameter values are collected from India Meteorological Department (IMD) for Hyderabad city, India, for a typical day. These data values are interpolated with respect to altitude for the estimation of TD at various heights. For an altitude of 1.94 m TD in APL signal is estimated as 7.2 m (approx.) and TD in GPS signal is estimated as 2.75 m. When the aircraft just touches the runway touchdown point, TD in APL signal reduces to insignificant value and TD in GPS signal increases to 3.25 m.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"68 1","pages":"1-5"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86795472","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496584
S. Ramakrishnan, G. Hemalatha, P. Mohan, R. Seshadri
Using spurious power suppression technique (SPST) in VLSI will reduce the power consumption of the system significantly. Here we are going to implement this design in Infinite Impulse Response (IIR) and Finite Impulse Response (FIR) filter architecture. When we are using this technique in this multipliers the no of partial products generated will be reduced to half which reduces the computation. Then obviously the power consumption is also reduced by this method using the various hardware device.
{"title":"Power efficient Vlsi architecture using Sps technique","authors":"S. Ramakrishnan, G. Hemalatha, P. Mohan, R. Seshadri","doi":"10.1109/ICEVENT.2013.6496584","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496584","url":null,"abstract":"Using spurious power suppression technique (SPST) in VLSI will reduce the power consumption of the system significantly. Here we are going to implement this design in Infinite Impulse Response (IIR) and Finite Impulse Response (FIR) filter architecture. When we are using this technique in this multipliers the no of partial products generated will be reduced to half which reduces the computation. Then obviously the power consumption is also reduced by this method using the various hardware device.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"20 1","pages":"1-4"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77988312","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2013-04-11DOI: 10.1109/ICEVENT.2013.6496548
V. Singh, I. Singh, S. K. Sud
Embedded controlled sensor network is the technology used to implement environmental solutions effectively. Many researchers have been making attempts to develop the embedded controlled sensor network. The existing systems are bulky, very costly and difficult to maintain. The proposed system is cost effective and controlled by user friendly embedded systems. In the proposed system ARM based microcontroller and wireless sensors are used to control the various devices and to monitor the information regarding the environment using Zigbee and GSM technologies.
{"title":"Environment monitoring and device control using ARM based embedded controlled sensor network","authors":"V. Singh, I. Singh, S. K. Sud","doi":"10.1109/ICEVENT.2013.6496548","DOIUrl":"https://doi.org/10.1109/ICEVENT.2013.6496548","url":null,"abstract":"Embedded controlled sensor network is the technology used to implement environmental solutions effectively. Many researchers have been making attempts to develop the embedded controlled sensor network. The existing systems are bulky, very costly and difficult to maintain. The proposed system is cost effective and controlled by user friendly embedded systems. In the proposed system ARM based microcontroller and wireless sensors are used to control the various devices and to monitor the information regarding the environment using Zigbee and GSM technologies.","PeriodicalId":6426,"journal":{"name":"2013 International Conference on Emerging Trends in VLSI, Embedded System, Nano Electronics and Telecommunication System (ICEVENT)","volume":"49 43 1","pages":"1-3"},"PeriodicalIF":0.0,"publicationDate":"2013-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"77718763","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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