Pub Date : 1991-05-14DOI: 10.1109/MWSCAS.1991.251966
M. Hadjinicolaou
A design methodology for deriving switch level equivalent circuits for CMOS combinational logic circuits based on Petri nets is presented. Detailed Petri net models of the p- and n-type transistors are discussed, and the use of these models to construct the CMOS gates (i.e., NOT, NAND, NOR) for logic correctness is illustrated. How the proposed methodology can be extended to include timing verification is discussed.<>
{"title":"A design methodology for modelling CMOS gates based on Petri nets","authors":"M. Hadjinicolaou","doi":"10.1109/MWSCAS.1991.251966","DOIUrl":"https://doi.org/10.1109/MWSCAS.1991.251966","url":null,"abstract":"A design methodology for deriving switch level equivalent circuits for CMOS combinational logic circuits based on Petri nets is presented. Detailed Petri net models of the p- and n-type transistors are discussed, and the use of these models to construct the CMOS gates (i.e., NOT, NAND, NOR) for logic correctness is illustrated. How the proposed methodology can be extended to include timing verification is discussed.<<ETX>>","PeriodicalId":6453,"journal":{"name":"[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems","volume":"45 1","pages":"1005-1007 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1991-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73513292","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-05-14DOI: 10.1109/MWSCAS.1991.252133
K. Takahashi, S. Mori
Presents a systolic array implementation of a modified LMS (least mean square) algorithm, which is based on the dynamics of the network in the Hopfield model network. The rate of the adaptation of the modified algorithm is n times as fast as the conventional LMS algorithm with the same control gain, where n is the number of iterations for each piece of sampled data in the network. However, the computational complexity of the algorithm increased. In the modified algorithm, the coefficients can be computed independently. Therefore, parallel array processing such as a systolic array is available. The systolic array consists of one kind of processing element, and the processing element consists on one multiplier, one adder, and one memory. The number of the processing element is the same as the order of the adaptive filter. The computation time for updating the coefficients of the adaptive filter is (L+1)n in time steps, where L is the number of coefficients of the adaptive filter and n is the number of iterations in the network.<>
{"title":"Systolic array architecture for LMS algorithm using Hopfield model network","authors":"K. Takahashi, S. Mori","doi":"10.1109/MWSCAS.1991.252133","DOIUrl":"https://doi.org/10.1109/MWSCAS.1991.252133","url":null,"abstract":"Presents a systolic array implementation of a modified LMS (least mean square) algorithm, which is based on the dynamics of the network in the Hopfield model network. The rate of the adaptation of the modified algorithm is n times as fast as the conventional LMS algorithm with the same control gain, where n is the number of iterations for each piece of sampled data in the network. However, the computational complexity of the algorithm increased. In the modified algorithm, the coefficients can be computed independently. Therefore, parallel array processing such as a systolic array is available. The systolic array consists of one kind of processing element, and the processing element consists on one multiplier, one adder, and one memory. The number of the processing element is the same as the order of the adaptive filter. The computation time for updating the coefficients of the adaptive filter is (L+1)n in time steps, where L is the number of coefficients of the adaptive filter and n is the number of iterations in the network.<<ETX>>","PeriodicalId":6453,"journal":{"name":"[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems","volume":"44 1","pages":"87-90 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1991-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"73658470","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-05-14DOI: 10.1109/MWSCAS.1991.252019
M.B.E. Abdelrazik
The authors describe a parallel technique for decomposition and implementation of multidimensional linear time invariant systems. The resulting structures are regular, modular, and highly parallel. The approach used is systematic, and therefore it would be useful for logic synthesis. The application of such an approach in digital signal processing (DSP) and numerical computations reduces the design time, resulting in low cost. This approach produces various structures (semi-systolic, quasi-systolic, and pure systolic structures) which could be considered as application specific array processors.<>
{"title":"A parallel technique for M-D digital signal processing","authors":"M.B.E. Abdelrazik","doi":"10.1109/MWSCAS.1991.252019","DOIUrl":"https://doi.org/10.1109/MWSCAS.1991.252019","url":null,"abstract":"The authors describe a parallel technique for decomposition and implementation of multidimensional linear time invariant systems. The resulting structures are regular, modular, and highly parallel. The approach used is systematic, and therefore it would be useful for logic synthesis. The application of such an approach in digital signal processing (DSP) and numerical computations reduces the design time, resulting in low cost. This approach produces various structures (semi-systolic, quasi-systolic, and pure systolic structures) which could be considered as application specific array processors.<<ETX>>","PeriodicalId":6453,"journal":{"name":"[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems","volume":"14 1","pages":"688-691 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1991-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75212389","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-05-14DOI: 10.1109/MWSCAS.1991.251975
J. Blyler, J. Prabhakar
A system control unit, using discrete TTL (transistor-transistor logic) components, was designed and built in 1983 by the US Department of Defense. This control unit was needed to automate the process of acquiring and recording fuel tank temperature data during extended flight periods. The program's goal was to determine the coldest temperature jet fuel would experience during flight. The authors compare this digital circuit design with a proposed microprocessor-based design intended to replace the original digital system controller. The microprocessor design is shown to decrease the size and power consumption, while increasing the system's reliability. Further, this new design is configured to use existing input/output devices.<>
{"title":"System design for automated airborne data acquisition","authors":"J. Blyler, J. Prabhakar","doi":"10.1109/MWSCAS.1991.251975","DOIUrl":"https://doi.org/10.1109/MWSCAS.1991.251975","url":null,"abstract":"A system control unit, using discrete TTL (transistor-transistor logic) components, was designed and built in 1983 by the US Department of Defense. This control unit was needed to automate the process of acquiring and recording fuel tank temperature data during extended flight periods. The program's goal was to determine the coldest temperature jet fuel would experience during flight. The authors compare this digital circuit design with a proposed microprocessor-based design intended to replace the original digital system controller. The microprocessor design is shown to decrease the size and power consumption, while increasing the system's reliability. Further, this new design is configured to use existing input/output devices.<<ETX>>","PeriodicalId":6453,"journal":{"name":"[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems","volume":"60 1","pages":"966-969 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1991-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75290681","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-05-14DOI: 10.1109/MWSCAS.1991.252045
Chin-Liang Wang
The author presents a novel parallel-in-parallel-out bit-level systolic array with unidirectional data flow for computing exponentiation in GF(2/sup m/). The array is highly regular and modular, and thus well it is suited to VLSI implementation. In addition, it can provide the maximum throughput in the sense of producing new results at a rate of one per clock cycle. Compared to a previously known systolic (GF2/sup m/) exponentiator with the same throughput performance, the proposed system requires much less chip area, has smaller latency, and makes it easier to incorporate fault-tolerant design.<>
{"title":"A systolic exponentiator for finite fields GF(2/sup m/)","authors":"Chin-Liang Wang","doi":"10.1109/MWSCAS.1991.252045","DOIUrl":"https://doi.org/10.1109/MWSCAS.1991.252045","url":null,"abstract":"The author presents a novel parallel-in-parallel-out bit-level systolic array with unidirectional data flow for computing exponentiation in GF(2/sup m/). The array is highly regular and modular, and thus well it is suited to VLSI implementation. In addition, it can provide the maximum throughput in the sense of producing new results at a rate of one per clock cycle. Compared to a previously known systolic (GF2/sup m/) exponentiator with the same throughput performance, the proposed system requires much less chip area, has smaller latency, and makes it easier to incorporate fault-tolerant design.<<ETX>>","PeriodicalId":6453,"journal":{"name":"[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems","volume":"25 1","pages":"279-282 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1991-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75531221","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-05-14DOI: 10.1109/MWSCAS.1991.251986
T.-H.S. Li, F. Lin
It is argued that, when a singularly perturbed proper plant is preceded by a zero-order-hold, the direct and the induced direct (resulting from neglecting unmodeled high-frequency dynamics) transmission terms of the reduced-order model should be treated as two distinct terms; the latter contains a delay element and the former does not. It is shown that the observer-based sampled-data controller for the reduced-order model can stabilize the original plant for sufficiently small values of the singular perturbation parameter.<>
{"title":"Robust observer-based stabilizer of singularly perturbed systems: sampled-data control approach","authors":"T.-H.S. Li, F. Lin","doi":"10.1109/MWSCAS.1991.251986","DOIUrl":"https://doi.org/10.1109/MWSCAS.1991.251986","url":null,"abstract":"It is argued that, when a singularly perturbed proper plant is preceded by a zero-order-hold, the direct and the induced direct (resulting from neglecting unmodeled high-frequency dynamics) transmission terms of the reduced-order model should be treated as two distinct terms; the latter contains a delay element and the former does not. It is shown that the observer-based sampled-data controller for the reduced-order model can stabilize the original plant for sufficiently small values of the singular perturbation parameter.<<ETX>>","PeriodicalId":6453,"journal":{"name":"[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems","volume":"6 1","pages":"924-927 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1991-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75569205","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-05-14DOI: 10.1109/MWSCAS.1991.252076
M. Rizkalla, B.K. Archer, H. Gundrum
The stability of a previously designed, minimum-drift video amplifier is studied over a wide bandwidth. An original upper frequency of 2 MHz has been extended to 20 MHz using high-frequency compensation techniques. The Y-parameters were measured at 3.0 MHz and used in the Linville power plane to determine the input and output power curves. Two techniques for enhancing the system response have been investigated. In the mismatch method, a stem stability factor was chosen to keep the system stability over a wide band of frequencies. The neutralization method in which the intrinsic feedback parameter Y/sub 12/ is neutralized is discussed. While both methods show acceptable stability improvements, the mismatch method is used because it does not require an additional transformer to the system. The video amplifier LM733 driven by the N-channel BFR84 MOSFET has been used for demonstration.<>
{"title":"Linville power plane stability and bandwidth improvements in a minimum-drift video amplifier","authors":"M. Rizkalla, B.K. Archer, H. Gundrum","doi":"10.1109/MWSCAS.1991.252076","DOIUrl":"https://doi.org/10.1109/MWSCAS.1991.252076","url":null,"abstract":"The stability of a previously designed, minimum-drift video amplifier is studied over a wide bandwidth. An original upper frequency of 2 MHz has been extended to 20 MHz using high-frequency compensation techniques. The Y-parameters were measured at 3.0 MHz and used in the Linville power plane to determine the input and output power curves. Two techniques for enhancing the system response have been investigated. In the mismatch method, a stem stability factor was chosen to keep the system stability over a wide band of frequencies. The neutralization method in which the intrinsic feedback parameter Y/sub 12/ is neutralized is discussed. While both methods show acceptable stability improvements, the mismatch method is used because it does not require an additional transformer to the system. The video amplifier LM733 driven by the N-channel BFR84 MOSFET has been used for demonstration.<<ETX>>","PeriodicalId":6453,"journal":{"name":"[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems","volume":"26 1","pages":"863-865 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1991-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"72600579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-05-14DOI: 10.1109/MWSCAS.1991.252001
O. Feely
It is shown how a rigorous application of the theory of nonlinear dynamics can explain the behavior of the single-loop sigma-delta system in the presence of such common circuit nonidealities as integrator leak, integrator gain mismatch, and comparator offset with bilevel or multilevel quantization. The results provide circuit designers with qualitative insights into the behavior of these commonly used systems as well as quantitative information for use in system design. The extension of the map describing the leaky system into the parameter region p>1 is also examined, and the chaotic nature of the ensuing motion is discussed.<>
{"title":"Nonlinear dynamics of sigma-delta modulation","authors":"O. Feely","doi":"10.1109/MWSCAS.1991.252001","DOIUrl":"https://doi.org/10.1109/MWSCAS.1991.252001","url":null,"abstract":"It is shown how a rigorous application of the theory of nonlinear dynamics can explain the behavior of the single-loop sigma-delta system in the presence of such common circuit nonidealities as integrator leak, integrator gain mismatch, and comparator offset with bilevel or multilevel quantization. The results provide circuit designers with qualitative insights into the behavior of these commonly used systems as well as quantitative information for use in system design. The extension of the map describing the leaky system into the parameter region p>1 is also examined, and the chaotic nature of the ensuing motion is discussed.<<ETX>>","PeriodicalId":6453,"journal":{"name":"[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems","volume":"72 1","pages":"760-763 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1991-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"80531484","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-05-14DOI: 10.1109/MWSCAS.1991.252007
M. Navarro
Some filter realizations require a series capacitance that is difficult to implement when using coaxial cable technology. The difficulty in using this topology for a series capacitor stems from the fact that small internal radii produce small series capacitances, unless a very small gap size is used. The sensitivity of the series capacitance to errors in gap size increases with smaller gaps and makes this topology useless in this respect. To alleviate this problem a topology is proposed which consists of two additional disks added to the gap, thus providing a new parameter to adjust, the disk radius, that together with the gap size permits a better (less sensitive) method to synthesize a given series capacitance.<>
{"title":"Disk-gap discontinuity in a coaxial transmission line","authors":"M. Navarro","doi":"10.1109/MWSCAS.1991.252007","DOIUrl":"https://doi.org/10.1109/MWSCAS.1991.252007","url":null,"abstract":"Some filter realizations require a series capacitance that is difficult to implement when using coaxial cable technology. The difficulty in using this topology for a series capacitor stems from the fact that small internal radii produce small series capacitances, unless a very small gap size is used. The sensitivity of the series capacitance to errors in gap size increases with smaller gaps and makes this topology useless in this respect. To alleviate this problem a topology is proposed which consists of two additional disks added to the gap, thus providing a new parameter to adjust, the disk radius, that together with the gap size permits a better (less sensitive) method to synthesize a given series capacitance.<<ETX>>","PeriodicalId":6453,"journal":{"name":"[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems","volume":"1 1","pages":"735-738 vol.2"},"PeriodicalIF":0.0,"publicationDate":"1991-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"76601347","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1991-05-14DOI: 10.1109/MWSCAS.1991.252198
C.-P. Cheng, Tzuu-Hseng S. Li
The theory of matrix perturbation is used to calculate the stability margins and design the feedback gain matrix which yields the specified stability margins for linear time-invariant multivariable systems. The calculation of stability margins is equivalent to the solution of a polynomial equation and the feedback gain design is equivalent to the problem of pole assignment. When these results are applied to singularly perturbed systems one will know why the stability of real dynamic systems can be analyzed from their mathematical models.<>
{"title":"Calculation and control design of stability margins: a solution to singularly perturbed systems","authors":"C.-P. Cheng, Tzuu-Hseng S. Li","doi":"10.1109/MWSCAS.1991.252198","DOIUrl":"https://doi.org/10.1109/MWSCAS.1991.252198","url":null,"abstract":"The theory of matrix perturbation is used to calculate the stability margins and design the feedback gain matrix which yields the specified stability margins for linear time-invariant multivariable systems. The calculation of stability margins is equivalent to the solution of a polynomial equation and the feedback gain design is equivalent to the problem of pole assignment. When these results are applied to singularly perturbed systems one will know why the stability of real dynamic systems can be analyzed from their mathematical models.<<ETX>>","PeriodicalId":6453,"journal":{"name":"[1991] Proceedings of the 34th Midwest Symposium on Circuits and Systems","volume":"7 1","pages":"474-477 vol.1"},"PeriodicalIF":0.0,"publicationDate":"1991-05-14","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78873291","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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