Pub Date : 2016-05-20DOI: 10.1109/RTEICT.2016.7808042
S. Ajmal, S. Gangadharaiah
The design of pipelined Fast Fourier transform (PFFT) in modern communication systems provides an efficient way for computation of FFT with better area utilizing hardware architecture. Previously, the radix-22 had been used only for single path delay feedback architectures. Later with many types of research works the radix 22 was extended to multi-path delay commutator (MDC) architectures. This paper presents area optimization of parallel pipelined radix-22 feed forward Fast Fourier transform (PPFFT) architecture. This architecture is provided for parallelism value 4 and 16 sample points and the area of proposed PFFT is compared with other PFFT (feed forward) architectures using the same synthesis tool and FPGA. The comparison shows that the proposed architecture exhibits better area optimization.
{"title":"FPGA based area optimized parallel pipelined radix-22 feed forward FFT architecture","authors":"S. Ajmal, S. Gangadharaiah","doi":"10.1109/RTEICT.2016.7808042","DOIUrl":"https://doi.org/10.1109/RTEICT.2016.7808042","url":null,"abstract":"The design of pipelined Fast Fourier transform (PFFT) in modern communication systems provides an efficient way for computation of FFT with better area utilizing hardware architecture. Previously, the radix-22 had been used only for single path delay feedback architectures. Later with many types of research works the radix 22 was extended to multi-path delay commutator (MDC) architectures. This paper presents area optimization of parallel pipelined radix-22 feed forward Fast Fourier transform (PPFFT) architecture. This architecture is provided for parallelism value 4 and 16 sample points and the area of proposed PFFT is compared with other PFFT (feed forward) architectures using the same synthesis tool and FPGA. The comparison shows that the proposed architecture exhibits better area optimization.","PeriodicalId":6527,"journal":{"name":"2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)","volume":"55 1","pages":"1302-1307"},"PeriodicalIF":0.0,"publicationDate":"2016-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"84188063","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-20DOI: 10.1109/RTEICT.2016.7808132
Pooja Tukaram Dalvi, Nagaraj Vernekar
Red blood cell classification and counting plays a very important role in detecting diseases like iron deficiency anemia, vitamin B12 deficiency anemia etc. In this research we intend to develop a standalone application that can classify the red blood cells into four abnormal types namely elliptocytes, echinocytes, tear drop cells and macrocytes. We will also provide the total red blood cell count. Thirteen Geometric features have been used to classify the red blood cells into the four abnormal types. We have used two data mining classifiers namely Artificial Neural Network and Decision Tree Classifier and we have compared the results of the two classifiers with respect to accuracy in classifying the red blood cells. The proposed method exhibits an accuracy of 95.27% for detecting elliptocytes, 96.06% for echinocytes, 85.82% for tear drop cells 85.82% for macrocytes and 89.76% for normal red blood cells.
{"title":"Computer aided detection of abnormal red blood cells","authors":"Pooja Tukaram Dalvi, Nagaraj Vernekar","doi":"10.1109/RTEICT.2016.7808132","DOIUrl":"https://doi.org/10.1109/RTEICT.2016.7808132","url":null,"abstract":"Red blood cell classification and counting plays a very important role in detecting diseases like iron deficiency anemia, vitamin B12 deficiency anemia etc. In this research we intend to develop a standalone application that can classify the red blood cells into four abnormal types namely elliptocytes, echinocytes, tear drop cells and macrocytes. We will also provide the total red blood cell count. Thirteen Geometric features have been used to classify the red blood cells into the four abnormal types. We have used two data mining classifiers namely Artificial Neural Network and Decision Tree Classifier and we have compared the results of the two classifiers with respect to accuracy in classifying the red blood cells. The proposed method exhibits an accuracy of 95.27% for detecting elliptocytes, 96.06% for echinocytes, 85.82% for tear drop cells 85.82% for macrocytes and 89.76% for normal red blood cells.","PeriodicalId":6527,"journal":{"name":"2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)","volume":"31 1","pages":"1741-1746"},"PeriodicalIF":0.0,"publicationDate":"2016-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"83097795","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-20DOI: 10.1109/RTEICT.2016.7808137
S. Sharma, A. Khachane, Dilip Motwani
This paper demonstrates the framework for multi-object tracking using TLD background. We examine long-term tracking of object in a video stream. The object is characterized by its location and extent in the video frame. In every next frame, the aim is to calculate the location and extent of object or indicate that object is not present. There are different algorithms which perceive the object in real-time. This system proposes a model which uses modified template matching algorithm based on SURF algorithm and squared difference error method. The template matching is done based on comparison of image features. SURF algorithm of template matching is based on feature point detection from images whereas as the template matching is based on pixel feature comparison. We develop a novel method of tracking based upon template tracking algorithm which crops the region of interest(ROI) from the selected live object from a video stream from trained object database. Matching feature is found by applying principle component analysis.
{"title":"Multi-object tracking using TLD framework","authors":"S. Sharma, A. Khachane, Dilip Motwani","doi":"10.1109/RTEICT.2016.7808137","DOIUrl":"https://doi.org/10.1109/RTEICT.2016.7808137","url":null,"abstract":"This paper demonstrates the framework for multi-object tracking using TLD background. We examine long-term tracking of object in a video stream. The object is characterized by its location and extent in the video frame. In every next frame, the aim is to calculate the location and extent of object or indicate that object is not present. There are different algorithms which perceive the object in real-time. This system proposes a model which uses modified template matching algorithm based on SURF algorithm and squared difference error method. The template matching is done based on comparison of image features. SURF algorithm of template matching is based on feature point detection from images whereas as the template matching is based on pixel feature comparison. We develop a novel method of tracking based upon template tracking algorithm which crops the region of interest(ROI) from the selected live object from a video stream from trained object database. Matching feature is found by applying principle component analysis.","PeriodicalId":6527,"journal":{"name":"2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)","volume":"18 1","pages":"1766-1769"},"PeriodicalIF":0.0,"publicationDate":"2016-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"78714541","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-20DOI: 10.1109/RTEICT.2016.7808143
Tushar Jadhav, Santosh M. Kamble
Three Dimensional reconstruction of an object is one of the current research topics. This paper discusses the generation of a model in Three-Dimensional space by taking views of the object from different angles. Image acquisition is done using a single digital camera and turn table. Camera calibration is done using the images of checkerboard pattern. Camera calibration gives the intrinsic and extrinsic parameters of a camera. These camera parameters are used to calculate the camera matrix. Camera matrix gives the relation between image reference frame and world reference frame. Each view captured of the object is segmented. The silhouettes are obtained from the segmented images of object. Visual hull is formed by the silhouettes and camera projection matrix information using space carving algorithm. Finally the 3D volume of the object is constructed.
{"title":"Volume measurement of object using computer vision","authors":"Tushar Jadhav, Santosh M. Kamble","doi":"10.1109/RTEICT.2016.7808143","DOIUrl":"https://doi.org/10.1109/RTEICT.2016.7808143","url":null,"abstract":"Three Dimensional reconstruction of an object is one of the current research topics. This paper discusses the generation of a model in Three-Dimensional space by taking views of the object from different angles. Image acquisition is done using a single digital camera and turn table. Camera calibration is done using the images of checkerboard pattern. Camera calibration gives the intrinsic and extrinsic parameters of a camera. These camera parameters are used to calculate the camera matrix. Camera matrix gives the relation between image reference frame and world reference frame. Each view captured of the object is segmented. The silhouettes are obtained from the segmented images of object. Visual hull is formed by the silhouettes and camera projection matrix information using space carving algorithm. Finally the 3D volume of the object is constructed.","PeriodicalId":6527,"journal":{"name":"2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)","volume":"14 1","pages":"1792-1795"},"PeriodicalIF":0.0,"publicationDate":"2016-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"86894091","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-20DOI: 10.1109/RTEICT.2016.7808152
R. Jain, J. B. Sharma
Security of image data is essential during communication from various security attacks. This paper proposed a new technique for RGB color image encryption and decryption by the combination of shuffling and masking. The chaotic Baker map is used for first layer of image encryption by randomizing the pixels of each components of color image such as red, green and blue and then applying the diffusion process i.e. fractional dual random phase masks (FDRPM) technique which is applied on each component to increase the security level of given method. The order of Discrete Fractional Fourier Transform (DFRFT) act as a key for the process which provides extra degree of security to the proposed system. Matlab simulations are performed to check the security robustness of proposed scheme. Performance of proposed scheme is verified by noise analysis such as mean square error (MSE) and various differential analysis such as Unified Average Change Intensity (UACI) and Number of Pixels Change Rate (NPCR). Results of various analysis shows that the novel proposed encryption technique shows high efficiency and security for color images.
{"title":"Symmetric color image encryption algorithm using fractional DRPM and chaotic baker map","authors":"R. Jain, J. B. Sharma","doi":"10.1109/RTEICT.2016.7808152","DOIUrl":"https://doi.org/10.1109/RTEICT.2016.7808152","url":null,"abstract":"Security of image data is essential during communication from various security attacks. This paper proposed a new technique for RGB color image encryption and decryption by the combination of shuffling and masking. The chaotic Baker map is used for first layer of image encryption by randomizing the pixels of each components of color image such as red, green and blue and then applying the diffusion process i.e. fractional dual random phase masks (FDRPM) technique which is applied on each component to increase the security level of given method. The order of Discrete Fractional Fourier Transform (DFRFT) act as a key for the process which provides extra degree of security to the proposed system. Matlab simulations are performed to check the security robustness of proposed scheme. Performance of proposed scheme is verified by noise analysis such as mean square error (MSE) and various differential analysis such as Unified Average Change Intensity (UACI) and Number of Pixels Change Rate (NPCR). Results of various analysis shows that the novel proposed encryption technique shows high efficiency and security for color images.","PeriodicalId":6527,"journal":{"name":"2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)","volume":"1 1","pages":"1835-1840"},"PeriodicalIF":0.0,"publicationDate":"2016-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"90244719","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-20DOI: 10.1109/RTEICT.2016.7807884
S. Rosaline, S. Raghavan
Split Ring Resonators (SRRs) are a class of Meta material structures, which are composed of two metallic rings that are separated by a gap and splits etched on opposite side of the rings. These structures have been successfully exploited to understand its magnetic, electric and electromagnetic properties. This paper gives (i) a systematic understanding on the resonant frequency of SRR structure which is intended to be used in the GHz range, (ii) its magnetic and electric excitation modes under two different excitation conditions, (iii) the steps involved in obtaining the Scattering Parameters of these structures using classic waveguide approach and (iv) the procedure for retrieving the effective material parameters like permeability and permittivity. Difference in resonance with respect to single SRR structure and an array of structures are also enlightened. The results are obtained from HFSS and CST and are compared. Both the results were found similar and satisfactory.
{"title":"Exploring split ring resonators for GHz applications","authors":"S. Rosaline, S. Raghavan","doi":"10.1109/RTEICT.2016.7807884","DOIUrl":"https://doi.org/10.1109/RTEICT.2016.7807884","url":null,"abstract":"Split Ring Resonators (SRRs) are a class of Meta material structures, which are composed of two metallic rings that are separated by a gap and splits etched on opposite side of the rings. These structures have been successfully exploited to understand its magnetic, electric and electromagnetic properties. This paper gives (i) a systematic understanding on the resonant frequency of SRR structure which is intended to be used in the GHz range, (ii) its magnetic and electric excitation modes under two different excitation conditions, (iii) the steps involved in obtaining the Scattering Parameters of these structures using classic waveguide approach and (iv) the procedure for retrieving the effective material parameters like permeability and permittivity. Difference in resonance with respect to single SRR structure and an array of structures are also enlightened. The results are obtained from HFSS and CST and are compared. Both the results were found similar and satisfactory.","PeriodicalId":6527,"journal":{"name":"2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)","volume":"67 1","pages":"559-562"},"PeriodicalIF":0.0,"publicationDate":"2016-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88955925","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-20DOI: 10.1109/RTEICT.2016.7807849
V. S. P. Nayak, N. Ramchander, R. Reddy, Tapas Marandi
Power is one of the most important design parameter after speed, in integrated circuit. One of the basic fundamental component in such circuit is adder and subtractor. In order to optimize such circuits there is need of designing efficient and low power fundamental blocks. As per the Launder's principle, KTln2 heat is dissipated if there is any loss in bit. Excess-3 code is one of the sequential codes used widely in digital circuits for performing arithmetic operations. Since conventional excess-3 adder and excess-3 subtractor both circuits designed in irreversible logic observe large amount of leakage power. By keeping this as main point, this paper explains the process of designing 4-bit excess-3 adder and subtactor in 90nm technology and also worked to combine both individual circuits to design as a single circuit where it can perform addition and subtraction on excess-3 coded bits simultaneously. This paper also gives mathematical analysis of n-bit proposed circuit in terms of number of gates, quantum cost, garbage output, power and delay. Finally simulation results are obtained by using cadence virtuoso and observed power dissipation for proposed circuit is 221uWIn this paper detail simulation results along with the power graph submitted.
{"title":"Analysis and design of reversible excess-3 adder and subtractor","authors":"V. S. P. Nayak, N. Ramchander, R. Reddy, Tapas Marandi","doi":"10.1109/RTEICT.2016.7807849","DOIUrl":"https://doi.org/10.1109/RTEICT.2016.7807849","url":null,"abstract":"Power is one of the most important design parameter after speed, in integrated circuit. One of the basic fundamental component in such circuit is adder and subtractor. In order to optimize such circuits there is need of designing efficient and low power fundamental blocks. As per the Launder's principle, KTln2 heat is dissipated if there is any loss in bit. Excess-3 code is one of the sequential codes used widely in digital circuits for performing arithmetic operations. Since conventional excess-3 adder and excess-3 subtractor both circuits designed in irreversible logic observe large amount of leakage power. By keeping this as main point, this paper explains the process of designing 4-bit excess-3 adder and subtactor in 90nm technology and also worked to combine both individual circuits to design as a single circuit where it can perform addition and subtraction on excess-3 coded bits simultaneously. This paper also gives mathematical analysis of n-bit proposed circuit in terms of number of gates, quantum cost, garbage output, power and delay. Finally simulation results are obtained by using cadence virtuoso and observed power dissipation for proposed circuit is 221uWIn this paper detail simulation results along with the power graph submitted.","PeriodicalId":6527,"journal":{"name":"2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)","volume":"10 1","pages":"397-400"},"PeriodicalIF":0.0,"publicationDate":"2016-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"88652959","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-20DOI: 10.1109/RTEICT.2016.7807778
Urvashi Jadon, Hiroshama Nain, V. Mishra
The demand for high speed data transmission is increasing so as to fulfil the demand of high speed the Duo-binary modulation Format is used. Hence this paper deals with the duo binary modulation technique in the optical single channel system at different fibres lengths and data bit rate. While increasing the length and data rate of the transmitter the bit error rate changes simultaneously. The demand for the high bit rate data transmission is increasing and thus easily accomplished.
{"title":"Analysis of duo-binary modulation scheme in single channel on the basis of BER","authors":"Urvashi Jadon, Hiroshama Nain, V. Mishra","doi":"10.1109/RTEICT.2016.7807778","DOIUrl":"https://doi.org/10.1109/RTEICT.2016.7807778","url":null,"abstract":"The demand for high speed data transmission is increasing so as to fulfil the demand of high speed the Duo-binary modulation Format is used. Hence this paper deals with the duo binary modulation technique in the optical single channel system at different fibres lengths and data bit rate. While increasing the length and data rate of the transmitter the bit error rate changes simultaneously. The demand for the high bit rate data transmission is increasing and thus easily accomplished.","PeriodicalId":6527,"journal":{"name":"2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)","volume":"68 1","pages":"40-42"},"PeriodicalIF":0.0,"publicationDate":"2016-05-20","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"89617115","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-01DOI: 10.1109/RTEICT.2016.7808039
B. Y. Kushal, M. Chitra
Wireless sensor networks (WSN) consist of large number of sensor nodes. These small and low cost sensor nodes are deployed in monitoring region of interest. Since sensors perform multiple functions such as data gathering and data transmission results in energy depletion, these effects the network lifetime. The nodes having tendency to fail due to energy depletion is the critical issue in WSN. Due to wide number of applications of WSN, it is required to enhance the life time of entire network. Proposed method in this paper is aimed to optimize the energy dissipation by modifying the CH (Cluster Head) selection approach in LEACH (Low Energy Adaptive Clustering Hierarchy) algorithm and avoids the energy-hole problem considering mobility to the sink node which helps to prolong the lifetime of entire network.
无线传感器网络(WSN)由大量传感器节点组成。这些小而低成本的传感器节点部署在感兴趣的监测区域。由于传感器执行多种功能，如数据收集和数据传输，导致能量消耗，这些影响网络寿命。在无线传感器网络中，节点由于能量耗尽而容易失效是一个关键问题。由于无线传感器网络的广泛应用，对提高整个网络的寿命提出了更高的要求。本文提出的方法旨在通过改进LEACH (Low energy Adaptive Clustering Hierarchy)算法中的CH(簇头)选择方法来优化能量耗散，避免考虑向汇聚节点迁移的能量空洞问题，从而延长整个网络的生命周期。
{"title":"Cluster based routing protocol to prolong network lifetime through mobile sink in WSN","authors":"B. Y. Kushal, M. Chitra","doi":"10.1109/RTEICT.2016.7808039","DOIUrl":"https://doi.org/10.1109/RTEICT.2016.7808039","url":null,"abstract":"Wireless sensor networks (WSN) consist of large number of sensor nodes. These small and low cost sensor nodes are deployed in monitoring region of interest. Since sensors perform multiple functions such as data gathering and data transmission results in energy depletion, these effects the network lifetime. The nodes having tendency to fail due to energy depletion is the critical issue in WSN. Due to wide number of applications of WSN, it is required to enhance the life time of entire network. Proposed method in this paper is aimed to optimize the energy dissipation by modifying the CH (Cluster Head) selection approach in LEACH (Low Energy Adaptive Clustering Hierarchy) algorithm and avoids the energy-hole problem considering mobility to the sink node which helps to prolong the lifetime of entire network.","PeriodicalId":6527,"journal":{"name":"2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)","volume":"28 1","pages":"1287-1291"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"75156048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2016-05-01DOI: 10.1109/RTEICT.2016.7807834
Raju Ranjan
In today's world power consumption is a burning issue. Research is going on to find out various new power efficient design techniques. Power dissipation could be reduced by transforming continuous-time current-steering circuits into discrete-time charge-steering circuits. Charge steering shows all potential to emerge as an effective technique to reduce power dissipation for high-speed circuits. This technique can be exploited in the design of both analog and semi-analog circuits such as an op-amp, latches and clock-data recovery (CDR) circuits. This paper discusses the design techniques of charge steering circuits like op-amp and latches. Both 1st stage and 2nd stage op-amp circuits and different type of latches in a single stage and cascade forms are designed. The power and performances of the charge steering circuits are also compared with conventional design techniques like current mode logic (CML) circuits to show the improvements. The results show that the op-amp power dissipation is reduced by approximately 87% with better gain. All circuits have been designed using UMC's 180 nm CMOS technology.
{"title":"Design of low power operational amplifier and digital latch circuits using power efficient charge steering technique","authors":"Raju Ranjan","doi":"10.1109/RTEICT.2016.7807834","DOIUrl":"https://doi.org/10.1109/RTEICT.2016.7807834","url":null,"abstract":"In today's world power consumption is a burning issue. Research is going on to find out various new power efficient design techniques. Power dissipation could be reduced by transforming continuous-time current-steering circuits into discrete-time charge-steering circuits. Charge steering shows all potential to emerge as an effective technique to reduce power dissipation for high-speed circuits. This technique can be exploited in the design of both analog and semi-analog circuits such as an op-amp, latches and clock-data recovery (CDR) circuits. This paper discusses the design techniques of charge steering circuits like op-amp and latches. Both 1st stage and 2nd stage op-amp circuits and different type of latches in a single stage and cascade forms are designed. The power and performances of the charge steering circuits are also compared with conventional design techniques like current mode logic (CML) circuits to show the improvements. The results show that the op-amp power dissipation is reduced by approximately 87% with better gain. All circuits have been designed using UMC's 180 nm CMOS technology.","PeriodicalId":6527,"journal":{"name":"2016 IEEE International Conference on Recent Trends in Electronics, Information & Communication Technology (RTEICT)","volume":"14 1","pages":"316-321"},"PeriodicalIF":0.0,"publicationDate":"2016-05-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"74505717","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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