Pub Date : 2023-11-08DOI: 10.3389/felec.2023.1277927
Keshari Nandan, Amit Agarwal, Somnath Bhowmick, Yogesh S. Chauhan
Two-dimensional (2-D) semiconductors are emerging as strong contenders for the future of Angstrom technology nodes. Their potential lies in enhanced device scaling and energy-efficient switching compared to traditional bulk semiconductors like Si, Ge, and III-V compounds. These materials offer significant advantages, particularly in ultra-thin devices with atomic scale thicknesses. Their unique structures enable the creation of one-dimensional nanoribbons and vertical and lateral heterostructures. This versatility in design, coupled with their distinctive properties, paves the way for efficient energy switching in electronic devices. Moreover, 2-D semiconductors offer opportunities for integrating metallic nanoribbons, carbon nanotubes (CNT), and graphene with their 2-D channel materials. This integration helps overcome lithography limitations for gate patterning, allowing the realization of ultra-short gate dimensions. Considering these factors, the potential of 2-D semiconductors in electronics is vast. This concise review focuses on the latest advancements and engineering strategies in 2-D logic devices.
{"title":"Two-dimensional semiconductors based field-effect transistors: review of major milestones and challenges","authors":"Keshari Nandan, Amit Agarwal, Somnath Bhowmick, Yogesh S. Chauhan","doi":"10.3389/felec.2023.1277927","DOIUrl":"https://doi.org/10.3389/felec.2023.1277927","url":null,"abstract":"Two-dimensional (2-D) semiconductors are emerging as strong contenders for the future of Angstrom technology nodes. Their potential lies in enhanced device scaling and energy-efficient switching compared to traditional bulk semiconductors like Si, Ge, and III-V compounds. These materials offer significant advantages, particularly in ultra-thin devices with atomic scale thicknesses. Their unique structures enable the creation of one-dimensional nanoribbons and vertical and lateral heterostructures. This versatility in design, coupled with their distinctive properties, paves the way for efficient energy switching in electronic devices. Moreover, 2-D semiconductors offer opportunities for integrating metallic nanoribbons, carbon nanotubes (CNT), and graphene with their 2-D channel materials. This integration helps overcome lithography limitations for gate patterning, allowing the realization of ultra-short gate dimensions. Considering these factors, the potential of 2-D semiconductors in electronics is vast. This concise review focuses on the latest advancements and engineering strategies in 2-D logic devices.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-11-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135430396","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-10-13DOI: 10.3389/felec.2023.1178703
Wei Wang, Zhenya Ji, Haimeng Wu, Z. Jaffery, Yipeng Wu, Ming Xue, Linlin Tan
{"title":"Editorial: Re-electrification technology and application of the energy consumption terminal","authors":"Wei Wang, Zhenya Ji, Haimeng Wu, Z. Jaffery, Yipeng Wu, Ming Xue, Linlin Tan","doi":"10.3389/felec.2023.1178703","DOIUrl":"https://doi.org/10.3389/felec.2023.1178703","url":null,"abstract":"","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-10-13","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"139319584","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-09-12DOI: 10.3389/felec.2023.1250655
Sofia Drakopoulou, Francesc Varkevisser, Linta Sohail, Masoumeh Aqamolaei, Tiago L. Costa, George D. Spyropoulos
Responsive neuromodulation is increasingly being used to treat patients with neuropsychiatric diseases. Yet, inefficient bridges between traditional and new materials and technological innovations impede advancements in neurostimulation tools. Signaling in the brain is accomplished predominantly by ion flux rather than the movement of electrons. However, the status quo for the acquisition of neural signals is using materials, such as noble metals, that can only interact with electrons. As a result, ions accumulate at the biotic/abiotic interface, creating a double-layer capacitance that increases impedance and negatively impacts the efficiency of neural interrogation. Alternative materials, such as conducting polymers, allow ion penetration in the matrix, creating a volumetric capacitor (two orders of magnitude larger than an area-dependent capacitor) that lowers the impedance and increases the spatiotemporal resolution of the recording/stimulation. On the other hand, the increased development and integration capabilities of CMOS-based back-end electronics have enabled the creation of increasingly powerful and energy-efficient microchips. These include stimulation and recording systems-on-a-chip (SoCs) with up to tens of thousands of channels, fully integrated circuitry for stimulation, signal conditioning, digitation, wireless power and data telemetry, and on-chip signal processing. Here, we aim to compile information on the best component for each building block and try to strengthen the vision that bridges the gap among various materials and technologies in an effort to advance neurostimulation tools and promote a solution-centric way of considering their complex problems.
{"title":"Hybrid neuroelectronics: towards a solution-centric way of thinking about complex problems in neurostimulation tools","authors":"Sofia Drakopoulou, Francesc Varkevisser, Linta Sohail, Masoumeh Aqamolaei, Tiago L. Costa, George D. Spyropoulos","doi":"10.3389/felec.2023.1250655","DOIUrl":"https://doi.org/10.3389/felec.2023.1250655","url":null,"abstract":"Responsive neuromodulation is increasingly being used to treat patients with neuropsychiatric diseases. Yet, inefficient bridges between traditional and new materials and technological innovations impede advancements in neurostimulation tools. Signaling in the brain is accomplished predominantly by ion flux rather than the movement of electrons. However, the status quo for the acquisition of neural signals is using materials, such as noble metals, that can only interact with electrons. As a result, ions accumulate at the biotic/abiotic interface, creating a double-layer capacitance that increases impedance and negatively impacts the efficiency of neural interrogation. Alternative materials, such as conducting polymers, allow ion penetration in the matrix, creating a volumetric capacitor (two orders of magnitude larger than an area-dependent capacitor) that lowers the impedance and increases the spatiotemporal resolution of the recording/stimulation. On the other hand, the increased development and integration capabilities of CMOS-based back-end electronics have enabled the creation of increasingly powerful and energy-efficient microchips. These include stimulation and recording systems-on-a-chip (SoCs) with up to tens of thousands of channels, fully integrated circuitry for stimulation, signal conditioning, digitation, wireless power and data telemetry, and on-chip signal processing. Here, we aim to compile information on the best component for each building block and try to strengthen the vision that bridges the gap among various materials and technologies in an effort to advance neurostimulation tools and promote a solution-centric way of considering their complex problems.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-09-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"135885543","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-09-08DOI: 10.3389/felec.2023.1250099
Yonglu Liu, Yiqi Zuo, Liang Yuan
Aiming to handle the inherent double-line frequency ripple power in single-phase power systems, a lot of active power decoupling (APD) topologies have been developed. In this paper, a general method is introduced to synthesize APD topologies. The main construction idea is to insert a rectifier/inverter into asymmetrical H-bridge circuits (AHCs) or replace the switch/diode in the AHCs with a rectifier/inverter. This approach not only reveals the formation process of existing APD topologies but also deduces new APD topologies. Finally, an experimental case study has been carried out to illustrate the feasibility and effectiveness of the proposed topology synthesis method.
{"title":"Topology synthesis of integrated active power decoupling converters using asymmetrical H-bridge circuits","authors":"Yonglu Liu, Yiqi Zuo, Liang Yuan","doi":"10.3389/felec.2023.1250099","DOIUrl":"https://doi.org/10.3389/felec.2023.1250099","url":null,"abstract":"Aiming to handle the inherent double-line frequency ripple power in single-phase power systems, a lot of active power decoupling (APD) topologies have been developed. In this paper, a general method is introduced to synthesize APD topologies. The main construction idea is to insert a rectifier/inverter into asymmetrical H-bridge circuits (AHCs) or replace the switch/diode in the AHCs with a rectifier/inverter. This approach not only reveals the formation process of existing APD topologies but also deduces new APD topologies. Finally, an experimental case study has been carried out to illustrate the feasibility and effectiveness of the proposed topology synthesis method.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-09-08","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45243590","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The charging modules of Electric vehicles (EVs) always run in a complex and variable state. As the weakness in the reliable operation of charging modules, the accurate lifetime prediction of aluminum electrolytic capacitors (Al-caps) is important for the later maintenance and reliability design. The hotspot temperature calculation method and lifetime model limit the accuracy of aluminum electrolytic capacitors lifetime prediction methods, which cannot meet the increasing requirements for reliability. In order to solve the problems above, this paper has proposed a hotspot temperature calculation method based on the ripple current with frequency characteristics and the cooling conditions on the heat generation and thermal conductivity of the capacitors. Furthermore, the lifetime model under reference voltage has been constructed with 3D surface fitting toolbox, which describes the trends of capacitor lifetime with ambient temperature and hotspot temperature under the constant voltage condition. Considering the variation of voltage, the multiple lifetime model of capacitor is established with a voltage correction coefficient. With the proposed method, it can be realized about the real-time lifetime prediction of capacitors under multiple operating profiles such as ripple current, thermal dissipation conditions, ambient temperature and operating voltage. Finally, the effectiveness of the proposed method is verified with the annual profiles of a 30 kW EV charging module.
{"title":"Lifetime prediction and reliability analysis for aluminum electrolytic capacitors in EV charging module based on mission profiles","authors":"Hongpeng Liu, Jiahui Qiu, Wei Zhang, Mengyuan Zhang, Z. Dou, Liangliang Chen","doi":"10.3389/felec.2023.1226006","DOIUrl":"https://doi.org/10.3389/felec.2023.1226006","url":null,"abstract":"The charging modules of Electric vehicles (EVs) always run in a complex and variable state. As the weakness in the reliable operation of charging modules, the accurate lifetime prediction of aluminum electrolytic capacitors (Al-caps) is important for the later maintenance and reliability design. The hotspot temperature calculation method and lifetime model limit the accuracy of aluminum electrolytic capacitors lifetime prediction methods, which cannot meet the increasing requirements for reliability. In order to solve the problems above, this paper has proposed a hotspot temperature calculation method based on the ripple current with frequency characteristics and the cooling conditions on the heat generation and thermal conductivity of the capacitors. Furthermore, the lifetime model under reference voltage has been constructed with 3D surface fitting toolbox, which describes the trends of capacitor lifetime with ambient temperature and hotspot temperature under the constant voltage condition. Considering the variation of voltage, the multiple lifetime model of capacitor is established with a voltage correction coefficient. With the proposed method, it can be realized about the real-time lifetime prediction of capacitors under multiple operating profiles such as ripple current, thermal dissipation conditions, ambient temperature and operating voltage. Finally, the effectiveness of the proposed method is verified with the annual profiles of a 30 kW EV charging module.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-08-16","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47333068","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-08-10DOI: 10.3389/felec.2023.1144383
A. Jalilian, D. Robinson
The power swing characteristic of transmission lines (TLs) can be affected by the large-scale integration of inverter-based resources (IBRs), resulting in the maloperation of the legacy power swing blocking (PSB) and out-of-step tripping (OST) functions. This paper presents a brief review of power swing phenomena and the impact on power swing protection functions. In this regard, the impact of IBR integration of type-III, and type-IV wind turbine generation (WTG) on legacy power swing protection functions has been scrutinized. To do so, the performance of impedance-based PSB and OST functions during the IBR integration has been investigated via comprehensive simulation studies. The results show that under a system contingency and high IBR penetration, depending on the IBR technology, the system experiences frequency oscillations and swinging impedance trajectories which are different from those from synchronous generators, such that the reliable operation of the legacy PSB and OST functions can be jeopardized. Moreover, during power swing phenomena, the simulation results have found that the security of distance protection cannot be guaranteed and the fault ride-through requirements cannot be maintained when a high share of IBRs have been integrated.
{"title":"Impact of inverter-based resources on transmission line relaying -part II: power swing protection","authors":"A. Jalilian, D. Robinson","doi":"10.3389/felec.2023.1144383","DOIUrl":"https://doi.org/10.3389/felec.2023.1144383","url":null,"abstract":"The power swing characteristic of transmission lines (TLs) can be affected by the large-scale integration of inverter-based resources (IBRs), resulting in the maloperation of the legacy power swing blocking (PSB) and out-of-step tripping (OST) functions. This paper presents a brief review of power swing phenomena and the impact on power swing protection functions. In this regard, the impact of IBR integration of type-III, and type-IV wind turbine generation (WTG) on legacy power swing protection functions has been scrutinized. To do so, the performance of impedance-based PSB and OST functions during the IBR integration has been investigated via comprehensive simulation studies. The results show that under a system contingency and high IBR penetration, depending on the IBR technology, the system experiences frequency oscillations and swinging impedance trajectories which are different from those from synchronous generators, such that the reliable operation of the legacy PSB and OST functions can be jeopardized. Moreover, during power swing phenomena, the simulation results have found that the security of distance protection cannot be guaranteed and the fault ride-through requirements cannot be maintained when a high share of IBRs have been integrated.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-08-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46666680","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-07-18DOI: 10.3389/felec.2023.1173607
Delwar Hossain, Tonmoy Ghosh, Masudul Haider Imtiaz, E. Sazonov
Introduction: This paper presents a novel Ear Canal Pressure Sensor (ECPS) for objective detection of food intake, chew counting, and food image capture in both controlled and free-living conditions. The contribution of this study is threefold: 1) Development and validation of a novel wearable sensor that uses changes in ear canal pressure and the device’s acceleration as an indicator of food intake, 2) A method to identify chewing segments and count the number of chews in each eating episode, and 3) Facilitation of egocentric image capture only during eating by triggering camera from sensor detection thus reducing power consumption, privacy concerns, as well as storage and computational cost.Methods: To validate the device, data were collected from 10 volunteers in a controlled environment and three volunteers in a free-living environment. During the controlled activities, each participant wore the device for approximately 1 h, and during the free living for approximately 12 h. The food intake of the participants was not restricted in any way in both part of the experiment. Subject-independent Support Vector Machine classifiers were trained to identify periods of food intake from the features of both the pressure sensor and accelerometer, and features only from the pressure sensor.Results: Results from leave-one-out cross-validation showed an average 5 sec-epoch classification F-score of 87.6% using only pressure sensor features and 88.6% using features from both pressure sensor and accelerometer in the controlled environment. For the free-living environment, both classifiers accurately detected all eating episodes. The wearable sensor achieves 95.5% accuracy in counting the number of chews with respect to manual annotation from the videos of the eating episodes using a pressure sensor classifier in the controlled environment.Discussion: The manual review of the images found that only 3.7% of captured images belonged to the detected eating episodes, suggesting that sensor-triggered camera capture may facilitate reducing the number of captured images and power consumption of the sensor.
{"title":"Ear canal pressure sensor for food intake detection","authors":"Delwar Hossain, Tonmoy Ghosh, Masudul Haider Imtiaz, E. Sazonov","doi":"10.3389/felec.2023.1173607","DOIUrl":"https://doi.org/10.3389/felec.2023.1173607","url":null,"abstract":"Introduction: This paper presents a novel Ear Canal Pressure Sensor (ECPS) for objective detection of food intake, chew counting, and food image capture in both controlled and free-living conditions. The contribution of this study is threefold: 1) Development and validation of a novel wearable sensor that uses changes in ear canal pressure and the device’s acceleration as an indicator of food intake, 2) A method to identify chewing segments and count the number of chews in each eating episode, and 3) Facilitation of egocentric image capture only during eating by triggering camera from sensor detection thus reducing power consumption, privacy concerns, as well as storage and computational cost.Methods: To validate the device, data were collected from 10 volunteers in a controlled environment and three volunteers in a free-living environment. During the controlled activities, each participant wore the device for approximately 1 h, and during the free living for approximately 12 h. The food intake of the participants was not restricted in any way in both part of the experiment. Subject-independent Support Vector Machine classifiers were trained to identify periods of food intake from the features of both the pressure sensor and accelerometer, and features only from the pressure sensor.Results: Results from leave-one-out cross-validation showed an average 5 sec-epoch classification F-score of 87.6% using only pressure sensor features and 88.6% using features from both pressure sensor and accelerometer in the controlled environment. For the free-living environment, both classifiers accurately detected all eating episodes. The wearable sensor achieves 95.5% accuracy in counting the number of chews with respect to manual annotation from the videos of the eating episodes using a pressure sensor classifier in the controlled environment.Discussion: The manual review of the images found that only 3.7% of captured images belonged to the detected eating episodes, suggesting that sensor-triggered camera capture may facilitate reducing the number of captured images and power consumption of the sensor.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-07-18","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42364188","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-04-17DOI: 10.3389/felec.2023.1129675
Yuyi Liu, B. Gao, Peng Yao, Qi Liu, Qingtian Zhang, Dong Wu, Jianshi Tang, H. Qian, Huaqiang Wu
Analog resistive random-access memory (RRAM)-based computation-in-memory (CIM) technology is promising for constructing artificial intelligence (AI) with high energy efficiency and excellent scalability. However, the large overhead of analog-to-digital converters (ADCs) is a key limitation. In this work, we propose a novel LINKAGE architecture that eliminates PE-level ADCs and leverages an analog data transfer module to implement inter-array data processing. A blockwise dataflow is further proposed to accelerate convolutional neural networks (CNNs) to speed up compute-intensive layers and solve the unbalanced pipeline problem. To obtain accurate and reliable benchmark results, key component modules, such as straightforward link (SFL) modules and Tile-level ADCs, are designed in standard 28 nm CMOS technology. The evaluation shows that LINKAGE outperforms the conventional ADC/DAC-based architecture with a 2.07×∼11.22× improvement in throughput, 2.45×∼7.00× in energy efficiency, and 22%–51% reduction in the area overhead while maintaining accuracy. Our LINKAGE architecture can achieve 22.9∼24.4 TOPS/W energy efficiency (4b-IN/4b-W) and 1.82 ∼4.53 TOPS throughput with the blockwise method. This work demonstrates a new method for significantly improving the energy efficiency of CIM chips, which can be applied to general CNNs/FCNNs.
{"title":"Straightforward data transfer in a blockwise dataflow for an analog RRAM-based CIM system","authors":"Yuyi Liu, B. Gao, Peng Yao, Qi Liu, Qingtian Zhang, Dong Wu, Jianshi Tang, H. Qian, Huaqiang Wu","doi":"10.3389/felec.2023.1129675","DOIUrl":"https://doi.org/10.3389/felec.2023.1129675","url":null,"abstract":"Analog resistive random-access memory (RRAM)-based computation-in-memory (CIM) technology is promising for constructing artificial intelligence (AI) with high energy efficiency and excellent scalability. However, the large overhead of analog-to-digital converters (ADCs) is a key limitation. In this work, we propose a novel LINKAGE architecture that eliminates PE-level ADCs and leverages an analog data transfer module to implement inter-array data processing. A blockwise dataflow is further proposed to accelerate convolutional neural networks (CNNs) to speed up compute-intensive layers and solve the unbalanced pipeline problem. To obtain accurate and reliable benchmark results, key component modules, such as straightforward link (SFL) modules and Tile-level ADCs, are designed in standard 28 nm CMOS technology. The evaluation shows that LINKAGE outperforms the conventional ADC/DAC-based architecture with a 2.07×∼11.22× improvement in throughput, 2.45×∼7.00× in energy efficiency, and 22%–51% reduction in the area overhead while maintaining accuracy. Our LINKAGE architecture can achieve 22.9∼24.4 TOPS/W energy efficiency (4b-IN/4b-W) and 1.82 ∼4.53 TOPS throughput with the blockwise method. This work demonstrates a new method for significantly improving the energy efficiency of CIM chips, which can be applied to general CNNs/FCNNs.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-04-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"49576812","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-17DOI: 10.3389/felec.2023.968549
Chenchen Li, Kaiyuan Wang, Y. Mao
This paper presents a general circuit and control design method for wireless power transfer (WPT) systems in DC microgrids to achieve optimal power transfer efficiency, while maintain accurate output voltage regulation. An auxiliary inductor is added at the transmitter resonator to form a current sink to ensure zero voltage switching (ZVS) of the primary-side full-bridge inverter with even extreme-light load conditions. Besides, an adaptive proportional-integral (PI) controller is adopted to track the output voltage references by regulating the phase shift angle of the phase shift control for the full-bridge inverter. The coefficients of the adaptive proportional-integral controller are determined by the inductor of the auxiliary inductor. Both simulation and experimental results have validated the effectiveness of the proposed circuit and control design in achieving optimal efficiency and output voltage regulation for wireless power transfer systems in DC microgrids with source and load variations.
{"title":"Design of a wireless charging system in DC microgrids with accurate output regulation and optimal efficiency","authors":"Chenchen Li, Kaiyuan Wang, Y. Mao","doi":"10.3389/felec.2023.968549","DOIUrl":"https://doi.org/10.3389/felec.2023.968549","url":null,"abstract":"This paper presents a general circuit and control design method for wireless power transfer (WPT) systems in DC microgrids to achieve optimal power transfer efficiency, while maintain accurate output voltage regulation. An auxiliary inductor is added at the transmitter resonator to form a current sink to ensure zero voltage switching (ZVS) of the primary-side full-bridge inverter with even extreme-light load conditions. Besides, an adaptive proportional-integral (PI) controller is adopted to track the output voltage references by regulating the phase shift angle of the phase shift control for the full-bridge inverter. The coefficients of the adaptive proportional-integral controller are determined by the inductor of the auxiliary inductor. Both simulation and experimental results have validated the effectiveness of the proposed circuit and control design in achieving optimal efficiency and output voltage regulation for wireless power transfer systems in DC microgrids with source and load variations.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-17","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47750702","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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