Pub Date : 2022-06-27DOI: 10.3389/felec.2022.910968
Jaro De Roose, M. Andraud, M. Verhelst
The constant miniaturization of IoT sensor nodes requires a continuous reduction in battery sizes, leading to more stringent needs in terms of low-power operation. Over the past decades, an extremely large variety of techniques have been introduced to enable such reductions in power consumption. Many involve some form of offline reconfigurability (OfC), i.e., the ability to configure the node before deployment, or online adaptivity (OnA), i.e., the ability to also reconfigure the node during run time. Yet, the inherent design trade-offs usually lead to ad hoc OnA and OfC, which prevent assessing the varying benefits and costs each approach implies before investing in implementation on a specific node. To solve this issue, in this work, we propose a generic predictive assessment methodology that enables us to evaluate OfC and OnA globally, prior to any design. Practically, the methodology is based on optimization mathematics, to quickly and efficiently evaluate the potential benefits and costs from OnA relative to OfC. This generic methodology can, thus, determine which type of solution will consume the least amount of power, given a specific application scenario, before implementation. We applied the methodology to three adaptive IoT system studies, to demonstrate the ability of the introduced methodology, bring insights into the adaptivity mechanics, and quickly optimize the OfC–OnA adaptivity, even under scenarios with many adaptivity variables.
{"title":"A Procedural Method to Predictively Assess Power-Quality Trade-Offs of Circuit-Level Adaptivity in IoT Systems","authors":"Jaro De Roose, M. Andraud, M. Verhelst","doi":"10.3389/felec.2022.910968","DOIUrl":"https://doi.org/10.3389/felec.2022.910968","url":null,"abstract":"The constant miniaturization of IoT sensor nodes requires a continuous reduction in battery sizes, leading to more stringent needs in terms of low-power operation. Over the past decades, an extremely large variety of techniques have been introduced to enable such reductions in power consumption. Many involve some form of offline reconfigurability (OfC), i.e., the ability to configure the node before deployment, or online adaptivity (OnA), i.e., the ability to also reconfigure the node during run time. Yet, the inherent design trade-offs usually lead to ad hoc OnA and OfC, which prevent assessing the varying benefits and costs each approach implies before investing in implementation on a specific node. To solve this issue, in this work, we propose a generic predictive assessment methodology that enables us to evaluate OfC and OnA globally, prior to any design. Practically, the methodology is based on optimization mathematics, to quickly and efficiently evaluate the potential benefits and costs from OnA relative to OfC. This generic methodology can, thus, determine which type of solution will consume the least amount of power, given a specific application scenario, before implementation. We applied the methodology to three adaptive IoT system studies, to demonstrate the ability of the introduced methodology, bring insights into the adaptivity mechanics, and quickly optimize the OfC–OnA adaptivity, even under scenarios with many adaptivity variables.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-06-27","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47195458","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-15DOI: 10.3389/felec.2022.935289
Y. Wu, Shiwei Wang, B. Shen, Hubin Zhao, Haichang Lu, Shuo Gao
Department of Electronic and Electrical Engineering, University College London, London, United Kingdom, School of Engineering, The University of Edinburgh, Edinburgh, United Kingdom, Electrical Engineering Division, Department of Engineering, University of Cambridge, Cambridge, United Kingdom, HUB of Intelligent Neuro-engineering, CREATe, Faculty of Medical Sciences, University College London, London, United Kingdom, School of Integrated Circuit Science and Engineering Beihang University, Beijing, China, School of Instrumentation and Optoelectronic Engineering, Beihang University, Beijing, China
{"title":"Editorial: Wearable and Implantable Electronics for the next Generation of Human-Machine Interactive Devices","authors":"Y. Wu, Shiwei Wang, B. Shen, Hubin Zhao, Haichang Lu, Shuo Gao","doi":"10.3389/felec.2022.935289","DOIUrl":"https://doi.org/10.3389/felec.2022.935289","url":null,"abstract":"Department of Electronic and Electrical Engineering, University College London, London, United Kingdom, School of Engineering, The University of Edinburgh, Edinburgh, United Kingdom, Electrical Engineering Division, Department of Engineering, University of Cambridge, Cambridge, United Kingdom, HUB of Intelligent Neuro-engineering, CREATe, Faculty of Medical Sciences, University College London, London, United Kingdom, School of Integrated Circuit Science and Engineering Beihang University, Beijing, China, School of Instrumentation and Optoelectronic Engineering, Beihang University, Beijing, China","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-06-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"42434087","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-06-06DOI: 10.3389/felec.2022.866527
S. Yong, N. Hillier, S. Beeby
Zinc-ion batteries (ZIB), with various manganese oxide-based cathodes, provide a promising solution for textile-based flexible energy storage devices. This paper demonstrates, for the first time, a flexible aqueous ZIB with manganese-based cathode fabricated in a single woven polyester cotton textile. The textile was functionalized with a flexible polymer membrane layer that fills the gaps between textile yarns, enabling fine control over the depth of penetration of the spray deposited manganese oxide cathode and zinc anode. This leaves an uncoated region in the textile-polymer network that acts as the battery’s separator. The textile battery cell was vacuum impregnated with the aqueous electrolyte, achieving good wettability of the electrodes with the electrolyte. Additionally, the choice of cathodic material and its influence over the electrochemical performance of the zinc ion battery was investigated with commercially available Manganese (IV) oxide and Manganese (II, III) oxide. The textile ZIB with Manganese (II, III) oxide cathode (10.9 mAh g−1 or 35.6 µA h.cm−2) achieved better performance than the textile ZIB with Manganese (IV) oxide (8.95 mAh g−1 or 24.2 µAh cm−2) at 1 mA cm−2 (0.3 A g−1). This work presents a novel all-textile battery architecture and demonstrates the capability of using manganese oxides as cathodes for a full textile-based flexible aqueous ZIB.
锌离子电池（ZIB）具有各种基于氧化锰的阴极，为基于纺织品的柔性储能设备提供了一种有前途的解决方案。本文首次展示了在涤纶-棉织物中制备的具有锰基阴极的柔性水性ZIB。织物用填充织物纱线之间间隙的柔性聚合物膜层进行功能化，从而能够精细控制喷涂沉积的氧化锰阴极和锌阳极的渗透深度。这在纺织聚合物网络中留下了一个未涂覆的区域，该区域充当电池的隔板。用含水电解质对织物电池进行真空浸渍，实现了电极与电解质的良好润湿性。此外，用市售的氧化锰（IV）和氧化锰（II，III）研究了阴极材料的选择及其对锌离子电池电化学性能的影响。在1 mA cm−2（0.3 A g−1）下，具有氧化锰（II，III）阴极（10.9 mAh g−1或35.6µA h.cm−2）的织物ZIB比具有氧化锰。这项工作提出了一种新型的全织物电池结构，并证明了使用锰氧化物作为全织物基柔性水性ZIB阴极的能力。
{"title":"Fabrication of a Flexible Aqueous Textile Zinc-Ion Battery in a Single Fabric Layer","authors":"S. Yong, N. Hillier, S. Beeby","doi":"10.3389/felec.2022.866527","DOIUrl":"https://doi.org/10.3389/felec.2022.866527","url":null,"abstract":"Zinc-ion batteries (ZIB), with various manganese oxide-based cathodes, provide a promising solution for textile-based flexible energy storage devices. This paper demonstrates, for the first time, a flexible aqueous ZIB with manganese-based cathode fabricated in a single woven polyester cotton textile. The textile was functionalized with a flexible polymer membrane layer that fills the gaps between textile yarns, enabling fine control over the depth of penetration of the spray deposited manganese oxide cathode and zinc anode. This leaves an uncoated region in the textile-polymer network that acts as the battery’s separator. The textile battery cell was vacuum impregnated with the aqueous electrolyte, achieving good wettability of the electrodes with the electrolyte. Additionally, the choice of cathodic material and its influence over the electrochemical performance of the zinc ion battery was investigated with commercially available Manganese (IV) oxide and Manganese (II, III) oxide. The textile ZIB with Manganese (II, III) oxide cathode (10.9 mAh g−1 or 35.6 µA h.cm−2) achieved better performance than the textile ZIB with Manganese (IV) oxide (8.95 mAh g−1 or 24.2 µAh cm−2) at 1 mA cm−2 (0.3 A g−1). This work presents a novel all-textile battery architecture and demonstrates the capability of using manganese oxides as cathodes for a full textile-based flexible aqueous ZIB.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-06-06","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"43764148","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-05-10DOI: 10.3389/felec.2022.797525
B. G. Pedro, P. Bertemes-Filho
The chaotic behaviour of a system depends on the parameter values, and when the system exhibits such a chaotic behaviour, it is sensitive to the initial conditions. This feature can be used for manufacturing high sensitivity sensors. Sensors based on chaotic circuits have already been used for measuring water salinity, inductive effects, and both noise and weak signals. This article investigates an impedance sensor based on the van der Pol and Duffing damped oscillators. The calibration process is a key point and therefore the folding behaviour of signal periods was also explored. A sensitivity of 0.15 kΩ/Period was estimated over a range from 89.5 to 91.6 kΩ. This range can be adjusted according to the application by varying the gain of the operational amplifier used in this implementation. The development of this type of sensor might be used in medical and biological engineering for skin impedance measurements, for example. This type of chaotic impedance sensor has the advantage of sensing small disturbances and then rapidly detecting small impedance changes within biological materials.
{"title":"A New Impedance Sensor Based on Electronically Implemented Chaotic Coupled van der Pol and Damped Duffing Oscillators","authors":"B. G. Pedro, P. Bertemes-Filho","doi":"10.3389/felec.2022.797525","DOIUrl":"https://doi.org/10.3389/felec.2022.797525","url":null,"abstract":"The chaotic behaviour of a system depends on the parameter values, and when the system exhibits such a chaotic behaviour, it is sensitive to the initial conditions. This feature can be used for manufacturing high sensitivity sensors. Sensors based on chaotic circuits have already been used for measuring water salinity, inductive effects, and both noise and weak signals. This article investigates an impedance sensor based on the van der Pol and Duffing damped oscillators. The calibration process is a key point and therefore the folding behaviour of signal periods was also explored. A sensitivity of 0.15 kΩ/Period was estimated over a range from 89.5 to 91.6 kΩ. This range can be adjusted according to the application by varying the gain of the operational amplifier used in this implementation. The development of this type of sensor might be used in medical and biological engineering for skin impedance measurements, for example. This type of chaotic impedance sensor has the advantage of sensing small disturbances and then rapidly detecting small impedance changes within biological materials.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-05-10","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"48654875","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-04-29DOI: 10.3389/felec.2022.895001
Yuhao Chen, Yue Luo, Boyi Hu
Among all healthcare sectors and working processes, the janitorial section is a prominent source of work-related injuries due to its labor-intensive nature and rising need for a hygienic environment, thus requiring extra attention for prevention strategies. Advancement in robotic technology has allowed autonomous cleaning robots to be a viable solution to ease the burden of janitors. To evaluate the application of commercial-grade cleaning robots, a video-based survey was developed and distributed to participants. Results from 117 participants revealed that: 1) participants were less tolerant when their personal space was invaded by humans compared with the cleaning robot, 2) it is better to inform the surrounding humans that the cleaning robot has been sanitized to make them feel safe and comfortable during the pandemic, and 3) to make the interaction more socially acceptable, the cleaning robot should respect human personal space, especially when there is ample space to maneuver. The findings of the present study provide insight into the usage and Proxemic behaviors design of future cleaning robots.
{"title":"Towards Next Generation Cleaning Tools: Factors Affecting Cleaning Robot Usage and Proxemic Behaviors Design","authors":"Yuhao Chen, Yue Luo, Boyi Hu","doi":"10.3389/felec.2022.895001","DOIUrl":"https://doi.org/10.3389/felec.2022.895001","url":null,"abstract":"Among all healthcare sectors and working processes, the janitorial section is a prominent source of work-related injuries due to its labor-intensive nature and rising need for a hygienic environment, thus requiring extra attention for prevention strategies. Advancement in robotic technology has allowed autonomous cleaning robots to be a viable solution to ease the burden of janitors. To evaluate the application of commercial-grade cleaning robots, a video-based survey was developed and distributed to participants. Results from 117 participants revealed that: 1) participants were less tolerant when their personal space was invaded by humans compared with the cleaning robot, 2) it is better to inform the surrounding humans that the cleaning robot has been sanitized to make them feel safe and comfortable during the pandemic, and 3) to make the interaction more socially acceptable, the cleaning robot should respect human personal space, especially when there is ample space to maneuver. The findings of the present study provide insight into the usage and Proxemic behaviors design of future cleaning robots.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-04-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"46172427","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-04-26DOI: 10.3389/felec.2022.872163
Austin Shallcross, K. Mahalingam, E. Shin, G. Subramanyam, Md. Shahanur Alam, Tarek Taha, S. Ganguli, Cynthia T. Bowers, Benson Athey, A. Hilton, Anisha Roy, R. Dhall
Memristor devices fabricated using the chalcogenide Ge2Te3 phase change thin films in a metal-insulator-metal structure are characterized using thermal and electrical stimuli in this study. Once the thermal and electrical stimuli are applied, cross-sectional transmission electron microscopy (TEM) and X-ray energy-dispersive spectroscopy (XEDS) analyses are performed to determine structural and compositional changes in the devices. Electrical measurements on these devices showed a need for increasing compliance current between cycles to initiate switching from low resistance state (LRS) to high resistance state (HRS). The measured resistance in HRS also exhibited a steady decrease with increase in the compliance current. High resolution TEM studies on devices in HRS showed the presence of residual crystalline phase at the top-electrode/dielectric interface, which may explain the observed dependence on compliance current. XEDS study revealed diffusion related processes at dielectric-electrode interface characterized, by the separation of Ge2Te3 into Ge- and Te- enriched interfacial layers. This was also accompanied by spikes in O level at these regions. Furthermore, in-situ heating experiments on as-grown thin films revealed a deleterious effect of Ti adhesive layer, wherein the in-diffusion of Ti leads to further degradation of the dielectric layer. This experimental physics-based study shows that the large HRS/LRS ratio below the current compliance limit of 1 mA and the ability to control the HRS and LRS by varying the compliance current are attractive for memristor and neuromorphic computing applications.
{"title":"Transmission Electron Microscopy Study on the Effect of Thermal and Electrical Stimuli on Ge2Te3 Based Memristor Devices","authors":"Austin Shallcross, K. Mahalingam, E. Shin, G. Subramanyam, Md. Shahanur Alam, Tarek Taha, S. Ganguli, Cynthia T. Bowers, Benson Athey, A. Hilton, Anisha Roy, R. Dhall","doi":"10.3389/felec.2022.872163","DOIUrl":"https://doi.org/10.3389/felec.2022.872163","url":null,"abstract":"Memristor devices fabricated using the chalcogenide Ge2Te3 phase change thin films in a metal-insulator-metal structure are characterized using thermal and electrical stimuli in this study. Once the thermal and electrical stimuli are applied, cross-sectional transmission electron microscopy (TEM) and X-ray energy-dispersive spectroscopy (XEDS) analyses are performed to determine structural and compositional changes in the devices. Electrical measurements on these devices showed a need for increasing compliance current between cycles to initiate switching from low resistance state (LRS) to high resistance state (HRS). The measured resistance in HRS also exhibited a steady decrease with increase in the compliance current. High resolution TEM studies on devices in HRS showed the presence of residual crystalline phase at the top-electrode/dielectric interface, which may explain the observed dependence on compliance current. XEDS study revealed diffusion related processes at dielectric-electrode interface characterized, by the separation of Ge2Te3 into Ge- and Te- enriched interfacial layers. This was also accompanied by spikes in O level at these regions. Furthermore, in-situ heating experiments on as-grown thin films revealed a deleterious effect of Ti adhesive layer, wherein the in-diffusion of Ti leads to further degradation of the dielectric layer. This experimental physics-based study shows that the large HRS/LRS ratio below the current compliance limit of 1 mA and the ability to control the HRS and LRS by varying the compliance current are attractive for memristor and neuromorphic computing applications.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-04-26","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45332972","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-04-25DOI: 10.3389/felec.2022.856284
Md Faizul Bari , Parv Agrawal , Baibhab Chatterjee , Shreyas Sen
Due to the diverse and mobile nature of the deployment environment, smart commodity devices are vulnerable to various spoofing attacks which can allow a rogue device to get access to a large network. The vulnerability of the traditional digital signature-based authentication system lies in the fact that it uses only a key/pin, ignoring the device fingerprint. To circumvent the inherent weakness of the traditional system, various physical signature-based RF fingerprinting methods have been proposed in literature and RF-PUF is a promising choice among them. RF-PUF utilizes the inherent nonidealities of the traditional RF communication system as features at the receiver to uniquely identify a transmitter. It is resilient to key-hacking methods due to the absence of secret key requirements and does not require any additional circuitry on the transmitter end (no additional power, area, and computational burden). However, the concept of RF-PUF was proposed using MATLAB-generated data, which cannot ensure the presence of device entropy mapped to the system-level nonidealities. Hence, an experimental validation using commercial devices is necessary to prove its efficacy. In this work, for the first time, we analyze the effectiveness of RF-PUF on commodity devices, purchased off-the-shelf, without any modifications whatsoever. We have collected data from 30 Xbee S2C modules used as transmitters and released as a public dataset. A new feature has been engineered through PCA and statistical property analysis. With a new and robust feature set, it has been shown that 95% accuracy can be achieved using only ∼1.8 ms of test data fed into a neural network of 10 neurons in 1 layer, reaching > 99.8% accuracy with a network of higher model capacity, for the first time in literature without any assisting digital preamble. The design space has been explored in detail and the effect of the wireless channel has been investigated. The performance of some popular machine learning algorithms has been tested and compared with the neural network approach. A thorough investigation of various PUF properties has been done. With extensive testing of 41238000 cases, the detection probability for RF-PUF for our data is found to be 0.9987, which, for the first time, experimentally establishes RF-PUF as a strong authentication method. Finally, the potential attack models and the robustness of RF-PUF against them have been discussed.
{"title":"Statistical Analysis Based Feature Selection Enhanced RF-PUF With > 99.8% Accuracy on Unmodified Commodity Transmitters for IoT Physical Security","authors":"Md Faizul Bari , Parv Agrawal , Baibhab Chatterjee , Shreyas Sen ","doi":"10.3389/felec.2022.856284","DOIUrl":"https://doi.org/10.3389/felec.2022.856284","url":null,"abstract":"Due to the diverse and mobile nature of the deployment environment, smart commodity devices are vulnerable to various spoofing attacks which can allow a rogue device to get access to a large network. The vulnerability of the traditional digital signature-based authentication system lies in the fact that it uses only a key/pin, ignoring the device fingerprint. To circumvent the inherent weakness of the traditional system, various physical signature-based RF fingerprinting methods have been proposed in literature and RF-PUF is a promising choice among them. RF-PUF utilizes the inherent nonidealities of the traditional RF communication system as features at the receiver to uniquely identify a transmitter. It is resilient to key-hacking methods due to the absence of secret key requirements and does not require any additional circuitry on the transmitter end (no additional power, area, and computational burden). However, the concept of RF-PUF was proposed using MATLAB-generated data, which cannot ensure the presence of device entropy mapped to the system-level nonidealities. Hence, an experimental validation using commercial devices is necessary to prove its efficacy. In this work, for the first time, we analyze the effectiveness of RF-PUF on commodity devices, purchased off-the-shelf, without any modifications whatsoever. We have collected data from 30 Xbee S2C modules used as transmitters and released as a public dataset. A new feature has been engineered through PCA and statistical property analysis. With a new and robust feature set, it has been shown that 95% accuracy can be achieved using only ∼1.8 ms of test data fed into a neural network of 10 neurons in 1 layer, reaching > 99.8% accuracy with a network of higher model capacity, for the first time in literature without any assisting digital preamble. The design space has been explored in detail and the effect of the wireless channel has been investigated. The performance of some popular machine learning algorithms has been tested and compared with the neural network approach. A thorough investigation of various PUF properties has been done. With extensive testing of 41238000 cases, the detection probability for RF-PUF for our data is found to be 0.9987, which, for the first time, experimentally establishes RF-PUF as a strong authentication method. Finally, the potential attack models and the robustness of RF-PUF against them have been discussed.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":"116 1","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"79179937","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-04-25DOI: 10.3389/felec.2022.792326
Dong-Hyun Seo, Baibhab Chatterjee, S. Scott, D. Valentino, D. Peroulis, Shreyas Sen
This article presents the design and analysis of a resistive sensor interface with three different designs of phase noise-energy-resolution scalability in time-based resistance-to-digital converters (RDCs), including test chip implementations and measurements, targeted toward either minimizing the energy/conversion step or maximizing bit-resolution. The implemented RDCs consist of a three-stage differential ring oscillator, which is current starved using the resistive sensor, a differential-to-single-ended amplifier, and digital modules and serial interface. The first RDC design (baseline) included the basic structure of time-based RDC and targeted low-energy/conversion step. The second RDC design (goal: higher-resolution) aimed to improve the rms jitter/phase noise of the oscillator with help of speed-up latches, to achieve high bit-resolution as compared to the first RDC design. The third RDC design (goal: process portability) reduced the power consumption by scaling the technology with the improved phase-noise design, achieving 1-bit better resolution as that of the second RDC design. Using time-based implementation, the RDCs exhibit energy-resolution scalability and consume a measured power of 861 nW with 18-bit resolution in design 1 in TSMC 0.35 μm technology (with 10 ms read-time, with one readout every second). Measurements of designs 2 and 3 demonstrate power consumption of 19.2 μW with 20-bit resolution using TSMC 0.35μm and 17.6 μW with 20-bit resolution using TSMC 0.18μm, respectively (both with 10 ms read-time, repeated every second). With 30 ms read-time, design 3 achieves 21-bit resolution, which is the highest resolution reported for a time-based ADC. The 0.35-μm time-based RDC is the lowest-power time-based ADC reported, while the 0.18-μm time-based RDC with speed-up latch offers the highest resolution. The active chip-area for all three designs is less than 1.1 mm2.
{"title":"Design and Analysis of a Resistive Sensor Interface With Phase Noise-Energy-Resolution Scalability for a Time-Based Resistance-to-Digital Converter","authors":"Dong-Hyun Seo, Baibhab Chatterjee, S. Scott, D. Valentino, D. Peroulis, Shreyas Sen","doi":"10.3389/felec.2022.792326","DOIUrl":"https://doi.org/10.3389/felec.2022.792326","url":null,"abstract":"This article presents the design and analysis of a resistive sensor interface with three different designs of phase noise-energy-resolution scalability in time-based resistance-to-digital converters (RDCs), including test chip implementations and measurements, targeted toward either minimizing the energy/conversion step or maximizing bit-resolution. The implemented RDCs consist of a three-stage differential ring oscillator, which is current starved using the resistive sensor, a differential-to-single-ended amplifier, and digital modules and serial interface. The first RDC design (baseline) included the basic structure of time-based RDC and targeted low-energy/conversion step. The second RDC design (goal: higher-resolution) aimed to improve the rms jitter/phase noise of the oscillator with help of speed-up latches, to achieve high bit-resolution as compared to the first RDC design. The third RDC design (goal: process portability) reduced the power consumption by scaling the technology with the improved phase-noise design, achieving 1-bit better resolution as that of the second RDC design. Using time-based implementation, the RDCs exhibit energy-resolution scalability and consume a measured power of 861 nW with 18-bit resolution in design 1 in TSMC 0.35 μm technology (with 10 ms read-time, with one readout every second). Measurements of designs 2 and 3 demonstrate power consumption of 19.2 μW with 20-bit resolution using TSMC 0.35μm and 17.6 μW with 20-bit resolution using TSMC 0.18μm, respectively (both with 10 ms read-time, repeated every second). With 30 ms read-time, design 3 achieves 21-bit resolution, which is the highest resolution reported for a time-based ADC. The 0.35-μm time-based RDC is the lowest-power time-based ADC reported, while the 0.18-μm time-based RDC with speed-up latch offers the highest resolution. The active chip-area for all three designs is less than 1.1 mm2.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-04-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"44153969","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-04-11DOI: 10.3389/felec.2022.847069
Ann Franchesca Laguna, Mohammed Mehdi Sharifi, A. Kazemi, Xunzhao Yin, M. Niemier, Sharon Hu, Jae-sun Seo
Transformer networks have outperformed recurrent and convolutional neural networks in terms of accuracy in various sequential tasks. However, memory and compute bottlenecks prevent transformer networks from scaling to long sequences due to their high execution time and energy consumption. Different neural attention mechanisms have been proposed to lower computational load but still suffer from the memory bandwidth bottleneck. In-memory processing can help alleviate memory bottlenecks by reducing the transfer overhead between the memory and compute units, thus allowing transformer networks to scale to longer sequences. We propose an in-memory transformer network accelerator (iMTransformer) that uses a combination of crossbars and content-addressable memories to accelerate transformer networks. We accelerate transformer networks by (1) computing in-memory, thus minimizing the memory transfer overhead, (2) caching reusable parameters to reduce the number of operations, and (3) exploiting the available parallelism in the attention mechanism computation. To reduce energy consumption, the following techniques are introduced: (1) a configurable attention selector is used to choose different sparse attention patterns, (2) a content-addressable memory aided locality sensitive hashing helps to filter the number of sequence elements by their importance, and (3) FeFET-based crossbars are used to store projection weights while CMOS-based crossbars are used as an attentional cache to store attention scores for later reuse. Using a CMOS-FeFET hybrid iMTransformer introduced a significant energy improvement compared to the CMOS-only iMTransformer. The CMOS-FeFET hybrid iMTransformer achieved an 8.96× delay improvement and 12.57× energy improvement for the Vanilla transformers compared to the GPU baseline at a sequence length of 512. Implementing BERT using CMOS-FeFET hybrid iMTransformer achieves 13.71× delay improvement and 8.95× delay improvement compared to the GPU baseline at sequence length of 512. The hybrid iMTransformer also achieves a throughput of 2.23 K samples/sec and 124.8 samples/s/W using the MLPerf benchmark using BERT-large and SQuAD 1.1 dataset, an 11× speedup and 7.92× energy improvement compared to the GPU baseline.
{"title":"Hardware-Software Co-Design of an In-Memory Transformer Network Accelerator","authors":"Ann Franchesca Laguna, Mohammed Mehdi Sharifi, A. Kazemi, Xunzhao Yin, M. Niemier, Sharon Hu, Jae-sun Seo","doi":"10.3389/felec.2022.847069","DOIUrl":"https://doi.org/10.3389/felec.2022.847069","url":null,"abstract":"Transformer networks have outperformed recurrent and convolutional neural networks in terms of accuracy in various sequential tasks. However, memory and compute bottlenecks prevent transformer networks from scaling to long sequences due to their high execution time and energy consumption. Different neural attention mechanisms have been proposed to lower computational load but still suffer from the memory bandwidth bottleneck. In-memory processing can help alleviate memory bottlenecks by reducing the transfer overhead between the memory and compute units, thus allowing transformer networks to scale to longer sequences. We propose an in-memory transformer network accelerator (iMTransformer) that uses a combination of crossbars and content-addressable memories to accelerate transformer networks. We accelerate transformer networks by (1) computing in-memory, thus minimizing the memory transfer overhead, (2) caching reusable parameters to reduce the number of operations, and (3) exploiting the available parallelism in the attention mechanism computation. To reduce energy consumption, the following techniques are introduced: (1) a configurable attention selector is used to choose different sparse attention patterns, (2) a content-addressable memory aided locality sensitive hashing helps to filter the number of sequence elements by their importance, and (3) FeFET-based crossbars are used to store projection weights while CMOS-based crossbars are used as an attentional cache to store attention scores for later reuse. Using a CMOS-FeFET hybrid iMTransformer introduced a significant energy improvement compared to the CMOS-only iMTransformer. The CMOS-FeFET hybrid iMTransformer achieved an 8.96× delay improvement and 12.57× energy improvement for the Vanilla transformers compared to the GPU baseline at a sequence length of 512. Implementing BERT using CMOS-FeFET hybrid iMTransformer achieves 13.71× delay improvement and 8.95× delay improvement compared to the GPU baseline at sequence length of 512. The hybrid iMTransformer also achieves a throughput of 2.23 K samples/sec and 124.8 samples/s/W using the MLPerf benchmark using BERT-large and SQuAD 1.1 dataset, an 11× speedup and 7.92× energy improvement compared to the GPU baseline.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"45869376","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2022-04-11DOI: 10.3389/felec.2022.869013
A. Gaurav, Xiaoyao Song, S. Manhas, Aditya Gilra, E. Vasilaki, P. Roy, M. M. De Souza
The processing of sequential and temporal data is essential to computer vision and speech recognition, two of the most common applications of artificial intelligence (AI). Reservoir computing (RC) is a branch of AI that offers a highly efficient framework for processing temporal inputs at a low training cost compared to conventional Recurrent Neural Networks (RNNs). However, despite extensive effort, two-terminal memristor-based reservoirs have, until now, been implemented to process sequential data by reading their conductance states only once, at the end of the entire sequence. This method reduces the dimensionality, related to the number of signals from the reservoir and thereby lowers the overall performance of reservoir systems. Higher dimensionality facilitates the separation of originally inseparable inputs by reading out from a larger set of spatiotemporal features of inputs. Moreover, memristor-based reservoirs either use multiple pulse rates, fast or slow read (immediately or with a delay introduced after the end of the sequence), or excitatory pulses to enhance the dimensionality of reservoir states. This adds to the complexity of the reservoir system and reduces power efficiency. In this paper, we demonstrate the first reservoir computing system based on a dynamic three terminal solid electrolyte ZnO/Ta2O5 Thin-film Transistor fabricated at less than 100°C. The inherent nonlinearity and dynamic memory of the device lead to a rich separation property of reservoir states that results in, to our knowledge, the highest accuracy of 94.44%, using electronic charge-based system, for the classification of hand-written digits. This improvement is attributed to an increase in the dimensionality of the reservoir by reading the reservoir states after each pulse rather than at the end of the sequence. The third terminal enables a read operation in the off state, that is when no pulse is applied at the gate terminal, via a small read pulse at the drain. This fundamentally allows multiple read operations without increasing energy consumption, which is not possible in the conventional two-terminal memristor counterpart. Further, we have also shown that devices do not saturate even after multiple write pulses which demonstrates the device’s ability to process longer sequences.
{"title":"Reservoir Computing for Temporal Data Classification Using a Dynamic Solid Electrolyte ZnO Thin Film Transistor","authors":"A. Gaurav, Xiaoyao Song, S. Manhas, Aditya Gilra, E. Vasilaki, P. Roy, M. M. De Souza","doi":"10.3389/felec.2022.869013","DOIUrl":"https://doi.org/10.3389/felec.2022.869013","url":null,"abstract":"The processing of sequential and temporal data is essential to computer vision and speech recognition, two of the most common applications of artificial intelligence (AI). Reservoir computing (RC) is a branch of AI that offers a highly efficient framework for processing temporal inputs at a low training cost compared to conventional Recurrent Neural Networks (RNNs). However, despite extensive effort, two-terminal memristor-based reservoirs have, until now, been implemented to process sequential data by reading their conductance states only once, at the end of the entire sequence. This method reduces the dimensionality, related to the number of signals from the reservoir and thereby lowers the overall performance of reservoir systems. Higher dimensionality facilitates the separation of originally inseparable inputs by reading out from a larger set of spatiotemporal features of inputs. Moreover, memristor-based reservoirs either use multiple pulse rates, fast or slow read (immediately or with a delay introduced after the end of the sequence), or excitatory pulses to enhance the dimensionality of reservoir states. This adds to the complexity of the reservoir system and reduces power efficiency. In this paper, we demonstrate the first reservoir computing system based on a dynamic three terminal solid electrolyte ZnO/Ta2O5 Thin-film Transistor fabricated at less than 100°C. The inherent nonlinearity and dynamic memory of the device lead to a rich separation property of reservoir states that results in, to our knowledge, the highest accuracy of 94.44%, using electronic charge-based system, for the classification of hand-written digits. This improvement is attributed to an increase in the dimensionality of the reservoir by reading the reservoir states after each pulse rather than at the end of the sequence. The third terminal enables a read operation in the off state, that is when no pulse is applied at the gate terminal, via a small read pulse at the drain. This fundamentally allows multiple read operations without increasing energy consumption, which is not possible in the conventional two-terminal memristor counterpart. Further, we have also shown that devices do not saturate even after multiple write pulses which demonstrates the device’s ability to process longer sequences.","PeriodicalId":73081,"journal":{"name":"Frontiers in electronics","volume":" ","pages":""},"PeriodicalIF":0.0,"publicationDate":"2022-04-11","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"47258307","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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