Underhood applications in automotive are increasingly using electronics systems for safety and critical functions. In flip-chip ball grid array (FCBGA) packages, underfill (UF) forms the integral mechanical support between the substrate and die. In addition, underfills protect the chip against shock, vibration, moisture, and radiation. Underfills provide great mechanical support to the solder interconnects and limit the amount of plastic work during temperature excursions. Delamination is of the significant failure modes observed at chip-UF interfaces. Chip-UF interfaces have not been studied widely under cyclic fatigue loading with sustained high-temperature exposure. Chip-UF bi-material samples are prepared and subjected to long-term high-temperature aging at 100°C and then tested under four-point bend fatigue loading. The specimens have been exposed to isothermal aging for 30 days, 60 days, 90 days, 120 days, and 180 days. The interfacial crack growth rate with respect to the number of fatigue cycles has been determined from the experiment. The steady-state energy release rate and range of mode-I stress intensity values (ΔKI) have been computed for each of the test conditions. Paris power law has been used to establish the relationship between the crack growth rate and the range of stress intensity factors. Paris exponents (A,n) are determined from the relationship to understand the evolution in interfacial fracture toughness with respect number of days of aging under fatigue loading.
{"title":"Evolution of Propensity for Chip-UF FCBGA Interface Delamination Under Fatigue-Loading and Sustained High Automotive Temperatures","authors":"P. Lall, A. Pandurangan, J. Williamson","doi":"10.1115/ipack2022-97424","DOIUrl":"https://doi.org/10.1115/ipack2022-97424","url":null,"abstract":"\u0000 Underhood applications in automotive are increasingly using electronics systems for safety and critical functions. In flip-chip ball grid array (FCBGA) packages, underfill (UF) forms the integral mechanical support between the substrate and die. In addition, underfills protect the chip against shock, vibration, moisture, and radiation. Underfills provide great mechanical support to the solder interconnects and limit the amount of plastic work during temperature excursions. Delamination is of the significant failure modes observed at chip-UF interfaces. Chip-UF interfaces have not been studied widely under cyclic fatigue loading with sustained high-temperature exposure. Chip-UF bi-material samples are prepared and subjected to long-term high-temperature aging at 100°C and then tested under four-point bend fatigue loading. The specimens have been exposed to isothermal aging for 30 days, 60 days, 90 days, 120 days, and 180 days. The interfacial crack growth rate with respect to the number of fatigue cycles has been determined from the experiment. The steady-state energy release rate and range of mode-I stress intensity values (ΔKI) have been computed for each of the test conditions. Paris power law has been used to establish the relationship between the crack growth rate and the range of stress intensity factors. Paris exponents (A,n) are determined from the relationship to understand the evolution in interfacial fracture toughness with respect number of days of aging under fatigue loading.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132903579","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Mohammad Azarifar, Ceren Cengiz, Kerem Ocaksönmez, Asim Onal, S. Nizamoglu, M. Arik
Limited luminous flux per wafer area of light emitting diodes (LEDs) for high power solid state illumination causes some packaging real estate issues. This problem can be tackled with laser diodes (LDs). At high current densities, LDs offer higher efficiency, however with very low etendue and divergent angle. This significantly increases the complexity of color conversion for white light generation. Concentrated light can carbonize the color conversion unit and have high speckle contrast. These problems can be addressed by efficient diffusion of the laser beam and this paper is aimed to introduce the first laser diffusion system based on TiO2 Mie particles. Based on a series of ray tracing simulations, an idealized cost-effective system is modeled and results showed an almost lossless diffusion with a guiding system based on reflection resulting in an almost uniform irradiance level with only 17% power loss. Furthermore, offered design can reduce the challenges for the compact packaging of white LDs by eliminating the heat sink for color conversion coating and enabling a safe light intensity for utilizing quantum dots for color engineering.
{"title":"High Brightness Illumination Based on Laser Light Diffusion With Mie Scattering","authors":"Mohammad Azarifar, Ceren Cengiz, Kerem Ocaksönmez, Asim Onal, S. Nizamoglu, M. Arik","doi":"10.1115/ipack2022-97220","DOIUrl":"https://doi.org/10.1115/ipack2022-97220","url":null,"abstract":"\u0000 Limited luminous flux per wafer area of light emitting diodes (LEDs) for high power solid state illumination causes some packaging real estate issues. This problem can be tackled with laser diodes (LDs). At high current densities, LDs offer higher efficiency, however with very low etendue and divergent angle. This significantly increases the complexity of color conversion for white light generation. Concentrated light can carbonize the color conversion unit and have high speckle contrast. These problems can be addressed by efficient diffusion of the laser beam and this paper is aimed to introduce the first laser diffusion system based on TiO2 Mie particles. Based on a series of ray tracing simulations, an idealized cost-effective system is modeled and results showed an almost lossless diffusion with a guiding system based on reflection resulting in an almost uniform irradiance level with only 17% power loss. Furthermore, offered design can reduce the challenges for the compact packaging of white LDs by eliminating the heat sink for color conversion coating and enabling a safe light intensity for utilizing quantum dots for color engineering.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133569924","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Vibin Shalom Simon, Lochan Sai Reddy, Pardeep Shahi, Amrutha Valli, S. Saini, Himanshu Modi, Pratik V. Bansode, D. Agonafer
Rising power densities at the server level due to increasing performance demands are being met by using efficient thermal management methods such as direct-to-chip liquid cooling. The use of cold plates that are directly installed yields a lower thermal resistance path from the chip to the ambient. In a hybrid-cooled server arrangement, high-heat-generating components are cooled with water or a water-based fluid, while the rest of the components are cooled with air using server-level fans. It is imperative to characterize the heat capture ratio for various server boundary conditions to ascertain the best possible liquid and airflow rates and temperatures. These parameters serve as inputs in defining the Total Cost of Ownership (TCO). The present investigation numerically evaluates the heat capture ratio in a hybrid cooled server for peak server load and varying inlet temperature for air and liquid. The CFD model of a Cisco Series C220 server with direct-to-chip liquid-cooled CPUs was developed. The cold plate for the CPU was experimentally characterized for pressure drop and thermal resistance characteristics and a black-box model was used for CFD simulations using 25% propylene glycol as the coolant. The heat capture ratio value was obtained under the varied temperature and flow rate boundary conditions of air and liquid. Based on the heat capture ratio values obtained, optimum values of inlet temperatures and flow rates are recommended for air and liquid for the server being investigated.
{"title":"CFD Analysis of Heat Capture Ratio in a Hybrid Cooled Server","authors":"Vibin Shalom Simon, Lochan Sai Reddy, Pardeep Shahi, Amrutha Valli, S. Saini, Himanshu Modi, Pratik V. Bansode, D. Agonafer","doi":"10.1115/ipack2022-97445","DOIUrl":"https://doi.org/10.1115/ipack2022-97445","url":null,"abstract":"\u0000 Rising power densities at the server level due to increasing performance demands are being met by using efficient thermal management methods such as direct-to-chip liquid cooling. The use of cold plates that are directly installed yields a lower thermal resistance path from the chip to the ambient. In a hybrid-cooled server arrangement, high-heat-generating components are cooled with water or a water-based fluid, while the rest of the components are cooled with air using server-level fans. It is imperative to characterize the heat capture ratio for various server boundary conditions to ascertain the best possible liquid and airflow rates and temperatures. These parameters serve as inputs in defining the Total Cost of Ownership (TCO). The present investigation numerically evaluates the heat capture ratio in a hybrid cooled server for peak server load and varying inlet temperature for air and liquid. The CFD model of a Cisco Series C220 server with direct-to-chip liquid-cooled CPUs was developed. The cold plate for the CPU was experimentally characterized for pressure drop and thermal resistance characteristics and a black-box model was used for CFD simulations using 25% propylene glycol as the coolant. The heat capture ratio value was obtained under the varied temperature and flow rate boundary conditions of air and liquid. Based on the heat capture ratio values obtained, optimum values of inlet temperatures and flow rates are recommended for air and liquid for the server being investigated.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"119 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115804892","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Iradukunda, D. Huitink, T. Gebrael, N. Miljkovic
The voltage shielding capacity of a hydrofluoroether type fluid, specifically HFE7500 along with that of Parylene C based conformal surface coatings are explored. Both voltage blocking technologies demonstrated an ability to maintain good voltage blocking capacity even when exposed to field strengths as high as 16.8kV/mm in the case of the dielectric fluid and 33.5 kV/mm for 2μm-thick layers of Parylene C. To potentially improve voltage blocking characteristics while minimizing thermal resistance, this study also explores the combined voltage shielding capacity of HFE7500 coupled with thin Parylene C coatings deposited via chemical vapor deposition (CVD). Breakdown tests on point-point electrodes coated with a 10μm film of this coating returned results that showed diminished breakdown voltage compared to bare electrodes. This may be attributed to several factors including the ionization of the coating that initiates breakdown at a reduced field strength.
{"title":"Performance Validation of Voltage Blocking Technologies for Direct Cooling of High-Density Power Electronics","authors":"A. Iradukunda, D. Huitink, T. Gebrael, N. Miljkovic","doi":"10.1115/ipack2022-97412","DOIUrl":"https://doi.org/10.1115/ipack2022-97412","url":null,"abstract":"\u0000 The voltage shielding capacity of a hydrofluoroether type fluid, specifically HFE7500 along with that of Parylene C based conformal surface coatings are explored. Both voltage blocking technologies demonstrated an ability to maintain good voltage blocking capacity even when exposed to field strengths as high as 16.8kV/mm in the case of the dielectric fluid and 33.5 kV/mm for 2μm-thick layers of Parylene C. To potentially improve voltage blocking characteristics while minimizing thermal resistance, this study also explores the combined voltage shielding capacity of HFE7500 coupled with thin Parylene C coatings deposited via chemical vapor deposition (CVD). Breakdown tests on point-point electrodes coated with a 10μm film of this coating returned results that showed diminished breakdown voltage compared to bare electrodes. This may be attributed to several factors including the ionization of the coating that initiates breakdown at a reduced field strength.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"73 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132074390","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Heydari, Bahareh Eslami, Vahideh Radmard, Fred Rebarber, T. Buell, K. Gray, Sam Sather, Jeremy Rodriguez
Environmental impacts of ever-growing computational requirements have raised worldwide concerns and significant efforts have been dedicated to reducing power consumption, water usage, and eventually the carbon footprint. Cloud architecture and services have undergone substantial development to become more sustainable and reliable with implementing advanced cooling solutions. In this research, a bottom-up approach has been presented to investigate the energy optimization opportunities of an air-liquid hybrid cooling method compared to the pure air cooling for a 1.7 MW data center. A gradual transition from 100% air cooling to 25%–75% air and liquid cooling has been studied to capture the changes in IT, fan, facility, and the total data center power consumption. Various system design optimizations such as supply air temperature (SAT), facility chiller water temperature, economization and secondary fluid temperature are embedded in this work to highlight the importance of proper setpoint conditions on both primary and secondary sides. Computational fluid dynamics (CFD) and flow network modeling (FNM) are utilized to precisely assess the performance of air and liquid cooling by evaluating the required flow rate, pressure drop, and critical case temperature of computing components as well as temperature change of cooling medium. Energy consumption of the selected cooling equipment is measured based on the BIN data for CRAH and CDU’s performance models. Power usage effectiveness (PUE) measured and compared with Total Usage Effectiveness (TUE) which appears to be a more suitable metric to weigh a data center’s design efficiency by not limiting the fan power to the IT boundary. For the most optimized case, we obtained up to 27% lower consumption in the facility power and 15.5% lower usage in the whole data center site. Increasing the percentage of liquid cooling contribution significantly diminishes the power intake which addresses concerns about natural resources limit as one of the most critical requirements of a sustainable design.
{"title":"Power Usage Effectiveness Analysis of a High-Density Air-Liquid Hybrid Cooled Data Center","authors":"A. Heydari, Bahareh Eslami, Vahideh Radmard, Fred Rebarber, T. Buell, K. Gray, Sam Sather, Jeremy Rodriguez","doi":"10.1115/ipack2022-97447","DOIUrl":"https://doi.org/10.1115/ipack2022-97447","url":null,"abstract":"\u0000 Environmental impacts of ever-growing computational requirements have raised worldwide concerns and significant efforts have been dedicated to reducing power consumption, water usage, and eventually the carbon footprint. Cloud architecture and services have undergone substantial development to become more sustainable and reliable with implementing advanced cooling solutions. In this research, a bottom-up approach has been presented to investigate the energy optimization opportunities of an air-liquid hybrid cooling method compared to the pure air cooling for a 1.7 MW data center. A gradual transition from 100% air cooling to 25%–75% air and liquid cooling has been studied to capture the changes in IT, fan, facility, and the total data center power consumption. Various system design optimizations such as supply air temperature (SAT), facility chiller water temperature, economization and secondary fluid temperature are embedded in this work to highlight the importance of proper setpoint conditions on both primary and secondary sides. Computational fluid dynamics (CFD) and flow network modeling (FNM) are utilized to precisely assess the performance of air and liquid cooling by evaluating the required flow rate, pressure drop, and critical case temperature of computing components as well as temperature change of cooling medium. Energy consumption of the selected cooling equipment is measured based on the BIN data for CRAH and CDU’s performance models. Power usage effectiveness (PUE) measured and compared with Total Usage Effectiveness (TUE) which appears to be a more suitable metric to weigh a data center’s design efficiency by not limiting the fan power to the IT boundary. For the most optimized case, we obtained up to 27% lower consumption in the facility power and 15.5% lower usage in the whole data center site. Increasing the percentage of liquid cooling contribution significantly diminishes the power intake which addresses concerns about natural resources limit as one of the most critical requirements of a sustainable design.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131189769","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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