A. Heydari, Vahideh Radmard, Bahareh Eslami, Mohammad I. Tradat, Yaman M. Manaserh, Harold Miyamura, Uschas Chowdhury, Pardeep Shahi, Kevin Dave Hall, B. Sammakia, Jeremy Rodriguez
Growing demand for dense and high-performing IT compute capacity to support deep learning and artificial intelligence workloads necessitates data centers to look for more robust thermal management strategies. Today, data centers across the world are turning to liquid-based cooling solutions to keep up with the increased cooling demand for high power racks approaching 100kW of heat dissipation. Deploying direct-to-chip cold plate liquid cooling is one of the mainstream approaches which allows targeted cooling of high-power processors. This study provides the framework for a hybrid in row cooler (IRC) with liquid-to-air (L2A) heat exchanger (HX) system delivering chilled coolant to liquid-cooling cold plates mounted to the high heat dissipation electronics. This approach is useful for high heat density cooling of racks where no primary facility coolant is available at the data center. The present study aims to investigate the thermo-hydraulic performance of a distinct L2A IRC system that supplies cold secondary coolant (PG 25%) into the cooling loops of liquid-cooled servers in racks within an existing air-cooled data center. Thermal test vehicles (TTVs) are built to replicate actual high heat density servers. From the cold plate to data center level the proper choice of each level component was described based on their cooling performance and relevance. Three different cooling loop/rack designs are characterized experimentally, and detailed analytical and numerical (FNM) simulations are developed to analyze the heat exchanger performance. The FNM and CFD model of a data center are done in two steady and transient forms to study the performance of the L2A IRC in a data center.
{"title":"Liquid to Air Cooling for High Heat Density Liquid Cooled Data Centers","authors":"A. Heydari, Vahideh Radmard, Bahareh Eslami, Mohammad I. Tradat, Yaman M. Manaserh, Harold Miyamura, Uschas Chowdhury, Pardeep Shahi, Kevin Dave Hall, B. Sammakia, Jeremy Rodriguez","doi":"10.1115/ipack2022-97386","DOIUrl":"https://doi.org/10.1115/ipack2022-97386","url":null,"abstract":"\u0000 Growing demand for dense and high-performing IT compute capacity to support deep learning and artificial intelligence workloads necessitates data centers to look for more robust thermal management strategies. Today, data centers across the world are turning to liquid-based cooling solutions to keep up with the increased cooling demand for high power racks approaching 100kW of heat dissipation. Deploying direct-to-chip cold plate liquid cooling is one of the mainstream approaches which allows targeted cooling of high-power processors. This study provides the framework for a hybrid in row cooler (IRC) with liquid-to-air (L2A) heat exchanger (HX) system delivering chilled coolant to liquid-cooling cold plates mounted to the high heat dissipation electronics. This approach is useful for high heat density cooling of racks where no primary facility coolant is available at the data center. The present study aims to investigate the thermo-hydraulic performance of a distinct L2A IRC system that supplies cold secondary coolant (PG 25%) into the cooling loops of liquid-cooled servers in racks within an existing air-cooled data center. Thermal test vehicles (TTVs) are built to replicate actual high heat density servers. From the cold plate to data center level the proper choice of each level component was described based on their cooling performance and relevance. Three different cooling loop/rack designs are characterized experimentally, and detailed analytical and numerical (FNM) simulations are developed to analyze the heat exchanger performance. The FNM and CFD model of a data center are done in two steady and transient forms to study the performance of the L2A IRC in a data center.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124533147","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Norman, M. Gallina, Olena Zhu, J. Weiner, Fabian Garita Gonzalez
Thermal considerations are a critical facet in SoC and System design. There are numerous difficulties in performing comprehensive thermal analysis on modern SoC designs as well as considerable difficulty in moving towards a cross-discipline co-design strategy. The design space is large and growing more complex with each generation, coupled with long evaluation/simulation time for sufficiently accurate thermal response. Thermal feedback into design iterations were additionally slowed by the huge numbers of excitation (workloads) scenarios needed to provide design robustness. Augmented Intelligence and machine learning (ML) approaches are explored to address some of these difficulties, as well as development of a fast evaluation function to reduce total computation time. Various clustering and modeling techniques are used to improve stimulus/workload selection and coverage for analysis, which further reduces evaluation time. This huge enhancement in evaluation time has opened new opportunities for co-design work, ML optimization schemes are applied to address the high degrees of freedom present at the SoC level. The results have been impressive, showing huge potential for thermal improvements which translate directly into improved product performance.
{"title":"AI/ML Applications for Thermally Aware SoC Designs","authors":"A. Norman, M. Gallina, Olena Zhu, J. Weiner, Fabian Garita Gonzalez","doi":"10.1115/ipack2022-97186","DOIUrl":"https://doi.org/10.1115/ipack2022-97186","url":null,"abstract":"\u0000 Thermal considerations are a critical facet in SoC and System design. There are numerous difficulties in performing comprehensive thermal analysis on modern SoC designs as well as considerable difficulty in moving towards a cross-discipline co-design strategy. The design space is large and growing more complex with each generation, coupled with long evaluation/simulation time for sufficiently accurate thermal response. Thermal feedback into design iterations were additionally slowed by the huge numbers of excitation (workloads) scenarios needed to provide design robustness. Augmented Intelligence and machine learning (ML) approaches are explored to address some of these difficulties, as well as development of a fast evaluation function to reduce total computation time. Various clustering and modeling techniques are used to improve stimulus/workload selection and coverage for analysis, which further reduces evaluation time. This huge enhancement in evaluation time has opened new opportunities for co-design work, ML optimization schemes are applied to address the high degrees of freedom present at the SoC level. The results have been impressive, showing huge potential for thermal improvements which translate directly into improved product performance.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114483602","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Sintered silver materials (with and without epoxy matrices) are used in microelectronics, as high-temperature interconnect materials, and also as conductor trace materials in printed electronic circuitry. The sintering process results in an interconnected assemblage of discrete agglomerated particles. This results in intrinsic length-scale effects under the action of different stress gradients. In other words, the effective homogenized average continuum-scale material behavior changes with the local magnitude of the stress gradients. Consequently, regions of sharp, localized stress concentrations have to be modeled with different effective continuum material properties, compared with the properties that are relevant for regions that have a uniform stress field. In this study, the focus in on the effective creep behavior, in particular. This length-scale effect is empirically explored in this study using nanoindentation with indenters of different tip radii, causing different stress gradients. Properties estimated by each indenter are compared to demonstrate the dependence of the effective continuum properties on the local length scale effects (generated by the ratio of the tip radius to the characteristic discrete dimension of the sintered particles).
{"title":"Length-Scale Effects in Average Viscoplastic Behavior of Sintered Silver Materials: Empirical Exploration With Indentation Methods","authors":"D. Leslie, A. Dasgupta, A. Damian","doi":"10.1115/ipack2022-97363","DOIUrl":"https://doi.org/10.1115/ipack2022-97363","url":null,"abstract":"\u0000 Sintered silver materials (with and without epoxy matrices) are used in microelectronics, as high-temperature interconnect materials, and also as conductor trace materials in printed electronic circuitry. The sintering process results in an interconnected assemblage of discrete agglomerated particles. This results in intrinsic length-scale effects under the action of different stress gradients. In other words, the effective homogenized average continuum-scale material behavior changes with the local magnitude of the stress gradients. Consequently, regions of sharp, localized stress concentrations have to be modeled with different effective continuum material properties, compared with the properties that are relevant for regions that have a uniform stress field. In this study, the focus in on the effective creep behavior, in particular. This length-scale effect is empirically explored in this study using nanoindentation with indenters of different tip radii, causing different stress gradients. Properties estimated by each indenter are compared to demonstrate the dependence of the effective continuum properties on the local length scale effects (generated by the ratio of the tip radius to the characteristic discrete dimension of the sintered particles).","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122073889","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Karim, Tae Kyoung Kim, Daniel C. Shoemaker, Yiwen Song, J. Kwak, Sukwon Choi
The demand for high power and high-frequency radio frequency (RF) power amplifiers makes AlGaN/GaN high electron mobility transistors (HEMTs) an attractive option due to their large critical field, high saturation velocity, and reduced device footprint as compared to Si-based counterparts. However, due to the high operating power densities, intense device self-heating occurs, which degrades the electrical performance and compromises the device’s reliability. The self-heating behavior of AlGaN/GaN HEMTs is known to be not solely a function of the dissipated power but is highly bias-dependent. As the operation of RF power amplifiers involves alteration of the device operation from fully-open to pinched-off channel conditions, it is critical to experimentally map the full channel temperature profile as a function of bias conditions. However, such measurement is difficult using optical thermography techniques due to the lack of optical access underneath the gate electrode, where the peak temperature is expected to occur. To address this challenge, an AlGaN/GaN HEMT employing a transparent gate made of indium tin oxide (ITO) was fabricated, which enables full channel temperature mapping using Raman spectroscopy. It was found that the maximum channel temperature rise under a partially pinched-off condition is more than ∼93% higher than that for an open channel condition, although both conditions would lead to an identical power dissipation level. The channel peak temperature probed in an ITO-gated device (underneath the gate) is ∼33% higher than the highest channel temperature that can be measured for a standard metal-gated AlGaN/GaN HEMT (i.e., next to the metal gate structure) operating under an identical bias condition. This indicates that one may significantly underestimate the device’s thermal resistance when solely relying on performing thermal characterization on the optically accessible region of a standard AlGaN/GaN HEMT. The outcomes of this study are important in terms of conducting a more accurate lifetime prediction of the device lifetime and designing thermal management solutions.
{"title":"Experimental Probing of the Bias Dependent Self-Heating in AlGaN/GaN HEMTs With a Transparent Indium Tin Oxide Gate","authors":"A. Karim, Tae Kyoung Kim, Daniel C. Shoemaker, Yiwen Song, J. Kwak, Sukwon Choi","doi":"10.1115/ipack2022-98800","DOIUrl":"https://doi.org/10.1115/ipack2022-98800","url":null,"abstract":"\u0000 The demand for high power and high-frequency radio frequency (RF) power amplifiers makes AlGaN/GaN high electron mobility transistors (HEMTs) an attractive option due to their large critical field, high saturation velocity, and reduced device footprint as compared to Si-based counterparts. However, due to the high operating power densities, intense device self-heating occurs, which degrades the electrical performance and compromises the device’s reliability. The self-heating behavior of AlGaN/GaN HEMTs is known to be not solely a function of the dissipated power but is highly bias-dependent. As the operation of RF power amplifiers involves alteration of the device operation from fully-open to pinched-off channel conditions, it is critical to experimentally map the full channel temperature profile as a function of bias conditions. However, such measurement is difficult using optical thermography techniques due to the lack of optical access underneath the gate electrode, where the peak temperature is expected to occur.\u0000 To address this challenge, an AlGaN/GaN HEMT employing a transparent gate made of indium tin oxide (ITO) was fabricated, which enables full channel temperature mapping using Raman spectroscopy. It was found that the maximum channel temperature rise under a partially pinched-off condition is more than ∼93% higher than that for an open channel condition, although both conditions would lead to an identical power dissipation level. The channel peak temperature probed in an ITO-gated device (underneath the gate) is ∼33% higher than the highest channel temperature that can be measured for a standard metal-gated AlGaN/GaN HEMT (i.e., next to the metal gate structure) operating under an identical bias condition. This indicates that one may significantly underestimate the device’s thermal resistance when solely relying on performing thermal characterization on the optically accessible region of a standard AlGaN/GaN HEMT. The outcomes of this study are important in terms of conducting a more accurate lifetime prediction of the device lifetime and designing thermal management solutions.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116808708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Himel Barua, E. Gurpinar, Lingxiao Xue, B. Ozpineci
With the development of high-power and high-torque machines, requirements for high-power density electronics are increasing. Thermal management of such systems requires high heat extraction. Conventional air cooling based heat sinks and cold plate based liquid cooling have their own benefits for various applications but has limitations for high power density applications. The current study explores a jet impingement based direct substrate cooling system that was implemented for a SiC based direct bonded Cu substrate for various power losses. Numerical comparison between jet impingement cooling and conventional horizontal/indirect cooling (pin fin heat sink and genetic algorithm-optimized heat sink) showed that the area weighted average of the heat transfer coefficient (HTC) is high for both horizontal cooling designs, and the local HTC is higher for jet impingement. Design iterations were undertaken to resolve the bottleneck of this cooling system. Increasing the number of nozzles helped to cover more area at the direct bonded Cu bottom plate, which drops the chip temperature considerably. With a constant flow rate, increasing the number of nozzles would decrease local jet velocity, which reduces the heat extraction by jet impingement. This issue can be addressed by reducing the diameter of nozzle but doing so results in a high pressure drop where the design constraint is 2 psi. A flared nozzle design is proposed, which has a higher spreading angle of the jet that increases the flow coverage and reduces the pressure drop of the coolant loop.
{"title":"Comparative Analysis of Direct and Indirect Cooling of Wide-Bandgap Power Modules and Performance Enhancement of Jet Impingement-Based Direct Substrate Cooling","authors":"Himel Barua, E. Gurpinar, Lingxiao Xue, B. Ozpineci","doi":"10.1115/ipack2022-97172","DOIUrl":"https://doi.org/10.1115/ipack2022-97172","url":null,"abstract":"\u0000 With the development of high-power and high-torque machines, requirements for high-power density electronics are increasing. Thermal management of such systems requires high heat extraction. Conventional air cooling based heat sinks and cold plate based liquid cooling have their own benefits for various applications but has limitations for high power density applications. The current study explores a jet impingement based direct substrate cooling system that was implemented for a SiC based direct bonded Cu substrate for various power losses. Numerical comparison between jet impingement cooling and conventional horizontal/indirect cooling (pin fin heat sink and genetic algorithm-optimized heat sink) showed that the area weighted average of the heat transfer coefficient (HTC) is high for both horizontal cooling designs, and the local HTC is higher for jet impingement. Design iterations were undertaken to resolve the bottleneck of this cooling system. Increasing the number of nozzles helped to cover more area at the direct bonded Cu bottom plate, which drops the chip temperature considerably. With a constant flow rate, increasing the number of nozzles would decrease local jet velocity, which reduces the heat extraction by jet impingement. This issue can be addressed by reducing the diameter of nozzle but doing so results in a high pressure drop where the design constraint is 2 psi. A flared nozzle design is proposed, which has a higher spreading angle of the jet that increases the flow coverage and reduces the pressure drop of the coolant loop.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"150 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126195399","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Zion Clarke, Sonya T. Smith, Reece Whitt, D. Huitink
The objective of this study is to quantify heat transfer direct cooling channel enhancements in single phase for optimal cooling. A device is created to mitigate hot spots in high voltage and high-power density electronics. This design study is for power modules with high heat fluxes specifically, SiC/Si-IGBT hybrid inverter systems requiring enhanced cooling. Experimental test for this heat sink device consists of flow loop tests through conventional hot plates with a first-generation heat sink device attached. This heat spreading device consists of an internal manifold design that is empirically correlated and simulated to help identify enhanced cooling techniques. Developing a framework of designing single nozzle manifolds to identify ideal angles of separation, nozzle chord lengths, and entrance/outlet region diameters for analysis of varying design layouts. Using computational fluid dynamics (CFD) to create an effective process that offers optimal geometry configurations for jet impinging heat sink devices. The present analysis investigates and defines parameters to predict design behaviors for optimal thermal performance of a localized cooling heat spreading device.
{"title":"Computational Models of Additive Manufactured Heat Spreading Device for Enhanced Localized Cooling","authors":"Zion Clarke, Sonya T. Smith, Reece Whitt, D. Huitink","doi":"10.1115/ipack2022-97446","DOIUrl":"https://doi.org/10.1115/ipack2022-97446","url":null,"abstract":"\u0000 The objective of this study is to quantify heat transfer direct cooling channel enhancements in single phase for optimal cooling. A device is created to mitigate hot spots in high voltage and high-power density electronics. This design study is for power modules with high heat fluxes specifically, SiC/Si-IGBT hybrid inverter systems requiring enhanced cooling. Experimental test for this heat sink device consists of flow loop tests through conventional hot plates with a first-generation heat sink device attached. This heat spreading device consists of an internal manifold design that is empirically correlated and simulated to help identify enhanced cooling techniques. Developing a framework of designing single nozzle manifolds to identify ideal angles of separation, nozzle chord lengths, and entrance/outlet region diameters for analysis of varying design layouts. Using computational fluid dynamics (CFD) to create an effective process that offers optimal geometry configurations for jet impinging heat sink devices. The present analysis investigates and defines parameters to predict design behaviors for optimal thermal performance of a localized cooling heat spreading device.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"314 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126027005","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
S. Phansalkar, B. Han, E. Akbari, Paulius Vaitiekunas
Dynamic mechanical analyzers (DMA) are routinely practiced in the semiconductor industry to measure the viscoelastic behavior of highly filled thermosetting polymers. The highly filled polymers possess unique challenges in viscoelastic property measurements where set-and-forget style of DMA operation do not always produce the most accurate data due to a large change in modulus over operating and/or manufacturing temperature excursions. This paper discusses the unique challenges associated with the highly filled polymers first and proposes a procedure to determine a proper set of testing parameters.
{"title":"On the Viscoelastic Property Measurement of Filled Polymers by Dynamic Mechanical Analyzer (DMA)","authors":"S. Phansalkar, B. Han, E. Akbari, Paulius Vaitiekunas","doi":"10.1115/ipack2022-97719","DOIUrl":"https://doi.org/10.1115/ipack2022-97719","url":null,"abstract":"\u0000 Dynamic mechanical analyzers (DMA) are routinely practiced in the semiconductor industry to measure the viscoelastic behavior of highly filled thermosetting polymers. The highly filled polymers possess unique challenges in viscoelastic property measurements where set-and-forget style of DMA operation do not always produce the most accurate data due to a large change in modulus over operating and/or manufacturing temperature excursions. This paper discusses the unique challenges associated with the highly filled polymers first and proposes a procedure to determine a proper set of testing parameters.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121419852","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Nhi V. Quach, Jewoo Park, Yonghwi Kim, Ruey-Hwa Cheng, Michal Jenčo, Alex K. Lee, Chenxi Yin, Y. Won
Autonomous vehicles are part of an expanding industry that encompasses various interdisciplinary fields including but not limited to dynamics and control, thermal engineering, sensors, data processing, and artificial intelligence. Autonomous vehicles require the use of various sensors, such as optical cameras, RADAR (radio detection and ranging), or LiDAR (light detection and ranging), to navigate on the road with the aim of self-driving. However, the exposures to environmental conditions related to the combination of surrounding temperature and humidity lead to challenges in sensor performance. For example, the sensor’s temperature will increase as the heat is generated during the vehicle’s usage. On the other hand, the sensor system will undergo thermal shock from the temperature difference the due to sudden changes in temperature, such as moving from an indoor garage at room temperature to −10°C environments. Furthermore, the consistent exposure to the cold weather may occur frosting, which can obstruct the optical sensor’s visibility. Those issues limit the potential of data processing from optical cameras and consequence autonomous driving reliability at extreme environmental conditions. To review the requirements for sensor performance used in autonomous vehicles and to formulate solutions addressing potential concerns to improve autonomous driving safety, we simulate camera operating conditions in the real world. First, we correlate the common placements of optical sensors, mainly focusing on cameras, in autonomous vehicles to naturally occurring environmental conditions in relation to temperature and humidity. With this correlation, we aim to provide an understanding of potential areas on the vehicle that may be more prone to environmental factors of thermal shock or humidity variations. Second, we examine the condensation and frosting mechanism and formation sequence on the vehicle surfaces (e.g., windshield and camera lenses), which is then used to determine the level of water on the lenses before the sensor vision is impeded. Third, we introduce and conceptualize machine learning models that can extract features by employing object detection algorithms that perform image restoration to reconstruct areas with deterioration despite the presence of the droplets or frosts on the camera. With this research, we aim to provide a better understanding of the potential caveats and algorithm solutions that can help the capability for autonomous driving even under extreme environmental conditions.
{"title":"Machine Learning Enables Autonomous Vehicles Under Extreme Environmental Conditions","authors":"Nhi V. Quach, Jewoo Park, Yonghwi Kim, Ruey-Hwa Cheng, Michal Jenčo, Alex K. Lee, Chenxi Yin, Y. Won","doi":"10.1115/ipack2022-96542","DOIUrl":"https://doi.org/10.1115/ipack2022-96542","url":null,"abstract":"\u0000 Autonomous vehicles are part of an expanding industry that encompasses various interdisciplinary fields including but not limited to dynamics and control, thermal engineering, sensors, data processing, and artificial intelligence. Autonomous vehicles require the use of various sensors, such as optical cameras, RADAR (radio detection and ranging), or LiDAR (light detection and ranging), to navigate on the road with the aim of self-driving. However, the exposures to environmental conditions related to the combination of surrounding temperature and humidity lead to challenges in sensor performance. For example, the sensor’s temperature will increase as the heat is generated during the vehicle’s usage. On the other hand, the sensor system will undergo thermal shock from the temperature difference the due to sudden changes in temperature, such as moving from an indoor garage at room temperature to −10°C environments. Furthermore, the consistent exposure to the cold weather may occur frosting, which can obstruct the optical sensor’s visibility. Those issues limit the potential of data processing from optical cameras and consequence autonomous driving reliability at extreme environmental conditions.\u0000 To review the requirements for sensor performance used in autonomous vehicles and to formulate solutions addressing potential concerns to improve autonomous driving safety, we simulate camera operating conditions in the real world. First, we correlate the common placements of optical sensors, mainly focusing on cameras, in autonomous vehicles to naturally occurring environmental conditions in relation to temperature and humidity. With this correlation, we aim to provide an understanding of potential areas on the vehicle that may be more prone to environmental factors of thermal shock or humidity variations. Second, we examine the condensation and frosting mechanism and formation sequence on the vehicle surfaces (e.g., windshield and camera lenses), which is then used to determine the level of water on the lenses before the sensor vision is impeded. Third, we introduce and conceptualize machine learning models that can extract features by employing object detection algorithms that perform image restoration to reconstruct areas with deterioration despite the presence of the droplets or frosts on the camera. With this research, we aim to provide a better understanding of the potential caveats and algorithm solutions that can help the capability for autonomous driving even under extreme environmental conditions.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129541964","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In this paper, the thermal performances of a Chiplet module with different numbers of dies were studied. The Chiplet module was assumed to be placed in the same server system, with the same ambient condition, and using the same heat sink. A thermal simulation was conducted to obtain the junction temperatures of dies using different power magnitudes. With the change of power magnitudes of the dies, a thermal resistor matrix was calculated. Finally, with the calculation of the thermal resistor matrix, a unique power envelope plot was developed to determine if the power magnitudes of the chips on the Chiplet module caused any reliability concern. A risk factor was calculated to determine if the power magnitude of the die is within the safe region. With risk factors, we will be able to quantify the differences of applied powers with respect to the maximum allowed limits. We have expanded the usage of the power envelope plots to the Chiplet modules having more than three dies. The power envelope plots are a good tool for designers to optimize the power magnitudes, especially at the early stage of the Chiplet module design.
{"title":"Power Envelope Analysis for the Thermal Optimization of a Chiplet Module","authors":"E. Ouyang, Xiao Gu, Yonghyuk Jeong, Michael Liu","doi":"10.1115/ipack2022-97204","DOIUrl":"https://doi.org/10.1115/ipack2022-97204","url":null,"abstract":"\u0000 In this paper, the thermal performances of a Chiplet module with different numbers of dies were studied. The Chiplet module was assumed to be placed in the same server system, with the same ambient condition, and using the same heat sink. A thermal simulation was conducted to obtain the junction temperatures of dies using different power magnitudes. With the change of power magnitudes of the dies, a thermal resistor matrix was calculated. Finally, with the calculation of the thermal resistor matrix, a unique power envelope plot was developed to determine if the power magnitudes of the chips on the Chiplet module caused any reliability concern. A risk factor was calculated to determine if the power magnitude of the die is within the safe region. With risk factors, we will be able to quantify the differences of applied powers with respect to the maximum allowed limits. We have expanded the usage of the power envelope plots to the Chiplet modules having more than three dies. The power envelope plots are a good tool for designers to optimize the power magnitudes, especially at the early stage of the Chiplet module design.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134379281","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
F. McCluskey, Clifton Buxbaum, S. Mazumder, A. Sarwat, Matt Ursino, M. Russell
One of the most important elements for market acceptance of new technologies is ensuring reliability. Nowhere is this truer than in the shift from well characterized fossil fuel technologies to newer renewable and sustainable energy technologies. The key enabling technology driving these shifts is the development of power converters and inverters. Conventional approaches to assess reliability of these devices have severe drawbacks. Frequent redesigns, often with new parts having no historical data, limit the usefulness of methods based on historical data. Conversely, physics-of-failure approaches often do not capture the most relevant failure mechanisms, including those related to operationally induced electrical overstress and software. In this paper, we will discuss a revolutionary new reliability assessment approach that utilizes advancements in artificial intelligence (AI), machine learning, and data analytics, along with new techniques for characterizing and modeling failure mechanisms to improve power electronics reliability. The reliability assessment method combines AI and machine learning algorithms for analyzing field failure data, with top down models that translate the impacts of grid-connected and grid-parallel mode dynamics and mode-transition dynamics on power systems, and reliability physics degradation models for key failure mechanisms that simulate the effects of both electrical and environmental degradation under field operational stresses. These models can be embedded in digital twins created specifically to replicate the design of current and new inverters. The output of these digital twins reflects the effects of aging and component degradation on system performance and will be transferable to multiple power electronic systems and platforms.
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