Himanshu Modi, Pardeep Shahi, Lochan Sai Reddy Chinthaparthy, Gautam Gupta, Pratik V. Bansode, Vibin Shalom Simon, D. Agonafer
In recent years, there has been a significant increase in cloud computing, networking, virtualization, and storage applications, leading to an increase in demand for high-performance servers. The increase in performance demands is currently being met by increasing CPU and GPU power densities that require more efficient cooling technologies as compared to air traditional cooling methods. Cold plate-based liquid cooling in air-cooled servers enables efficient thermal management with minimal changes to existing air-cooling infrastructure. In a hybrid cooled server, the demand for air cooling is reduced as the primary heat-generating components are indirectly cooled by cold plates. In this study, experiments are performed with optimized chassis of a hybrid cooled Cisco C220 server. The chassis design is optimized to improve the airflow by providing additional vents on the chassis to allow more low-temperature airflow rather than the heated airflow approaching from the drive bay. Also, the design of the heat sink baffle is improved which allows a more streamlined flow to approach the heat sinks. This is done by designing and manufacturing a new 3-D printed baffle. This optimized baffle design helps in reducing the pressure drop across the system hence helping in the reduction of fan speeds and reducing the fan power consumption. Results are generated by iterating the fan speed and inlet temperature of air and comparing them with the baseline design of the server. Conclusions are made on the reduction in fan power due to the improved chassis design and any reduction in temperatures of air-cooled components.
{"title":"Experimental Investigation of the Impact of Improved Ducting and Chassis Re-Design of a Hybrid-Cooled Server","authors":"Himanshu Modi, Pardeep Shahi, Lochan Sai Reddy Chinthaparthy, Gautam Gupta, Pratik V. Bansode, Vibin Shalom Simon, D. Agonafer","doi":"10.1115/ipack2022-97587","DOIUrl":"https://doi.org/10.1115/ipack2022-97587","url":null,"abstract":"\u0000 In recent years, there has been a significant increase in cloud computing, networking, virtualization, and storage applications, leading to an increase in demand for high-performance servers. The increase in performance demands is currently being met by increasing CPU and GPU power densities that require more efficient cooling technologies as compared to air traditional cooling methods. Cold plate-based liquid cooling in air-cooled servers enables efficient thermal management with minimal changes to existing air-cooling infrastructure. In a hybrid cooled server, the demand for air cooling is reduced as the primary heat-generating components are indirectly cooled by cold plates. In this study, experiments are performed with optimized chassis of a hybrid cooled Cisco C220 server. The chassis design is optimized to improve the airflow by providing additional vents on the chassis to allow more low-temperature airflow rather than the heated airflow approaching from the drive bay. Also, the design of the heat sink baffle is improved which allows a more streamlined flow to approach the heat sinks. This is done by designing and manufacturing a new 3-D printed baffle. This optimized baffle design helps in reducing the pressure drop across the system hence helping in the reduction of fan speeds and reducing the fan power consumption. Results are generated by iterating the fan speed and inlet temperature of air and comparing them with the baseline design of the server. Conclusions are made on the reduction in fan power due to the improved chassis design and any reduction in temperatures of air-cooled components.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115272626","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
With the rapid growth of electric vehicles and hybrid electric vehicles, rigorous design targets in terms of cost, efficiency, and power density have been set for automotive power electronics. Novel power module and inverter technologies based on wide-bandgap semiconductors have been developed to meet these design targets. Compared with conventional cooling techniques, which are normally applied only on one side of the power module, a double-sided cooling approach enables higher power density and lower thermal resistance. In this work, we develop a three-phase power module that is double-side cooled using dielectric fluid jet impingement. In each phase, four silicon carbide power semiconductors are bonded to copper busbars without electrical insulation layers. A finite element analysis (FEA) model is created for thermal and thermomechanical analysis. Based on the modeling results, we develop a design space to correlate input and output parameters to generate response surfaces. We then use a multi-objective genetic algorithm-based optimization method to minimize the maximum junction temperature and thermal stresses within the power module. The multiphysics co-optimization approach enables an efficient design process of power modules with greatly reduced computational cost, as compared to conventional processes that rely on exhaustive numerical simulations and iterations.
{"title":"Multiphysics Co-Optimization Design and Analysis of a Double-Side-Cooled Silicon Carbide-Based Power Module","authors":"Xuhui Feng, G. Moreno, S. Narumanchi, P. Paret","doi":"10.1115/ipack2022-97355","DOIUrl":"https://doi.org/10.1115/ipack2022-97355","url":null,"abstract":"\u0000 With the rapid growth of electric vehicles and hybrid electric vehicles, rigorous design targets in terms of cost, efficiency, and power density have been set for automotive power electronics. Novel power module and inverter technologies based on wide-bandgap semiconductors have been developed to meet these design targets. Compared with conventional cooling techniques, which are normally applied only on one side of the power module, a double-sided cooling approach enables higher power density and lower thermal resistance.\u0000 In this work, we develop a three-phase power module that is double-side cooled using dielectric fluid jet impingement. In each phase, four silicon carbide power semiconductors are bonded to copper busbars without electrical insulation layers. A finite element analysis (FEA) model is created for thermal and thermomechanical analysis. Based on the modeling results, we develop a design space to correlate input and output parameters to generate response surfaces. We then use a multi-objective genetic algorithm-based optimization method to minimize the maximum junction temperature and thermal stresses within the power module. The multiphysics co-optimization approach enables an efficient design process of power modules with greatly reduced computational cost, as compared to conventional processes that rely on exhaustive numerical simulations and iterations.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125230358","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
C. Chhokar, G. B. Abadi, Nicholas McDaniel, Chris Botting, M. Bahrami
High-performance heat sinks are required for next-generation battery chargers to manage their ever-increasing power density. For chargers at the now upwards-shifted lower end of the power density spectrum, manufacturers still favor naturally-cooled heat sinks for their low cost, reliability, and simplicity. This study focuses on designing high-performance naturally-cooled heat sinks with continuous, segmented, inclined, and pin fins. A systematic numerical approach in ANSYS Fluent is used to model the heat sinks in three mounting orientations: horizontal, vertical, and sideways. Proposed heat sinks were developed using relevant literature on fin geometries to improve upon a provided, finned heat sink subjected to specified boundary conditions. The provided benchmark suffered from orientation-dependent performance, exhibiting its highest wall temperatures when installed sideways. Although intended to improve convective performance in the vertical orientation, fin segments marginally changed wall temperatures in this orientation. Instead, they considerably lowered them in the sideways orientation. The presence of gap flow, allowing some buoyancy-driven flow to span the width of the heat sink, lowered the average sideways-oriented wall temperature by about 3% compared to the benchmark. An arrangement of staggered pin fins furthered this improvement with a 5% drop in the average sideways-oriented wall temperature compared to the benchmark, albeit increasing the vertical orientation’s average wall temperature by about 2%. Our future work will look to gather experimental data for the specified heat sinks and boundary conditions.
{"title":"Naturally-Cooled Heat Sinks for Next-Generation Battery Chargers","authors":"C. Chhokar, G. B. Abadi, Nicholas McDaniel, Chris Botting, M. Bahrami","doi":"10.1115/ipack2022-98077","DOIUrl":"https://doi.org/10.1115/ipack2022-98077","url":null,"abstract":"\u0000 High-performance heat sinks are required for next-generation battery chargers to manage their ever-increasing power density. For chargers at the now upwards-shifted lower end of the power density spectrum, manufacturers still favor naturally-cooled heat sinks for their low cost, reliability, and simplicity. This study focuses on designing high-performance naturally-cooled heat sinks with continuous, segmented, inclined, and pin fins. A systematic numerical approach in ANSYS Fluent is used to model the heat sinks in three mounting orientations: horizontal, vertical, and sideways. Proposed heat sinks were developed using relevant literature on fin geometries to improve upon a provided, finned heat sink subjected to specified boundary conditions. The provided benchmark suffered from orientation-dependent performance, exhibiting its highest wall temperatures when installed sideways. Although intended to improve convective performance in the vertical orientation, fin segments marginally changed wall temperatures in this orientation. Instead, they considerably lowered them in the sideways orientation. The presence of gap flow, allowing some buoyancy-driven flow to span the width of the heat sink, lowered the average sideways-oriented wall temperature by about 3% compared to the benchmark. An arrangement of staggered pin fins furthered this improvement with a 5% drop in the average sideways-oriented wall temperature compared to the benchmark, albeit increasing the vertical orientation’s average wall temperature by about 2%. Our future work will look to gather experimental data for the specified heat sinks and boundary conditions.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"145 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116656997","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Deogratius Kisitu, Carol Caceres, M. Zlatinov, Denver Schaffarzick, A. Ortega
Stochastic cellular structured materials have been previously studied as enhanced surfaces for heat sinks used in cooling of modern electronics. Open-cell metallic foam has been shown to be an effective medium for gas-cooled and liquid-cooled heat sinks. Numerous studies exist for metal-foam cold plates using single phase water but there are few studies pertinent to two-phase evaporators. Because of the latent heat of vaporization and higher heat transfer coefficients, flow boiling is more efficient for cooling of high heat fluxes, as compared to single-phase flow. This paper presents an experimental study on the thermohydraulic performance of compressed and uncompressed copper foam evaporators using R134a refrigerant. The foam samples had the same starting pore size of 40 PPI and porosities of 0.62–0.91, with a heated footprint area of 25.4 × 25.4 mm and a height of 2.5 mm. Experiments were conducted for heat flux ranging from 7 to 174 W/cm2, with mass flux varying from 150 to 375 kg/m2s at fixed inlet saturation temperatures of 31 to 33 °C. Compressing the foam by up to 4X resulted in proportionally smaller effective hydraulic diameter, higher surface area per unit volume, higher metal volume fraction, and higher bulk thermal conductivity. The compressed foam results demonstrated up to three-times lower unit thermal resistance and improved critical heat flux. The apparent heat transfer coefficient in the tested compressed 4X foam evaporator maximized at exit vapor qualities of about 70 to 75%, and the pressure drop increased linearly with exit quality.
{"title":"Experimental Investigation of R134a Flow Boiling in Copper Foam Evaporators for High Heat Flux Electronics Cooling","authors":"Deogratius Kisitu, Carol Caceres, M. Zlatinov, Denver Schaffarzick, A. Ortega","doi":"10.1115/ipack2022-97400","DOIUrl":"https://doi.org/10.1115/ipack2022-97400","url":null,"abstract":"\u0000 Stochastic cellular structured materials have been previously studied as enhanced surfaces for heat sinks used in cooling of modern electronics. Open-cell metallic foam has been shown to be an effective medium for gas-cooled and liquid-cooled heat sinks. Numerous studies exist for metal-foam cold plates using single phase water but there are few studies pertinent to two-phase evaporators. Because of the latent heat of vaporization and higher heat transfer coefficients, flow boiling is more efficient for cooling of high heat fluxes, as compared to single-phase flow. This paper presents an experimental study on the thermohydraulic performance of compressed and uncompressed copper foam evaporators using R134a refrigerant. The foam samples had the same starting pore size of 40 PPI and porosities of 0.62–0.91, with a heated footprint area of 25.4 × 25.4 mm and a height of 2.5 mm. Experiments were conducted for heat flux ranging from 7 to 174 W/cm2, with mass flux varying from 150 to 375 kg/m2s at fixed inlet saturation temperatures of 31 to 33 °C. Compressing the foam by up to 4X resulted in proportionally smaller effective hydraulic diameter, higher surface area per unit volume, higher metal volume fraction, and higher bulk thermal conductivity. The compressed foam results demonstrated up to three-times lower unit thermal resistance and improved critical heat flux. The apparent heat transfer coefficient in the tested compressed 4X foam evaporator maximized at exit vapor qualities of about 70 to 75%, and the pressure drop increased linearly with exit quality.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"48 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122728334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
A. Heydari, Yaman M. Manaserh, Ahmad Abubakar, Carol Caceres, Harold Miyamura, A. Ortega, Jeremy Rodriguez
Due to the surge in electronics power density, single-phase liquid cooling technologies are emerging to replace legacy air-cooling technologies. However, this surge in electronics power densities is accelerating abruptly, which will cause a single-phase liquid cooling operational lifetime to be much shorter than air cooling. Accordingly, it is essential to look for alternative cooling technologies such as two-phase cooling to replace liquid cooling when its time is up. This work presents comprehensive analyses of two-phase rack-level cooling systems deployment. These analyses can be divided into three main categories which are benchtop testing, rack-level deployment, and choosing a green refrigerant replacement. On the benchtop part of the project, five different cold plates that have different internal geometry are considered. These cold plates are used to build cooling loops with various configurations namely parallel, serial, and hybrid (parallel and serial). An EES code is used to design and evaluate the cold plates and cooling loops based on the existing correlations and modeling techniques. To evaluate this code, a benchtop two-phase experimental setup is built. This setup is designed to test single cold plates and full cooling loops while maintaining system stability. In this setup, high-power-density TTVs with 2.5 kW rated heaters are used to test these cold plates and cooling loops. The work on the benchtop level is just a preparation stage for the rack level deployment, where a custom-built CDU distributes refrigerant to the cooling loops through rack and row manifolds. These cooling loops are placed in multiple racks and attached to TTVs to simulate the thermal load of high-power density servers. In this part of the study, some design perspectives are introduced, and the impact of different operational parameters on CDU performance is explored. The last part of this study discusses the criteria for choosing a green refrigerant to replace existing high GWP ones. Most commonly used refrigerants such as R134a are expected to be phased out very soon due to their high GWP. Therefore, it is necessary to look for an alternative green refrigerant that can be adopted in the system without significantly impacting its performance. Preliminary results showed that R1234yf is the most appropriate replacement for R134a in two-phase rack-level cooling systems.
{"title":"Direct-to-Chip Two-Phase Cooling for High Heat Flux Processors","authors":"A. Heydari, Yaman M. Manaserh, Ahmad Abubakar, Carol Caceres, Harold Miyamura, A. Ortega, Jeremy Rodriguez","doi":"10.1115/ipack2022-97047","DOIUrl":"https://doi.org/10.1115/ipack2022-97047","url":null,"abstract":"\u0000 Due to the surge in electronics power density, single-phase liquid cooling technologies are emerging to replace legacy air-cooling technologies. However, this surge in electronics power densities is accelerating abruptly, which will cause a single-phase liquid cooling operational lifetime to be much shorter than air cooling. Accordingly, it is essential to look for alternative cooling technologies such as two-phase cooling to replace liquid cooling when its time is up. This work presents comprehensive analyses of two-phase rack-level cooling systems deployment. These analyses can be divided into three main categories which are benchtop testing, rack-level deployment, and choosing a green refrigerant replacement. On the benchtop part of the project, five different cold plates that have different internal geometry are considered. These cold plates are used to build cooling loops with various configurations namely parallel, serial, and hybrid (parallel and serial). An EES code is used to design and evaluate the cold plates and cooling loops based on the existing correlations and modeling techniques. To evaluate this code, a benchtop two-phase experimental setup is built. This setup is designed to test single cold plates and full cooling loops while maintaining system stability. In this setup, high-power-density TTVs with 2.5 kW rated heaters are used to test these cold plates and cooling loops. The work on the benchtop level is just a preparation stage for the rack level deployment, where a custom-built CDU distributes refrigerant to the cooling loops through rack and row manifolds. These cooling loops are placed in multiple racks and attached to TTVs to simulate the thermal load of high-power density servers. In this part of the study, some design perspectives are introduced, and the impact of different operational parameters on CDU performance is explored. The last part of this study discusses the criteria for choosing a green refrigerant to replace existing high GWP ones. Most commonly used refrigerants such as R134a are expected to be phased out very soon due to their high GWP. Therefore, it is necessary to look for an alternative green refrigerant that can be adopted in the system without significantly impacting its performance. Preliminary results showed that R1234yf is the most appropriate replacement for R134a in two-phase rack-level cooling systems.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122789658","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Enzo M. Minazzo, Gautier Rouaze, J. Marcinichen, J. R. Thome, L. Zhang
A very compact air-cooled loop thermosyphon cooling system (LTS) was designed, prototyped and tested for microprocessor cooling application. It was designed specifically for 2U servers and heat loads up to 400 W in a footprint area of 40 mm per 40 mm. The low pressure and low GWP working fluid R1233zd(E) was used. Tests were done for two ambient temperatures (22 °C and 40 °C) and included optimal charge determination as well as extensive tests at optimal charge. Values of performance ratio, simply defined as heat load divided by fan power consumption, higher than 30 were observed for the maximum heat load of 400 W. The experimental results were also used to validate JJ Cooling Innovation’s inhouse proprietary solver developed to design the LTS and results will be presented.
{"title":"Compact and Highly Thermal-Hydraulic Efficient Air-Cooled Closed Loop Thermosyphon Cooling System for High Intense Heat Load Dissipation of Future Microprocessors","authors":"Enzo M. Minazzo, Gautier Rouaze, J. Marcinichen, J. R. Thome, L. Zhang","doi":"10.1115/ipack2022-97364","DOIUrl":"https://doi.org/10.1115/ipack2022-97364","url":null,"abstract":"\u0000 A very compact air-cooled loop thermosyphon cooling system (LTS) was designed, prototyped and tested for microprocessor cooling application. It was designed specifically for 2U servers and heat loads up to 400 W in a footprint area of 40 mm per 40 mm. The low pressure and low GWP working fluid R1233zd(E) was used. Tests were done for two ambient temperatures (22 °C and 40 °C) and included optimal charge determination as well as extensive tests at optimal charge. Values of performance ratio, simply defined as heat load divided by fan power consumption, higher than 30 were observed for the maximum heat load of 400 W. The experimental results were also used to validate JJ Cooling Innovation’s inhouse proprietary solver developed to design the LTS and results will be presented.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117019358","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Shidong Li, Bakul Parikh, Chelsea Savoy, D. Kuchta, G. Jutras, H. Bagheri, H. Toy, Joe Ross, Kenichi Akasofu, M. Kapfhammer, Mark Schultz, Steven Ostrander, T. Wassick
Fiber optic interconnect provides unique advantage over to copper signaling including: 1) Optical links are more capable of transmitting high speed signals over a longer distance than copper cable. The latter usually requires high power for distant transmission. 2) Low power optic interface enables to lower the overall system power. 3) Higher input/output density can be achieved through optical fibers than copper wires. Optical transceivers are typically designed for integration at printed circuit boards (PCB) level. However, driving signal from packaged processor chip, through processor interconnect and across PCB causes significant signal integrity challenges. Co-packaging solution with the optical transceiver integrated on processor module and with direct-to-substrate cabling enables high-speed signals by avoiding the PCB altogether. The challenge lies in adapting the optical transceiver for compatibility with the processor module structure, as well as the environmental exposures of both the processor module bond and assembly process and system application condition. This paper focuses on the assembly, characterization, and reliability stress results of an array of optical transceivers co-packaged within single chip processor module. The co-package studied is a 76.5mm × 68.5mm flip chip packaging with 4 or 5 optical transceivers assembled on the chip carrier substrate. A chip package interaction (CPI) test chip was mounted on laminate along with the connectors using traditional bond and assembly (BA) processes and fixtures. This was followed by lidding with a Thermal Interface Material (TIM) between the test chip and copper heat spreader, and a separate TIM between optical transceivers and heat spreader, and an elastomer structural bond between the laminate and the heat spreader. The co-packaged module was then tested, land grid array (LGA) socketed to a thermal card for power and signal connection. Examination of the thermal performance and structural integrity after 1000 cycles of deep thermal cycling (DTC), Shock and Vibration (S&V), Temperature and Humidity testing, and High Temperature Storage (HTS) will be discussed. Characterization and construction analysis of the package, and model and data comparison with traditional packages will be presented.
{"title":"Feasibility Demonstration of Server Chip Package With Direct-to-Chip Optical Transceivers","authors":"Shidong Li, Bakul Parikh, Chelsea Savoy, D. Kuchta, G. Jutras, H. Bagheri, H. Toy, Joe Ross, Kenichi Akasofu, M. Kapfhammer, Mark Schultz, Steven Ostrander, T. Wassick","doi":"10.1115/ipack2022-97455","DOIUrl":"https://doi.org/10.1115/ipack2022-97455","url":null,"abstract":"\u0000 Fiber optic interconnect provides unique advantage over to copper signaling including: 1) Optical links are more capable of transmitting high speed signals over a longer distance than copper cable. The latter usually requires high power for distant transmission. 2) Low power optic interface enables to lower the overall system power. 3) Higher input/output density can be achieved through optical fibers than copper wires.\u0000 Optical transceivers are typically designed for integration at printed circuit boards (PCB) level. However, driving signal from packaged processor chip, through processor interconnect and across PCB causes significant signal integrity challenges. Co-packaging solution with the optical transceiver integrated on processor module and with direct-to-substrate cabling enables high-speed signals by avoiding the PCB altogether. The challenge lies in adapting the optical transceiver for compatibility with the processor module structure, as well as the environmental exposures of both the processor module bond and assembly process and system application condition.\u0000 This paper focuses on the assembly, characterization, and reliability stress results of an array of optical transceivers co-packaged within single chip processor module. The co-package studied is a 76.5mm × 68.5mm flip chip packaging with 4 or 5 optical transceivers assembled on the chip carrier substrate. A chip package interaction (CPI) test chip was mounted on laminate along with the connectors using traditional bond and assembly (BA) processes and fixtures. This was followed by lidding with a Thermal Interface Material (TIM) between the test chip and copper heat spreader, and a separate TIM between optical transceivers and heat spreader, and an elastomer structural bond between the laminate and the heat spreader.\u0000 The co-packaged module was then tested, land grid array (LGA) socketed to a thermal card for power and signal connection. Examination of the thermal performance and structural integrity after 1000 cycles of deep thermal cycling (DTC), Shock and Vibration (S&V), Temperature and Humidity testing, and High Temperature Storage (HTS) will be discussed. Characterization and construction analysis of the package, and model and data comparison with traditional packages will be presented.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"178 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116342429","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Wearable electronics have garnered much attention owing to benefits such as closer integration of form with function, flexibility, and light-weighting. Power sources used with FHE may be subject to dynamic flexing in addition to flex-to-install during the usage life of the product. While thick block batteries have been studied extensively in prior research — the impact of stresses of daily motion on the state of health degradation of thin-flexible batteries in conjunction with the use parameters is not well understood. Use conditions, including storage duration, operating temperature, flexing frequency, interval, and flex radius, might vary. Machine learning (ML) methods are needed prediction of state-of-health (SOH) degradation of the battery in various environmental conditions. It is not cost-effective to measure battery response in every condition, while the ANN ML might be able to assess conditions not previously measured. In this regard, it is expected that the ANN might be able to train the simulation. In this study, the simulation of SOH degradation on charging/discharging the flexible battery in dynamic folding, twisting and static folding with a calendar-aged battery in high temperature have been conducted. Accordingly, the ANN ML model has been trained with the simulation datasets to substitute the simulation. The generated data will be used for cross-validation of ML model and simulation for the battery life prediction. There is an expectation that such a combined method for data analysis might be helpful for time efficiency and cost reduction of research.
{"title":"ANN Based Assessment of State-of-Health Reliability of Flexible Li-Ion Batteries Under Dynamic Flexing and Calendar Aging","authors":"P. Lall, Hye-Yoen Jang","doi":"10.1115/ipack2022-97431","DOIUrl":"https://doi.org/10.1115/ipack2022-97431","url":null,"abstract":"\u0000 Wearable electronics have garnered much attention owing to benefits such as closer integration of form with function, flexibility, and light-weighting. Power sources used with FHE may be subject to dynamic flexing in addition to flex-to-install during the usage life of the product. While thick block batteries have been studied extensively in prior research — the impact of stresses of daily motion on the state of health degradation of thin-flexible batteries in conjunction with the use parameters is not well understood. Use conditions, including storage duration, operating temperature, flexing frequency, interval, and flex radius, might vary. Machine learning (ML) methods are needed prediction of state-of-health (SOH) degradation of the battery in various environmental conditions. It is not cost-effective to measure battery response in every condition, while the ANN ML might be able to assess conditions not previously measured. In this regard, it is expected that the ANN might be able to train the simulation. In this study, the simulation of SOH degradation on charging/discharging the flexible battery in dynamic folding, twisting and static folding with a calendar-aged battery in high temperature have been conducted. Accordingly, the ANN ML model has been trained with the simulation datasets to substitute the simulation. The generated data will be used for cross-validation of ML model and simulation for the battery life prediction. There is an expectation that such a combined method for data analysis might be helpful for time efficiency and cost reduction of research.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126406548","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
P. Lall, Yunli Zhang, J. Suhling, J. Williamson, P. Thompson
Dynamic mechanical analysis such as tension test allows for studying the fatigue failure of polymer materials. By increasing the dynamic strain or stress amplitude, the fatigue and failure of material could be characterized. Silica-filled epoxy molding compounds are widely used in modern electronic industry, to protect the silicon chip from mechanical, chemical and thermal effects. There is insufficient information on fatigure reliability of plastic encapsulated electronic components capable of surviving high temperatures for long periods (>100,000 hours). In this paper, the details of the procedure for fatigue effect measurement are described. Feddersen’s approach for fracture toughness test method is applied. Low cycle fatigue is investigated for pristine samples. The aging effects of a number of epoxy molding compounds subjected to sustained high-temperature long-term aging have been studied. Two popular molding compounds, EMC-1 and EMC-2, are studied under three aging temperatures: 100C, below the glass transition temperature, and 150 °C, above the glass transition temperature, from pristine to 120 days aging. The crack propagation under constant or increasing stress or strain has been recorded and discussed.
{"title":"Characterization of Fatigue Crack Growth of Epoxy Molding Compounds Under High-Temperature Long-Term Aging","authors":"P. Lall, Yunli Zhang, J. Suhling, J. Williamson, P. Thompson","doi":"10.1115/ipack2022-97453","DOIUrl":"https://doi.org/10.1115/ipack2022-97453","url":null,"abstract":"\u0000 Dynamic mechanical analysis such as tension test allows for studying the fatigue failure of polymer materials. By increasing the dynamic strain or stress amplitude, the fatigue and failure of material could be characterized. Silica-filled epoxy molding compounds are widely used in modern electronic industry, to protect the silicon chip from mechanical, chemical and thermal effects. There is insufficient information on fatigure reliability of plastic encapsulated electronic components capable of surviving high temperatures for long periods (>100,000 hours). In this paper, the details of the procedure for fatigue effect measurement are described. Feddersen’s approach for fracture toughness test method is applied. Low cycle fatigue is investigated for pristine samples. The aging effects of a number of epoxy molding compounds subjected to sustained high-temperature long-term aging have been studied. Two popular molding compounds, EMC-1 and EMC-2, are studied under three aging temperatures: 100C, below the glass transition temperature, and 150 °C, above the glass transition temperature, from pristine to 120 days aging. The crack propagation under constant or increasing stress or strain has been recorded and discussed.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"4 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132130753","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Adrian Jourdan, Alexander Sarvadi, H. Siller, H. Bostanci
This study focuses on a topology-based design approach that can be applied to liquid-cooled heat sinks for high-heat-flux devices with the goal of improving heat dissipation and manufacturability. Specifically, the study investigates the use of additively manufactured topology-based lattice structures for the practicality and flexibility (of varying topology parameters) of complicated structures to achieve high heat transfer performance. The design restrictions were set such that the heat sink would occupy a 25 mm × 25 mm × 8 mm space and attach on a matching size heater. A gyroid lattice structure with high cell volume allowing high fluid flow rate was chosen to test its printability and its effects on heat transfer. Using computational iterative routines to modify lattice structures allowed changing parameters including gyroid cell size, y-mapping, thickness of fins, overall dimensions, and other parameters. Prototype of the heat sink design was made of aluminum alloy (AlSi10Mg) by additive manufacturing process (laser powder bed fusion). Experimental investigation involved testing additively manufactured heat sink on a ceramic (AlN) heater at varying heat loads and flow rates, and measuring corresponding heater temperature to calculate thermal resistance. Results suggest that although further design and validation efforts are needed to fully assess the capabilities, the topology-based, additively manufactured liquid-cooled heat sinks would potentially offer a promising alternative in terms of heat transfer and fluid flow characteristics, as well as manufacturability, and reduced weight, material usage, and production cost.
{"title":"Additively Manufactured Liquid-Cooled Heat Sink: Gyroid-Based Design, Fabrication, and Testing","authors":"Adrian Jourdan, Alexander Sarvadi, H. Siller, H. Bostanci","doi":"10.1115/ipack2022-97476","DOIUrl":"https://doi.org/10.1115/ipack2022-97476","url":null,"abstract":"\u0000 This study focuses on a topology-based design approach that can be applied to liquid-cooled heat sinks for high-heat-flux devices with the goal of improving heat dissipation and manufacturability. Specifically, the study investigates the use of additively manufactured topology-based lattice structures for the practicality and flexibility (of varying topology parameters) of complicated structures to achieve high heat transfer performance. The design restrictions were set such that the heat sink would occupy a 25 mm × 25 mm × 8 mm space and attach on a matching size heater. A gyroid lattice structure with high cell volume allowing high fluid flow rate was chosen to test its printability and its effects on heat transfer. Using computational iterative routines to modify lattice structures allowed changing parameters including gyroid cell size, y-mapping, thickness of fins, overall dimensions, and other parameters. Prototype of the heat sink design was made of aluminum alloy (AlSi10Mg) by additive manufacturing process (laser powder bed fusion). Experimental investigation involved testing additively manufactured heat sink on a ceramic (AlN) heater at varying heat loads and flow rates, and measuring corresponding heater temperature to calculate thermal resistance. Results suggest that although further design and validation efforts are needed to fully assess the capabilities, the topology-based, additively manufactured liquid-cooled heat sinks would potentially offer a promising alternative in terms of heat transfer and fluid flow characteristics, as well as manufacturability, and reduced weight, material usage, and production cost.","PeriodicalId":117260,"journal":{"name":"ASME 2022 International Technical Conference and Exhibition on Packaging and Integration of Electronic and Photonic Microsystems","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2022-10-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130029907","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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