Pub Date : 1900-01-01DOI: 10.1109/MICROCOM.2016.7522547
Sneha Dalvi, Shishir D. Jagtap, Vijaypal Yadav, Rajivkumar Gupta
This paper presents a high gain wide band 2×2 microstrip array antenna. The microstrip array antenna (MSA) is fabricated on inexpensive FR4 substrate and placed 1mm above ground plane to improve the bandwidth and efficiency of the antenna. A reactive impedance surface (RIS) consisting of 13×13 array of 4 mm square patches with inter-element spacing of 1 mm is fabricated on the bottom side of FR4 substrate. RIS reduces the coupling between the ground plane and MSA array and therefore increases the efficiency of antenna. It enhances the bandwidth and gain of the antenna. RIS also helps in reduction of SLL and cross polarization. This MSA array with RIS is place in a Fabry Perot cavity (FPC) resonator to enhance the gain of the antenna. 2×2 and 4×4 array of square parasitic patches are fed by MSA array fabricated on a FR4 superstrate which forms the partially reflecting surface of FPC. The FR4 superstrate layer is supported with help of dielectric rods at the edges with air at about λ0/2 from ground plane. A microstrip feed line network is designed and the printed MSA array is fed by a 50 Ω coaxial probe. The VSWR is <; 2 is obtained over 5.725-6.4 GHz, which covers 5.725-5.875 GHz ISM WLAN frequency band and 5.9-6.4 GHz satellite uplink C band. The antenna gain increases from 12 dB to 15.8 dB as 4×4 square parasitic patches are fabricated on superstrate layer. The gain variation is less than 2 dB over the entire band. The antenna structure provides SLL and cross polarization less than -2ο dB, front to back lobe ratio higher than 20 dB and more than 70 % antenna efficiency. A prototype structure is realized and tested. The measured results satisfy with the simulation results. The antenna can be a suitable candidate for access point, satellite communication, mobile base station antenna and terrestrial communication system.
{"title":"High gain wideband 2×2 microstrip array antenna using RIS and Fabry Perot Cavity resonator","authors":"Sneha Dalvi, Shishir D. Jagtap, Vijaypal Yadav, Rajivkumar Gupta","doi":"10.1109/MICROCOM.2016.7522547","DOIUrl":"https://doi.org/10.1109/MICROCOM.2016.7522547","url":null,"abstract":"This paper presents a high gain wide band 2×2 microstrip array antenna. The microstrip array antenna (MSA) is fabricated on inexpensive FR4 substrate and placed 1mm above ground plane to improve the bandwidth and efficiency of the antenna. A reactive impedance surface (RIS) consisting of 13×13 array of 4 mm square patches with inter-element spacing of 1 mm is fabricated on the bottom side of FR4 substrate. RIS reduces the coupling between the ground plane and MSA array and therefore increases the efficiency of antenna. It enhances the bandwidth and gain of the antenna. RIS also helps in reduction of SLL and cross polarization. This MSA array with RIS is place in a Fabry Perot cavity (FPC) resonator to enhance the gain of the antenna. 2×2 and 4×4 array of square parasitic patches are fed by MSA array fabricated on a FR4 superstrate which forms the partially reflecting surface of FPC. The FR4 superstrate layer is supported with help of dielectric rods at the edges with air at about λ0/2 from ground plane. A microstrip feed line network is designed and the printed MSA array is fed by a 50 Ω coaxial probe. The VSWR is <; 2 is obtained over 5.725-6.4 GHz, which covers 5.725-5.875 GHz ISM WLAN frequency band and 5.9-6.4 GHz satellite uplink C band. The antenna gain increases from 12 dB to 15.8 dB as 4×4 square parasitic patches are fabricated on superstrate layer. The gain variation is less than 2 dB over the entire band. The antenna structure provides SLL and cross polarization less than -2ο dB, front to back lobe ratio higher than 20 dB and more than 70 % antenna efficiency. A prototype structure is realized and tested. The measured results satisfy with the simulation results. The antenna can be a suitable candidate for access point, satellite communication, mobile base station antenna and terrestrial communication system.","PeriodicalId":118902,"journal":{"name":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129357734","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/MICROCOM.2016.7522593
Vandana Jha, N. Manjunath, P. D. Shenoy, K. Venugopal
In the last few years, electronic documents have been the main source of data in many research areas like Web Mining, Information Retrieval, Artificial Intelligence, Natural Language Processing etc. Text Processing plays a vital role for processing structured or unstructured data from the web. Preprocessing is the main step in any text processing systems. One significant preprocessing technique is the elimination of functional words, also known as stopwords, which affects the performance of text processing tasks. An efficient stopword removal technique is required in all text processing tasks. In this paper, we are proposing a stopword removal algorithm for Hindi Language which is using the concept of a Deterministic Finite Automata (DFA). A large number of available works on stopword removal techniques are based on dictionary containing stopword lists. Then pattern matching technique is applied and the matched patterns, which is a stopword, is removed from the document. It is a time consuming task as searching process takes a long time. This makes the method inefficient and very expensive. In comparison of that, our algorithm has been tested on 200 documents and achieved 99% accuracy and also time efficient.
{"title":"HSRA: Hindi stopword removal algorithm","authors":"Vandana Jha, N. Manjunath, P. D. Shenoy, K. Venugopal","doi":"10.1109/MICROCOM.2016.7522593","DOIUrl":"https://doi.org/10.1109/MICROCOM.2016.7522593","url":null,"abstract":"In the last few years, electronic documents have been the main source of data in many research areas like Web Mining, Information Retrieval, Artificial Intelligence, Natural Language Processing etc. Text Processing plays a vital role for processing structured or unstructured data from the web. Preprocessing is the main step in any text processing systems. One significant preprocessing technique is the elimination of functional words, also known as stopwords, which affects the performance of text processing tasks. An efficient stopword removal technique is required in all text processing tasks. In this paper, we are proposing a stopword removal algorithm for Hindi Language which is using the concept of a Deterministic Finite Automata (DFA). A large number of available works on stopword removal techniques are based on dictionary containing stopword lists. Then pattern matching technique is applied and the matched patterns, which is a stopword, is removed from the document. It is a time consuming task as searching process takes a long time. This makes the method inefficient and very expensive. In comparison of that, our algorithm has been tested on 200 documents and achieved 99% accuracy and also time efficient.","PeriodicalId":118902,"journal":{"name":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","volume":"40 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129485920","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/MICROCOM.2016.7522491
Adarsh Jain, R. K. Bahl, A. Banik
Photonic generation of microwave signals is a novel and very attractive for application such as radio-over-fiber for wireless communication, broadband wireless access networks, radar and satellite communications. Photonic microwave frequency multiplication based on external intensity modulation has been considered as an effective solution for frequency tunable microwave and millimeter wave signal generation. In this paper, we analyze and demonstrate a technique for photonically assisted microwave frequency quadrupling. A theoretical analysis to achieve the microwave frequency quadrupling using two cascaded Mach-Zehnder modulators is presented. By this technique, a four-fold microwave or millimeter wave signal are photonically generated without the need for an electrical or optical filter. The detailed simulations are presented in electrical and optical domain to investigate the performance of the developed technique. We have demonstrated experimentally the implementation of a microwave frequency quadrupler in the frequency range of 24 GHz to 34 GHz. The generated microwave signal has a very narrow linewidth along with the feature of wideband frequency tunability.
{"title":"Microwave frequency quadrupling based on optical intensity modulation","authors":"Adarsh Jain, R. K. Bahl, A. Banik","doi":"10.1109/MICROCOM.2016.7522491","DOIUrl":"https://doi.org/10.1109/MICROCOM.2016.7522491","url":null,"abstract":"Photonic generation of microwave signals is a novel and very attractive for application such as radio-over-fiber for wireless communication, broadband wireless access networks, radar and satellite communications. Photonic microwave frequency multiplication based on external intensity modulation has been considered as an effective solution for frequency tunable microwave and millimeter wave signal generation. In this paper, we analyze and demonstrate a technique for photonically assisted microwave frequency quadrupling. A theoretical analysis to achieve the microwave frequency quadrupling using two cascaded Mach-Zehnder modulators is presented. By this technique, a four-fold microwave or millimeter wave signal are photonically generated without the need for an electrical or optical filter. The detailed simulations are presented in electrical and optical domain to investigate the performance of the developed technique. We have demonstrated experimentally the implementation of a microwave frequency quadrupler in the frequency range of 24 GHz to 34 GHz. The generated microwave signal has a very narrow linewidth along with the feature of wideband frequency tunability.","PeriodicalId":118902,"journal":{"name":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","volume":"61 16 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123393152","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Recently, Scientists needs to know the behavior of human sperm for proper diagnosis in Gymnocology problem. In this paper, we introduced an algorithm for tracking and detecting multi-moving human sperm using wavelet threshold in a improved version. Initially the captured images are filtered by a wavelet denoising approach. Then a combination method of mixture of Gaussian method as background subtraction with synchronized frame difference is developed with high detection rate. The simulation results demonstrate that the proposed algorithm is capable of tracking the sperm, which helps in analysis for proper diagnosis in infertility.
{"title":"A gynocology problem solution by tracking multi moving human sperm using wavelet based mixture of Gaussian approach","authors":"Sushil Kumar Mahapatra, Sumant Kumar Mohapatra, Sakuntala Mahapatra, Sumit Ghosh","doi":"10.1109/MICROCOM.2016.7522416","DOIUrl":"https://doi.org/10.1109/MICROCOM.2016.7522416","url":null,"abstract":"Recently, Scientists needs to know the behavior of human sperm for proper diagnosis in Gymnocology problem. In this paper, we introduced an algorithm for tracking and detecting multi-moving human sperm using wavelet threshold in a improved version. Initially the captured images are filtered by a wavelet denoising approach. Then a combination method of mixture of Gaussian method as background subtraction with synchronized frame difference is developed with high detection rate. The simulation results demonstrate that the proposed algorithm is capable of tracking the sperm, which helps in analysis for proper diagnosis in infertility.","PeriodicalId":118902,"journal":{"name":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114735944","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/MICROCOM.2016.7522576
A. Yadav, S. Tripathi
A Mobile Ad-hoc networks (MANETs) is composed of Mobile Nodes without any fixed infrastructure. Multicast routing in mobile Ad-hoc networks (MANETs) have many defiance due to implicit characteristics of the network such as node mobility, reliability, finite network resources etc. So, in this paper we have introduced a new scheme to improve the performance and efficiency of multicast routing protocols. Our proposed scheme is called multicast routing using limited flooding mechanism. This mechanism is integrated over MAODV which enhance the multicast routing efficiency. This mechanism manages the data packets flow based on delay characteristics of the contributing nodes. In proposed scheme only the nodes that satisfy the delay requirement can only flow the data packets from source node to a multicast receivers. The proposed scheme calculates the various types of delay such as transmission delay and propagation delay on each contributing mobile nodes to establish the multicast routes. This scheme is inspired by studied some implicit lacks of existing multicast routing protocols such as: weak robustness of dynamic topology, low reliability, low scalability, lack of QoS (Quality of Service) support, less packet delivery ratio and high packet delivery delay.
{"title":"Design of efficient multicast routing protocol using limited flooding mechanism","authors":"A. Yadav, S. Tripathi","doi":"10.1109/MICROCOM.2016.7522576","DOIUrl":"https://doi.org/10.1109/MICROCOM.2016.7522576","url":null,"abstract":"A Mobile Ad-hoc networks (MANETs) is composed of Mobile Nodes without any fixed infrastructure. Multicast routing in mobile Ad-hoc networks (MANETs) have many defiance due to implicit characteristics of the network such as node mobility, reliability, finite network resources etc. So, in this paper we have introduced a new scheme to improve the performance and efficiency of multicast routing protocols. Our proposed scheme is called multicast routing using limited flooding mechanism. This mechanism is integrated over MAODV which enhance the multicast routing efficiency. This mechanism manages the data packets flow based on delay characteristics of the contributing nodes. In proposed scheme only the nodes that satisfy the delay requirement can only flow the data packets from source node to a multicast receivers. The proposed scheme calculates the various types of delay such as transmission delay and propagation delay on each contributing mobile nodes to establish the multicast routes. This scheme is inspired by studied some implicit lacks of existing multicast routing protocols such as: weak robustness of dynamic topology, low reliability, low scalability, lack of QoS (Quality of Service) support, less packet delivery ratio and high packet delivery delay.","PeriodicalId":118902,"journal":{"name":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","volume":"78 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128147818","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/MICROCOM.2016.7522532
S. R. Kasjoo, M. M. Ramli, M. Isa, S. S. Mat Isa, N. Khalid, N. Mohd Noor, N. Ahmad, A. Singh
Graphene has excellent properties that are useful in many electronic device applications. In this report, a mechanical exfoliation method has been used to fabricate a field-effect device based on a thin film of few-layer graphene (FLG). The occurrence of p-doping and hysteresis in the current-voltage behavior was observed and characterized. The possible reasons for this observation were explained and discussed in terms of the sensitivity of graphene to the atmosphere and its surrounding conditions which can cause some effects on the charged carriers in the device.
{"title":"Hysteresis in a field-effect device based on an exfoliated thin film of few-layer graphene","authors":"S. R. Kasjoo, M. M. Ramli, M. Isa, S. S. Mat Isa, N. Khalid, N. Mohd Noor, N. Ahmad, A. Singh","doi":"10.1109/MICROCOM.2016.7522532","DOIUrl":"https://doi.org/10.1109/MICROCOM.2016.7522532","url":null,"abstract":"Graphene has excellent properties that are useful in many electronic device applications. In this report, a mechanical exfoliation method has been used to fabricate a field-effect device based on a thin film of few-layer graphene (FLG). The occurrence of p-doping and hysteresis in the current-voltage behavior was observed and characterized. The possible reasons for this observation were explained and discussed in terms of the sensitivity of graphene to the atmosphere and its surrounding conditions which can cause some effects on the charged carriers in the device.","PeriodicalId":118902,"journal":{"name":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","volume":"35 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133939257","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/MICROCOM.2016.7522498
Astha Sharma
Matched Subspace Detector (MSD) is a robust detection scheme used for detection of the target primary user signal buried in high-dimensional noise where the target signal is assumed to be placed in low-rank subspace. In this paper we attempt to present the benefits of MSD detector by providing the performance comparison with some other existing blind signal detection techniques and further confirmed detector performance on varying signal dimension and false alarm probabilities. For the scenario when the subspace estimation is done from finite, noisy, signal-bearing training data we propose to use information theoretic criteria (ITC) which highlights the importance of using a critical number of informative components which depends on training phase SNR, system dimension and number of training samples.
{"title":"Performance characterization of matched subspace detector for spectrum sensing","authors":"Astha Sharma","doi":"10.1109/MICROCOM.2016.7522498","DOIUrl":"https://doi.org/10.1109/MICROCOM.2016.7522498","url":null,"abstract":"Matched Subspace Detector (MSD) is a robust detection scheme used for detection of the target primary user signal buried in high-dimensional noise where the target signal is assumed to be placed in low-rank subspace. In this paper we attempt to present the benefits of MSD detector by providing the performance comparison with some other existing blind signal detection techniques and further confirmed detector performance on varying signal dimension and false alarm probabilities. For the scenario when the subspace estimation is done from finite, noisy, signal-bearing training data we propose to use information theoretic criteria (ITC) which highlights the importance of using a critical number of informative components which depends on training phase SNR, system dimension and number of training samples.","PeriodicalId":118902,"journal":{"name":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131592425","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/MICROCOM.2016.7522523
R. Abhilash, S. Dubey, M. Chinnaiah
Arithmetic operations are becoming a bigger concern in the digital system for applications like ALU (Arithmetic and Logic Unit) and DSP (Digital Signal Processing). Our work focuses on novel 4-2 and 5-2 Compressors(CM) applied in multiplication architectures such as Unsigned Wallace tree multiplier, Vedic mathematics using Urdhva Triyakbyam sutra, and Signed Baugh-Wooley Wallace tree multiplier, Signed Booth with Radix 2 and Radix 4. The proposed compressors architectures have shown better results when compared with the existing compressors. The ASIC design Implementation was done using Standard cell 180nm CMOS technology and the Verilog HDL code is tested in Xilinx tool, with the help of ISE Simulator (ISim).
{"title":"ASIC design of signed and unsigned multipliers using compressors","authors":"R. Abhilash, S. Dubey, M. Chinnaiah","doi":"10.1109/MICROCOM.2016.7522523","DOIUrl":"https://doi.org/10.1109/MICROCOM.2016.7522523","url":null,"abstract":"Arithmetic operations are becoming a bigger concern in the digital system for applications like ALU (Arithmetic and Logic Unit) and DSP (Digital Signal Processing). Our work focuses on novel 4-2 and 5-2 Compressors(CM) applied in multiplication architectures such as Unsigned Wallace tree multiplier, Vedic mathematics using Urdhva Triyakbyam sutra, and Signed Baugh-Wooley Wallace tree multiplier, Signed Booth with Radix 2 and Radix 4. The proposed compressors architectures have shown better results when compared with the existing compressors. The ASIC design Implementation was done using Standard cell 180nm CMOS technology and the Verilog HDL code is tested in Xilinx tool, with the help of ISE Simulator (ISim).","PeriodicalId":118902,"journal":{"name":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","volume":"64 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131627250","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/MICROCOM.2016.7522505
Himani Kala, K. Sandhu
For proper utilization of wind energy it is necessary to drive the wind turbine at maximum power points at all wind speeds. Speed control of rotor is done within the operating range of wind turbines for maximum power point tracking(MPPT). Controllers are used depending upon the range within which the control of rotor angular velocity is required and this range varies for various turbines. Smaller range for rotor speed control supports the economy of controllers. So, for a particular wind energy location, selection of wind turbine should be done in such a manner that it requires minimum speed control to track maximum power during wind variations. In this paper an attempt has been made to analyze the performance of wind turbines for MPPT. Simulation results using MATLAB coding are found to be effective to propose few recommendations for the selection of wind turbines suitable for MPPT.
{"title":"Selection of wind turbine for MPPT","authors":"Himani Kala, K. Sandhu","doi":"10.1109/MICROCOM.2016.7522505","DOIUrl":"https://doi.org/10.1109/MICROCOM.2016.7522505","url":null,"abstract":"For proper utilization of wind energy it is necessary to drive the wind turbine at maximum power points at all wind speeds. Speed control of rotor is done within the operating range of wind turbines for maximum power point tracking(MPPT). Controllers are used depending upon the range within which the control of rotor angular velocity is required and this range varies for various turbines. Smaller range for rotor speed control supports the economy of controllers. So, for a particular wind energy location, selection of wind turbine should be done in such a manner that it requires minimum speed control to track maximum power during wind variations. In this paper an attempt has been made to analyze the performance of wind turbines for MPPT. Simulation results using MATLAB coding are found to be effective to propose few recommendations for the selection of wind turbines suitable for MPPT.","PeriodicalId":118902,"journal":{"name":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132934573","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/MICROCOM.2016.7522470
Pritam Bhattacharjee, Arindam Sadhu, Kunal Das
The paper depicts the RTL (Register Transfer Level) description of Binary Multiplier and Binary Divider. The descriptions are synchronized to the operating clock of the microprocessor. The major operations that get a highlight in this paper is that the multiplier and divider are synthesizable. VHDL (Very High Specific Integrated Circuit - Hardware Description Language) is the language of construct for the design. This work focuses to show that synchronized applications can be implemented at the front-end level of VLSI design methodology.
本文描述了二进制乘法器和二进制除法器的RTL(寄存器传输电平)描述。这些描述被同步到微处理器的操作时钟。本文重点强调的主要操作是乘法器和除法器的可合成。VHDL (Very High Specific Integrated Circuit - Hardware Description Language)是设计的构造语言。这项工作的重点是表明同步应用可以在VLSI设计方法的前端级别实现。
{"title":"A register-transfer-level description of synthesizable binary multiplier and binary divider","authors":"Pritam Bhattacharjee, Arindam Sadhu, Kunal Das","doi":"10.1109/MICROCOM.2016.7522470","DOIUrl":"https://doi.org/10.1109/MICROCOM.2016.7522470","url":null,"abstract":"The paper depicts the RTL (Register Transfer Level) description of Binary Multiplier and Binary Divider. The descriptions are synchronized to the operating clock of the microprocessor. The major operations that get a highlight in this paper is that the multiplier and divider are synthesizable. VHDL (Very High Specific Integrated Circuit - Hardware Description Language) is the language of construct for the design. This work focuses to show that synchronized applications can be implemented at the front-end level of VLSI design methodology.","PeriodicalId":118902,"journal":{"name":"2016 International Conference on Microelectronics, Computing and Communications (MicroCom)","volume":"17 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132577331","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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