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Professional Program Proceedings. ELECTRO '96最新文献

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The Design Qualification Process 设计鉴定过程
Pub Date : 1996-04-30 DOI: 10.1109/ELECTR.1996.501249
M. Tedaldi
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引用次数: 0
Consulting case study LCD to TFEL video adapter 咨询案例研究LCD到TFEL视频适配器
Pub Date : 1996-04-30 DOI: 10.1109/ELECTR.1996.501211
F. Cohen
This paper discusses a case study demonstrating the benefits of using the services of a consultant to save time and money in implementing the conversion of an instrument using an LCD display to one using a TFEL (thin-film electroluminescent panel).
本文讨论了一个案例研究,展示了使用顾问服务在将使用LCD显示器的仪器转换为使用TFEL(薄膜电致发光面板)的仪器时节省时间和金钱的好处。
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引用次数: 0
Bit repetitive trellis coded modulation for the Rayleigh fading channel 瑞利衰落信道的位重复网格编码调制
Pub Date : 1996-04-30 DOI: 10.1109/ELECTR.1996.501226
J. M. Kroll, N. Phamdo
A new approach to the problem of bandwidth efficient coding for transmission over the Rayleigh fading channel is considered. The proposed scheme is based on the idea of trellis coded modulation, but supports the re-transmission of 50% of the sources information. This re-transmission of data provides an additional level of time diversity, and allows for the identification of a new distortion criterion which may be used along with the squared Euclidean distance, to find the maximum likelihood path through the trellis. This new approach is developed utilizing estate trellis codes, along with two and four dimensional constellations, to support an information throughput of 2 bits/T. We will work through the design considerations applicable to this scheme, and provide performance comparisons between the proposed system, and TCM systems of comparable complexity. This new scheme achieves significant coding gains for bit error rates of practical interest. However, its complexity is about twice that of ordinary TCM.
提出了一种解决瑞利衰落信道传输中带宽有效编码问题的新方法。该方案基于栅格编码调制的思想,但支持50%的信源信息重传。这种数据的重新传输提供了一个额外的时间分集水平,并允许识别一个新的失真标准,该标准可以与平方欧几里得距离一起使用,以找到通过网格的最大似然路径。这种新方法是利用栅格代码以及二维和四维星座开发的,以支持2比特/T的信息吞吐量。我们将研究适用于该方案的设计考虑因素,并提供所提议的系统与具有相当复杂性的TCM系统之间的性能比较。这种新方案在实际的误码率方面取得了显著的编码增益。然而,其复杂性大约是普通中药的两倍。
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引用次数: 0
Mechanical design of alarm system for vehicles 车辆报警系统的机械设计
Pub Date : 1996-04-30 DOI: 10.1109/ELECTR.1996.501246
S. Senator
This device will consist of two separate packages connected to each other by a cable and to the vehicles power supply (battery). One package is to be located in the passenger compartment in view of the driver. The other is to be mounted on the lower rear of the car for an unobstructed view to the rear. They are separate units with a cable that is not attached to the electronic units until after installation. Environmentally the electronics will see a large range of temperature and humidity as well as shock and vibration. The outside package must also withstand direct water and dirt from almost all angles as well as direct shock. The cable must also be able to withstand some abrasion due to constant vibration. The interior package must be mounted in view of the driver but not block the view. In addition it must be visually pleasing, must be able to mount on various types of surface materials and on anything from horizontal to vertical surfaces. The cable to the dash unit must be able to be routed either through a hole in the dash or under molding with minimum exposure. Using these general criteria a preliminary set of drawings was prepared on a CAD system and sent via E mail to the other engineering groups for comments. When the comments were received the drawings were revised and awaited the final design of the circuit boards as well as the final hardware choices. At this point final drawings were made and sent to the shop for prototypes.
该装置将由两个独立的包组成,通过电缆相互连接,并与车辆电源(电池)相连。一个包裹要放在司机能看见的乘客舱里。另一个是安装在较低的汽车后方为后方畅通无阻的看法。它们是独立的单元,直到安装后才连接到电子单元的电缆。在环境方面,电子产品将会看到大范围的温度和湿度,以及冲击和振动。外包装还必须承受直接水和污垢从几乎所有的角度,以及直接冲击。电缆还必须能够承受一些磨损,由于不断的振动。内部包装必须安装在司机的视野内,但不能阻挡视野。此外,它必须在视觉上令人愉悦,必须能够安装在各种类型的表面材料和任何从水平到垂直的表面上。到仪表板单元的电缆必须能够通过仪表板上的孔或在最小暴露的成型下布线。根据这些一般标准,在CAD系统上编制了一套初步图纸,并通过电子邮件发送给其他工程小组征求意见。收到意见后,对图纸进行了修改,等待电路板的最终设计和硬件的最终选择。在这一点上,最终图纸被发送到商店原型。
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引用次数: 0
Project: electro-cardiographic data collection system 项目名称:心电图数据采集系统
Pub Date : 1996-04-30 DOI: 10.1109/ELECTR.1996.501241
C. W. Olson
This project was inspired by the need for new and better techniques for the diagnosis of patients with the potential for heart failure due to ventricular arrhythmias. This type of fatal accident is accountable for 300,000 deaths a year in this country alone. I met with a number of Doctors and Research Engineers to explore the approaches to the development of new techniques to meet this critical requirement. Since there is a minimum of dollars available to support this research, it was imperative to come up with a low cost approach. The tradeoffs were: (1) Modify available equipment. (2) Design new equipment in house. (3) Use a consultant to minimize cost and time. These alternative approaches were compared in detail to find the most cost effective approach.
这个项目的灵感来自于需要新的和更好的技术来诊断由于室性心律失常而可能导致心力衰竭的患者。仅在这个国家,这种致命事故每年就造成30万人死亡。我会见了许多医生和研究工程师,探讨开发新技术以满足这一关键要求的方法。由于支持这项研究的资金有限,因此必须找到一种低成本的方法。权衡是:(1)修改现有设备。(2)负责公司新设备的设计。(3)聘请顾问,将成本和时间降至最低。详细比较了这些替代方法,以找到最具成本效益的方法。
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引用次数: 0
An overview of the CDMA PCS system CDMA PCS系统的概述
Pub Date : 1996-04-30 DOI: 10.1109/ELECTR.1996.501250
E. Tiedemann
A code division multiple access (CDMA) standard for personal communications systems (PCS), ANSI J-STD-008, was completed in the winter of 1995. The PCS air interface standard is based upon the cellular TIA/EIA/IS-95-A standard. This paper summarizes the standards that have been developed for the CDMA system, describes the new capabilities that were added to ANSI J-STD-008, and describes new capabilities being developed for CDMA cellular and PCS systems.
用于个人通信系统(PCS)的码分多址(CDMA)标准ANSI J-STD-008于1995年冬季完成。PCS空中接口标准基于蜂窝TIA/EIA/ is -95- a标准。本文总结了为CDMA系统开发的标准,描述了ANSI J-STD-008中增加的新功能,并描述了为CDMA蜂窝和PCS系统开发的新功能。
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引用次数: 2
Low BER radio design for wireless local loop applications 无线本地环路应用的低误码率无线电设计
Pub Date : 1996-04-30 DOI: 10.1109/ELECTR.1996.501235
J.L. Merenda, J. Pierro, R. Clouse, J. Gunther, C. Fenniman
High performance full duplex 1.4 to 2.8 GHz radios for wireless local loop telephony application have been developed and are described. The radios are designed to handle both QPSK modulation and spectrally efficient quadrature amplitude modulation (QAM) at a bit error rate of 1E-06. The radios are a critical component in a very sophisticated FDMA system that is currently installed and operational in several countries throughout the world. The system offers copper quality voice service to subscribers and is capable of supporting advanced digital services such as ISDN. The radios are designed to transmit over distances as great as 50 km. The base station radio achieves a nominal output power of approximately 1 Watt. The remote station radio located at the subscriber's residence achieves a nominal output power of approximately 0.5 Watts. The transmitter amplifiers in both the base and remote radios are operated at approximately 5 dB of cutback to preserve linearity which is especially critical in the QAM mode. The power managed system requires 60 dB of ALC range.
高性能全双工1.4至2.8 GHz无线本地环路电话应用无线电已经开发和描述。无线电设计用于处理QPSK调制和频谱有效正交幅度调制(QAM),误码率为1E-06。无线电是一个非常复杂的FDMA系统的关键组成部分,目前在世界上几个国家安装和运行。该系统为用户提供铜质语音服务,并能够支持ISDN等高级数字业务。这些无线电设计的传输距离可达50公里。基站无线电的标称输出功率约为1瓦。位于用户住所的远站无线电达到约0.5瓦的标称输出功率。基础和远程无线电中的发射机放大器都以大约5db的cut - back工作,以保持线性度,这在QAM模式中尤为重要。电源管理系统需要60db的ALC范围。
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引用次数: 0
A236 parallel DSP chip provides real-time video processing economically and efficiently A236并行DSP芯片提供了经济高效的实时视频处理
Pub Date : 1996-04-30 DOI: 10.1109/ELECTR.1996.501237
S. G. Morton
Oxford Computer's A236 parallel digital signal processor chip is flexible, fully programmable and designed to compactly and inexpensively provide live video capture, processing and display. The use of single-chip, parallel processing with integrated data and instruction caches, and an inexpensive, high performance memory system, provide high performance at low cost. An extended, single-instruction multiple-data (SIMD) architecture with one, 24-bit scalar processor and four, 16-bit vector processors, is used. Five instructions are issued each clock cycle with a 40 MHz clock, providing up to 200 MIPS. Two, 16-bit, bi-directional, double-buffered, DMA ports support simultaneous video acquisition and display, and interface directly to common video decoder and encoder chips with no glue logic. A minimum system that provides all input and output frame buffering contains only three chips, an A236 Chip, a 32-bit wide, synchronous DRAM, and a serial I/sup 2/C EEPROM, plus analog video interface chips. A full set of software development tools that runs under MS Windows is available free, including an enhanced C-compiler that provides a simple method for representing parallel operations on data structures. An evaluation kit containing the software tools and the A236 Video Processing System I is also available.
牛津计算机公司的A236并行数字信号处理器芯片是灵活的,完全可编程的,设计紧凑,廉价地提供实时视频捕获,处理和显示。使用单片,并行处理集成数据和指令缓存,以及廉价,高性能的存储系统,以低成本提供高性能。采用扩展的单指令多数据(SIMD)架构,其中包含一个24位标量处理器和四个16位矢量处理器。每个时钟周期发出5条指令,时钟为40 MHz,提供高达200 MIPS。两个16位双向双缓冲DMA端口支持同时视频采集和显示,可直接与普通视频解码器和编码器芯片接口,无需粘合逻辑。提供所有输入和输出帧缓冲的最小系统只包含三个芯片,一个A236芯片,一个32位宽同步DRAM,一个串行I/sup 2/C EEPROM,以及模拟视频接口芯片。在微软Windows下运行的全套软件开发工具是免费的,包括一个增强的c编译器,它提供了一种简单的方法来表示数据结构上的并行操作。还提供了包含软件工具和A236视频处理系统I的评估工具包。
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引用次数: 0
Special purpose processor speeds up DSP functions 专用处理器加速DSP功能
Pub Date : 1996-04-30 DOI: 10.1109/ELECTR.1996.501227
G. Landers
A new class of arithmetic datapath processors are available in either device or embedded form. These reconfigurable arithmetic datapath (RADTM) devices offer reconfigurablilty of FPGAs with the performance of algorithm specific silicon designs. The heart of the RAD architecture is a MacroSequencer. By programming the MacroSequencer to a specific algorithm, the hardware configures itself to that algorithm. Operations are performed concurrently in the pipelined structure. All programming, short term data storage and coefficients are stored within the MacroSequencer. The RAD MacroSequencer may be reconfigured to a new algorithm in as little as 25 ms. The RAD architecture is particularly suited to accelerating the performance of data stream algorithms.
一种新型的算术数据路径处理器以器件形式和嵌入式形式出现。这些可重构算术数据路径(RADTM)器件提供fpga的可重构性,并具有特定算法硅设计的性能。RAD架构的核心是MacroSequencer。通过将MacroSequencer编程为特定算法,硬件将自身配置为该算法。操作在流水线结构中并行执行。所有编程、短期数据存储和系数都存储在MacroSequencer中。RAD MacroSequencer可以在短短25毫秒内重新配置为新算法。RAD架构特别适合于加速数据流算法的性能。
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引用次数: 0
Distributed call processing architecture (DCPA) 分布式调用处理架构(DCPA)
Pub Date : 1996-04-30 DOI: 10.1109/ELECTR.1996.501252
M. Veeraraghavan, T. L. La Porta
We propose a distributed call processing architecture (DCPA) for next generation broadband networks that will support both telephony and data communications users. DCPA features a layered architecture with modularized protocols designed to support different types of end user equipment and servers. A fast connection setup algorithm, called parallel connection control (PCC), is used in networks based on the DCPA model. The intelligent network (IN) principle of having the network provide value-added services is combined with consistently maintaining separate modularized interfaces to different control functions of networks. The latter ensures that flexible control models, such as those used in current computer communications networks, can coexist with intelligent network-based models.
我们提出了一种分布式呼叫处理架构(DCPA),用于支持电话和数据通信用户的下一代宽带网络。DCPA具有分层架构和模块化协议,旨在支持不同类型的终端用户设备和服务器。并行连接控制(PCC)是一种基于DCPA模型的快速连接建立算法。将网络提供增值服务的智能网络(IN)原理与对网络的不同控制功能始终保持独立的模块化接口相结合。后者确保了当前计算机通信网络中使用的灵活控制模型可以与基于网络的智能模型共存。
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引用次数: 0
期刊
Professional Program Proceedings. ELECTRO '96
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