Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524847
N. Butorina, Y. Burkatovskaya, E. Pakhomova
The method of a self-testing (m, n)-code checker design based on the use of CLBs is considered. CLBs are supposed to be carried out in the framework of LUT-technology. To design the checker, a special expansion formula is used. The set V of checker faults includes all multiple stuck-at faults occurred at CLB inputs. The number l of code words appearing at the inputs of the checker can be less than the number of all possible code words. It implies that some faults of the self-testing checker connected to the outputs of the self-checking circuit can be undetectable. The paper establishes a property of a subset of code words, which allows us to check if a given subset provides the self-testing property of the checker. The property is used in the developed algorithm for analyzing a subset of code words.
{"title":"Evaluation of Code-Word Subsets to Ensure the Self-Testing Property of a Checker","authors":"N. Butorina, Y. Burkatovskaya, E. Pakhomova","doi":"10.1109/EWDTS.2018.8524847","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524847","url":null,"abstract":"The method of a self-testing (m, n)-code checker design based on the use of CLBs is considered. CLBs are supposed to be carried out in the framework of LUT-technology. To design the checker, a special expansion formula is used. The set V of checker faults includes all multiple stuck-at faults occurred at CLB inputs. The number l of code words appearing at the inputs of the checker can be less than the number of all possible code words. It implies that some faults of the self-testing checker connected to the outputs of the self-checking circuit can be undetectable. The paper establishes a property of a subset of code words, which allows us to check if a given subset provides the self-testing property of the checker. The property is used in the developed algorithm for analyzing a subset of code words.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"63 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123216981","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524640
O. Dvornikov, N. Prokopenko, A. Bugakova, V. Tchekhovski, I. Maliy
Features of the design of operational amplifiers (Op-Amp) on complementary field effect transistors with p-n- junction (junction field-effect transistor, JFET) for operation under the influence of penetrating radiation (PR) and extremely low temperatures up to −197°C are considered. The original circuit of the Op-Amp and the results of its circuit simulation are given.
{"title":"Cryogenic Operational Amplifier on Complementary JFETs","authors":"O. Dvornikov, N. Prokopenko, A. Bugakova, V. Tchekhovski, I. Maliy","doi":"10.1109/EWDTS.2018.8524640","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524640","url":null,"abstract":"Features of the design of operational amplifiers (Op-Amp) on complementary field effect transistors with p-n- junction (junction field-effect transistor, JFET) for operation under the influence of penetrating radiation (PR) and extremely low temperatures up to −197°C are considered. The original circuit of the Op-Amp and the results of its circuit simulation are given.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127984687","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524708
Alexey Malvshev, Ivan Malav, M. Ozerov
A method of digital processing of global positioning system navigation signal is proposed. It allows to separate evaluation of spectral and energy characteristics of signal components. Main advantages of the method is: increasing a dynamic range by more than 10 dB, separation of navigation signal components under conditions of a priori information absence about a generating polynomial. The method is based on extracting the spreading sequences of a navigational signal by the method of quadrature heterodyning with filtration of components of one quadrature and subsequent correlation processing of an initial signal.
{"title":"Algorithm for Separating GNSS Signals into Components","authors":"Alexey Malvshev, Ivan Malav, M. Ozerov","doi":"10.1109/EWDTS.2018.8524708","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524708","url":null,"abstract":"A method of digital processing of global positioning system navigation signal is proposed. It allows to separate evaluation of spectral and energy characteristics of signal components. Main advantages of the method is: increasing a dynamic range by more than 10 dB, separation of navigation signal components under conditions of a priori information absence about a generating polynomial. The method is based on extracting the spreading sequences of a navigational signal by the method of quadrature heterodyning with filtration of components of one quadrature and subsequent correlation processing of an initial signal.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130033157","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524671
D. Letavin, V. Chechetkin, Y. Mitelman
In this paper, we consider the possibility of miniaturization of a broadband quadrature coupler using low-pass filters that have the same phase shift as the replaced segment of microstrip line. Numerical simulation of the proposed four-stub coupler with a central frequency tuned to 2000 MHz is conducted. The decoupling band at the level of −20 dB of such a device is around 1000 MHz. The dimensions of the coupler are 37 mm × 14 mm = 518 mm2, which is 65.3% less than the standard one. The experimental results coincide with the results of the simulation with a small error.
{"title":"Compact Four-Stub Coupler","authors":"D. Letavin, V. Chechetkin, Y. Mitelman","doi":"10.1109/EWDTS.2018.8524671","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524671","url":null,"abstract":"In this paper, we consider the possibility of miniaturization of a broadband quadrature coupler using low-pass filters that have the same phase shift as the replaced segment of microstrip line. Numerical simulation of the proposed four-stub coupler with a central frequency tuned to 2000 MHz is conducted. The decoupling band at the level of −20 dB of such a device is around 1000 MHz. The dimensions of the coupler are 37 mm × 14 mm = 518 mm2, which is 65.3% less than the standard one. The experimental results coincide with the results of the simulation with a small error.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"76 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130939619","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524759
P. Belyakov, M. Nikiforov
The variational methods for dense optical flow estimation are widely known and adopted techniques for motion detection, object tracking, 3D reconstruction and autonomous navigation in image processing applications. A non-linear model of variational optical flow estimation is the most accurate but also most complicated and computationally intensive method and its implementation in an FPGA is compromise from both a design complexity and a performance. The article is devoted to the specific FPGA-based solution which has been implemented using Verilog hardware description language. The suggested solution is able to process the non-linear optical flow in real time and might be applied as FPGA -accelerator for optical flow processing.
{"title":"An FPGA-Optimized Architecture of Variational Optical Flow","authors":"P. Belyakov, M. Nikiforov","doi":"10.1109/EWDTS.2018.8524759","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524759","url":null,"abstract":"The variational methods for dense optical flow estimation are widely known and adopted techniques for motion detection, object tracking, 3D reconstruction and autonomous navigation in image processing applications. A non-linear model of variational optical flow estimation is the most accurate but also most complicated and computationally intensive method and its implementation in an FPGA is compromise from both a design complexity and a performance. The article is devoted to the specific FPGA-based solution which has been implemented using Verilog hardware description language. The suggested solution is able to process the non-linear optical flow in real time and might be applied as FPGA -accelerator for optical flow processing.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"75 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127255204","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524668
V. Kureichik, I. Safronenkova
The present work deals with artificial intelligence research. The problem of engineering software benchmarking study for the purpose of fitting for task type and computational resources is important today. This problem is often solved by the help of intelligence decision support systems (IDSS). Domain ontology is a typical knowledge representation model in such systems. Manual ontology development is a time-consuming and expensive process. Because of a great variety of circuit partitioning problem formulization, clustering is a necessary step of automated circuit partitioning problem ontology development. The problem of automated circuit partitioning problem clustering appears because of integrated data comparison. This data is represented by different dimension structures. The goal of this work is the development of circuit partitioning problem clustering method based on adjacency matrix unification. The hypergraph model of circuit representation was chosen, circuit partitioning problem was formalized. The case of adjacency matrix with different dimension clustering was observed. The novelty of proposed method is the inclusion of matrix with different dimension unification procedure in the generic clustering method.
{"title":"Circuit Partitioning Problem Clustering Method Based on Adjacency Matrix Unification","authors":"V. Kureichik, I. Safronenkova","doi":"10.1109/EWDTS.2018.8524668","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524668","url":null,"abstract":"The present work deals with artificial intelligence research. The problem of engineering software benchmarking study for the purpose of fitting for task type and computational resources is important today. This problem is often solved by the help of intelligence decision support systems (IDSS). Domain ontology is a typical knowledge representation model in such systems. Manual ontology development is a time-consuming and expensive process. Because of a great variety of circuit partitioning problem formulization, clustering is a necessary step of automated circuit partitioning problem ontology development. The problem of automated circuit partitioning problem clustering appears because of integrated data comparison. This data is represented by different dimension structures. The goal of this work is the development of circuit partitioning problem clustering method based on adjacency matrix unification. The hypergraph model of circuit representation was chosen, circuit partitioning problem was formalized. The case of adjacency matrix with different dimension clustering was observed. The novelty of proposed method is the inclusion of matrix with different dimension unification procedure in the generic clustering method.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127437068","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/ewdts.2018.8524822
G. S. Khanyan
The work is devoted to the sampling theorem in frequency domain, in which the problem of reconstructing a time-limited signal's spectral function by the finite number of its samples is posed. The theorem is formulated under the most general assumptions of uniform sampling, the restrictions on which are clarified in the course of its proof
{"title":"Sampling Theorem in Frequency Domain for the Finite Spectrum","authors":"G. S. Khanyan","doi":"10.1109/ewdts.2018.8524822","DOIUrl":"https://doi.org/10.1109/ewdts.2018.8524822","url":null,"abstract":"The work is devoted to the sampling theorem in frequency domain, in which the problem of reconstructing a time-limited signal's spectral function by the finite number of its samples is posed. The theorem is formulated under the most general assumptions of uniform sampling, the restrictions on which are clarified in the course of its proof","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114270567","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524806
A. Drozd, M. Kuznietsov, S. Antoshchuk, Alexander N. Martynyuk, M. Drozd, Y. Sulima
This paper is devoted to a problem of the hidden faults which is shown in digital components of the safety-related systems aimed at providing of the functional safety of objects with the increased risk. These systems are considered on the basis of resource approach as development of computer systems with diversification of an operating mode by its division on normal and emergency. The problem consists in accumulation of faults throughout a continuous normal mode in absence of the input data showing them. In the most responsible emergency mode, accumulated faults are shown in lowering of fault tolerance on which the functional safety is based. The problem of the hidden faults is identified as a problem in development of resources where diversification of a checkability of the circuits contradicts designing of the digital components at the bottom level of resource development - replication. Problem solutions by increase in the level of resource development in designing of the digital components, including a method of a choice of the version in program codes of the FPGA project are suggested.
{"title":"Evolution of a Problem of the Hidden Faults in the Digital Components of Safety-Related Systens","authors":"A. Drozd, M. Kuznietsov, S. Antoshchuk, Alexander N. Martynyuk, M. Drozd, Y. Sulima","doi":"10.1109/EWDTS.2018.8524806","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524806","url":null,"abstract":"This paper is devoted to a problem of the hidden faults which is shown in digital components of the safety-related systems aimed at providing of the functional safety of objects with the increased risk. These systems are considered on the basis of resource approach as development of computer systems with diversification of an operating mode by its division on normal and emergency. The problem consists in accumulation of faults throughout a continuous normal mode in absence of the input data showing them. In the most responsible emergency mode, accumulated faults are shown in lowering of fault tolerance on which the functional safety is based. The problem of the hidden faults is identified as a problem in development of resources where diversification of a checkability of the circuits contradicts designing of the digital components at the bottom level of resource development - replication. Problem solutions by increase in the level of resource development in designing of the digital components, including a method of a choice of the version in program codes of the FPGA project are suggested.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":" 979","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"113946597","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524856
O. Medvedeva, S. Mustafina, Dmitry Petrov, Rustam Salavatov, S. Mustafina
With the development of online video services, machine learning technologies are developing. At this stage of development, neural networks allow us to identify patterns in the incoming data, while their mass usage in various technologies does not surprise with its vastness. The special problem is the training of networks based on video data. This article is devoted to the tasks of clustering video on emotional coloring with the help of neural networks, or more precisely, the approach which allows to accelerate the training of the neural network and to determine the emotional coloring of the video in subsequent actions.
{"title":"Getting the Emotional Coloring of Videos for Further Teaching of Neural Networks","authors":"O. Medvedeva, S. Mustafina, Dmitry Petrov, Rustam Salavatov, S. Mustafina","doi":"10.1109/EWDTS.2018.8524856","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524856","url":null,"abstract":"With the development of online video services, machine learning technologies are developing. At this stage of development, neural networks allow us to identify patterns in the incoming data, while their mass usage in various technologies does not surprise with its vastness. The special problem is the training of networks based on video data. This article is devoted to the tasks of clustering video on emotional coloring with the help of neural networks, or more precisely, the approach which allows to accelerate the training of the neural network and to determine the emotional coloring of the video in subsequent actions.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123730800","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2018-09-01DOI: 10.1109/EWDTS.2018.8524602
Valentina Potapova, A.Yu. Tarasov, N. Grinchenko
The article considers image processing methods, such as method of query by content and Bayesian segmentation method. Application of both methods together promotes improvement of image search results.
本文考虑了图像处理方法，如按内容查询法和贝叶斯分割法。两种方法的共同应用促进了图像搜索结果的改善。
{"title":"Image Search by Content System Development","authors":"Valentina Potapova, A.Yu. Tarasov, N. Grinchenko","doi":"10.1109/EWDTS.2018.8524602","DOIUrl":"https://doi.org/10.1109/EWDTS.2018.8524602","url":null,"abstract":"The article considers image processing methods, such as method of query by content and Bayesian segmentation method. Application of both methods together promotes improvement of image search results.","PeriodicalId":127240,"journal":{"name":"2018 IEEE East-West Design & Test Symposium (EWDTS)","volume":"6 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2018-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130007432","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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