Pub Date : 1994-05-25DOI: 10.1109/ISMVL.1994.302178
G. Epstein
A weak propositional calculus is presented for signal processing with lower threshold z and upper threshold u. For this result all signals are scaled to lie within the linearly ordered real interval [0,1], with focus on the case 0>
{"title":"A weak propositional calculus for signal processing with thresholds","authors":"G. Epstein","doi":"10.1109/ISMVL.1994.302178","DOIUrl":"https://doi.org/10.1109/ISMVL.1994.302178","url":null,"abstract":"A weak propositional calculus is presented for signal processing with lower threshold z and upper threshold u. For this result all signals are scaled to lie within the linearly ordered real interval [0,1], with focus on the case 0<z<u<1. A still weaker propositional calculus is given where this linear ordering is related to partial ordering in bounded distributive lattices.<<ETX>>","PeriodicalId":137138,"journal":{"name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133184208","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-25DOI: 10.1109/ISMVL.1994.302203
I. Stojmenovic
Discusses the functional completeness problems in r-valued set logic, which is the logic of functions mapping n-tuples of subsets into subsets over r values. Boolean functions are convenient choice as building blocks in the design of set logic functions. A set of functions F is Boolean complete if any set logic function can be composed from F once all Boolean functions are added to F. The paper proves that there are 2/sup r/-2 Boolean maximal sets in r-valued set logic and gives their description using equivalence relations. A set F is then Boolean complete if it is not a subset of any of these 2/sup r/-2 Boolean maximal sets, which is a completeness criteria in many-valued set logic under compositions with Boolean functions.<>
{"title":"Completeness criteria in many-valued set logic under compositions with Boolean functions","authors":"I. Stojmenovic","doi":"10.1109/ISMVL.1994.302203","DOIUrl":"https://doi.org/10.1109/ISMVL.1994.302203","url":null,"abstract":"Discusses the functional completeness problems in r-valued set logic, which is the logic of functions mapping n-tuples of subsets into subsets over r values. Boolean functions are convenient choice as building blocks in the design of set logic functions. A set of functions F is Boolean complete if any set logic function can be composed from F once all Boolean functions are added to F. The paper proves that there are 2/sup r/-2 Boolean maximal sets in r-valued set logic and gives their description using equivalence relations. A set F is then Boolean complete if it is not a subset of any of these 2/sup r/-2 Boolean maximal sets, which is a completeness criteria in many-valued set logic under compositions with Boolean functions.<<ETX>>","PeriodicalId":137138,"journal":{"name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120938823","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-25DOI: 10.1109/ISMVL.1994.302177
Mou Hu
In this paper, the application of a four-valued logic to the switch-level test generation is studied. A switch-level operator fault model is proposed. Switch-level U difference and Z difference of a function to a fault are defined. A method to derive switch-level differences is given. Finally, a new switch-level test generation algorithm for CMOS circuits is presented.<>
{"title":"A four-valued logic and switch-level differences","authors":"Mou Hu","doi":"10.1109/ISMVL.1994.302177","DOIUrl":"https://doi.org/10.1109/ISMVL.1994.302177","url":null,"abstract":"In this paper, the application of a four-valued logic to the switch-level test generation is studied. A switch-level operator fault model is proposed. Switch-level U difference and Z difference of a function to a fault are defined. A method to derive switch-level differences is given. Finally, a new switch-level test generation algorithm for CMOS circuits is presented.<<ETX>>","PeriodicalId":137138,"journal":{"name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122860397","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-25DOI: 10.1109/ISMVL.1994.302180
J. T. Butler, Tsutomu Sasao
We consider the use of feedback loops in the realization of multiple-valued combinational circuits. We show that the number of purely combinational configurations in an r-valued system is 1/r of the total number. Thus, as the radix increases, the fraction of combinational configurations decreases. We also show that, for every radix value r, there is a circuit with feedback realizing a combinational logic function that has fewer gates than any feedback-free circuit.<>
{"title":"Multiple-valued combinational circuits with feedback","authors":"J. T. Butler, Tsutomu Sasao","doi":"10.1109/ISMVL.1994.302180","DOIUrl":"https://doi.org/10.1109/ISMVL.1994.302180","url":null,"abstract":"We consider the use of feedback loops in the realization of multiple-valued combinational circuits. We show that the number of purely combinational configurations in an r-valued system is 1/r of the total number. Thus, as the radix increases, the fraction of combinational configurations decreases. We also show that, for every radix value r, there is a circuit with feedback realizing a combinational logic function that has fewer gates than any feedback-free circuit.<<ETX>>","PeriodicalId":137138,"journal":{"name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121938007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-25DOI: 10.1109/ISMVL.1994.302179
Y. Nagata, M. Mukaidono
A new encoding/decoding scheme of multiple-valued separable balanced codes are presented. These codes have 2/spl middot/m information digits and m/spl middot/(R-2) check digits in radices R/spl ges/4, and 2/spl middot/m-1 information digits and m+1 check digits in R=3 where code-length n=R/spl middot/m. In actual use of code-lengths and radices, it is shown that the presented codes are efficient in comparison with multiple-valued Berger-codes which are known as optimal unordered codes.<>
{"title":"On multiple-valued separable unordered codes","authors":"Y. Nagata, M. Mukaidono","doi":"10.1109/ISMVL.1994.302179","DOIUrl":"https://doi.org/10.1109/ISMVL.1994.302179","url":null,"abstract":"A new encoding/decoding scheme of multiple-valued separable balanced codes are presented. These codes have 2/spl middot/m information digits and m/spl middot/(R-2) check digits in radices R/spl ges/4, and 2/spl middot/m-1 information digits and m+1 check digits in R=3 where code-length n=R/spl middot/m. In actual use of code-lengths and radices, it is shown that the presented codes are efficient in comparison with multiple-valued Berger-codes which are known as optimal unordered codes.<<ETX>>","PeriodicalId":137138,"journal":{"name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132407188","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-25DOI: 10.1109/ISMVL.1994.302201
H. Lin
Resonant tunneling diodes (RTD) have unique folding V-I characteristics, which lend themselves to multi-valued applications, The negative differential resistance of RTDs renders the operating points self-latching and stable. Any positive resistance in series with an RTD can give rise to hysteresis, especially at high frequencies, The hysteresis effect limits the operation of some multi-valued circuits, but can be utilized to produce some useful functions in other applications. In most applications, the input connection and the output connection are sequentially clocked to achieve isolation. An RTD can achieve higher operating frequency operation than conventional devices, and the maximum operating frequency is often limited by the dynamic hysteresis effect.<>
{"title":"Resonant tunneling diodes for multi-valued digital applications","authors":"H. Lin","doi":"10.1109/ISMVL.1994.302201","DOIUrl":"https://doi.org/10.1109/ISMVL.1994.302201","url":null,"abstract":"Resonant tunneling diodes (RTD) have unique folding V-I characteristics, which lend themselves to multi-valued applications, The negative differential resistance of RTDs renders the operating points self-latching and stable. Any positive resistance in series with an RTD can give rise to hysteresis, especially at high frequencies, The hysteresis effect limits the operation of some multi-valued circuits, but can be utilized to produce some useful functions in other applications. In most applications, the input connection and the output connection are sequentially clocked to achieve isolation. An RTD can achieve higher operating frequency operation than conventional devices, and the maximum operating frequency is often limited by the dynamic hysteresis effect.<<ETX>>","PeriodicalId":137138,"journal":{"name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121878065","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-05-25DOI: 10.1109/ISMVL.1994.302207
N. Takagi, K. Nakashima, M. Mukaidono
Since the concept of fuzzy sets is proposed by L.A. Zadeh, as the extensions of Boolean functions many multiple-valued logic functions permitted to take truth values besides 0 and 1 have been investigated. Each one of multiple-valued logic functions motivated by the concept of fuzzy sets is one of the models of Kleene algebras, which have almost of the properties holding in Boolean algebras excluding the complementary laws. On the other hand, Kleene-Stone algebras have been proposed by G. Epstein and M. Mukaidono which have properties both Kleene algebras and Stone algebras. Therefore, it is considered that Kleene-Stone algebras correspond to non-classical logic system besides that of Kleene algebras. In the paper, we describe a typical example of Kleene-Stone algebras, which is called Kleene-Stone logic functions. Some properties of Kleene-Stone logic functions are clarified in the paper, especially an algorithm to derive a minimal form of a given Kleene-Stone logic function.<>
{"title":"Minimization for Kleene-Stone logic functions","authors":"N. Takagi, K. Nakashima, M. Mukaidono","doi":"10.1109/ISMVL.1994.302207","DOIUrl":"https://doi.org/10.1109/ISMVL.1994.302207","url":null,"abstract":"Since the concept of fuzzy sets is proposed by L.A. Zadeh, as the extensions of Boolean functions many multiple-valued logic functions permitted to take truth values besides 0 and 1 have been investigated. Each one of multiple-valued logic functions motivated by the concept of fuzzy sets is one of the models of Kleene algebras, which have almost of the properties holding in Boolean algebras excluding the complementary laws. On the other hand, Kleene-Stone algebras have been proposed by G. Epstein and M. Mukaidono which have properties both Kleene algebras and Stone algebras. Therefore, it is considered that Kleene-Stone algebras correspond to non-classical logic system besides that of Kleene algebras. In the paper, we describe a typical example of Kleene-Stone algebras, which is called Kleene-Stone logic functions. Some properties of Kleene-Stone logic functions are clarified in the paper, especially an algorithm to derive a minimal form of a given Kleene-Stone logic function.<<ETX>>","PeriodicalId":137138,"journal":{"name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1994-05-25","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133847390","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1993-05-24DOI: 10.1109/ISMVL.1994.302197
M. Nakajima, M. Kameyama
To design highly parallel digital circuits such as an adder and a multiplier, it is difficult to find the optimal code assignment in the nonlinear digital system. On the other hand, the use of the linear concept in digital systems seems to be very attractive because analytical methods can be utilized. For unary operations, the design method of locally computable circuits have been discussed. In this paper, we propose a new design method of highly parallel multiple-valued linear digital circuits for k-ary operations using the concept of identification of input-output graphs by the introduction of multiplicated redundant symbols.<>
{"title":"Design of multiple-valued linear digital circuits for highly parallel k-ary operations","authors":"M. Nakajima, M. Kameyama","doi":"10.1109/ISMVL.1994.302197","DOIUrl":"https://doi.org/10.1109/ISMVL.1994.302197","url":null,"abstract":"To design highly parallel digital circuits such as an adder and a multiplier, it is difficult to find the optimal code assignment in the nonlinear digital system. On the other hand, the use of the linear concept in digital systems seems to be very attractive because analytical methods can be utilized. For unary operations, the design method of locally computable circuits have been discussed. In this paper, we propose a new design method of highly parallel multiple-valued linear digital circuits for k-ary operations using the concept of identification of input-output graphs by the introduction of multiplicated redundant symbols.<<ETX>>","PeriodicalId":137138,"journal":{"name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1993-05-24","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128809079","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/ISMVL.1994.302195
R. Hahnle
This paper tries to identify the basic problems encountered in automated theorem proving in many-valued logics and demonstrates to which extent they can be currently solved. To this end a number of recently developed techniques are reviewed. We list the avenues of research in many-valued theorem proving that are in our eyes the most promising.<>
{"title":"Efficient deduction in many-valued logics","authors":"R. Hahnle","doi":"10.1109/ISMVL.1994.302195","DOIUrl":"https://doi.org/10.1109/ISMVL.1994.302195","url":null,"abstract":"This paper tries to identify the basic problems encountered in automated theorem proving in many-valued logics and demonstrates to which extent they can be currently solved. To this end a number of recently developed techniques are reviewed. We list the avenues of research in many-valued theorem proving that are in our eyes the most promising.<<ETX>>","PeriodicalId":137138,"journal":{"name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132179114","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/ISMVL.1994.302182
L. Kauffman
This paper studies a mathematical model for automata as direct abstractions of digital circuitry. We give a rigorous model for distributed delays in terms of a precedence order of operations. The model is applied to automata that arise in the study of topological invariants of knots in three dimensional space and to digital design.<>
{"title":"Knot automata","authors":"L. Kauffman","doi":"10.1109/ISMVL.1994.302182","DOIUrl":"https://doi.org/10.1109/ISMVL.1994.302182","url":null,"abstract":"This paper studies a mathematical model for automata as direct abstractions of digital circuitry. We give a rigorous model for distributed delays in terms of a precedence order of operations. The model is applied to automata that arise in the study of topological invariants of knots in three dimensional space and to digital design.<<ETX>>","PeriodicalId":137138,"journal":{"name":"Proceedings of 24th International Symposium on Multiple-Valued Logic (ISMVL'94)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123431352","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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