D. J. Crawford, R. Moore, J. A. Parisi, J. Picciano, W. Pricer
About two years ago a tunnel diode memory system was described which employed substantially different techniques than those previously used. Although earlier systems had tended towards array arrangements that had the storage cells connected in parallel on one or more axes, the new system employed series connections along two axes. This new arrangement has several design and performance advantages compared to previous systems. The original paper described the basic approach and some of the earlier work which included the design of array cross sections and the associated driving and sensing circuits. Since that time one version of the system has been operational in two IBM 7030 systems, and a 16-word, fully-populated, higher-speed laboratory model was built and reported. The present paper describes the engineering considerations used in the design of a larger and faster memory employing the basic techniques.
{"title":"Design considerations for a 25-nanosecond tunnel diode memory","authors":"D. J. Crawford, R. Moore, J. A. Parisi, J. Picciano, W. Pricer","doi":"10.1145/1463891.1463960","DOIUrl":"https://doi.org/10.1145/1463891.1463960","url":null,"abstract":"About two years ago a tunnel diode memory system was described which employed substantially different techniques than those previously used. Although earlier systems had tended towards array arrangements that had the storage cells connected in parallel on one or more axes, the new system employed series connections along two axes. This new arrangement has several design and performance advantages compared to previous systems. The original paper described the basic approach and some of the earlier work which included the design of array cross sections and the associated driving and sensing circuits. Since that time one version of the system has been operational in two IBM 7030 systems, and a 16-word, fully-populated, higher-speed laboratory model was built and reported. The present paper describes the engineering considerations used in the design of a larger and faster memory employing the basic techniques.","PeriodicalId":143723,"journal":{"name":"AFIPS '65 (Fall, part I)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1965-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133442130","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In recent years, a number of hardware associative memories had been designed and experimentally verified. These memories allow simultaneous comparison of all stored data to external data. Data may be read from, or written into, comparing words. These memories, acting as peripheral devices to conventional computers, have been studied for application to various tasks described in references 1 and 2. The concept of "associative processing," i.e., simultaneous transformation of many stored data by associative means, has been described previously. This processing mode showed promise in a variety of tasks, but was not efficient when peripherally controlled by a conventional machine. Novel machine organizations were required to fully exploit the potential of these techniques for solving poorly structured nonnumeric problems, at which present-day machines are not efficient.
{"title":"An associative parallel processor with application to picture processing","authors":"R. H. Fuller, R. M. Bird","doi":"10.1145/1463891.1463902","DOIUrl":"https://doi.org/10.1145/1463891.1463902","url":null,"abstract":"In recent years, a number of hardware associative memories had been designed and experimentally verified. These memories allow simultaneous comparison of all stored data to external data. Data may be read from, or written into, comparing words. These memories, acting as peripheral devices to conventional computers, have been studied for application to various tasks described in references 1 and 2. The concept of \"associative processing,\" i.e., simultaneous transformation of many stored data by associative means, has been described previously. This processing mode showed promise in a variety of tasks, but was not efficient when peripherally controlled by a conventional machine. Novel machine organizations were required to fully exploit the potential of these techniques for solving poorly structured nonnumeric problems, at which present-day machines are not efficient.","PeriodicalId":143723,"journal":{"name":"AFIPS '65 (Fall, part I)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1965-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115812089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Progress in any field depends on the materialization of new ideas. But before this is possible, these ideas have to be found, investigated, developed and adapted to the changing world.
{"title":"Universal programming languages and processors: a brief survey and new concepts","authors":"W. Burkhardt","doi":"10.1145/1463891.1463893","DOIUrl":"https://doi.org/10.1145/1463891.1463893","url":null,"abstract":"Progress in any field depends on the materialization of new ideas. But before this is possible, these ideas have to be found, investigated, developed and adapted to the changing world.","PeriodicalId":143723,"journal":{"name":"AFIPS '65 (Fall, part I)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1965-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123508089","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
H. D. Toombs and T. E. Hasty have described a technique utilizing ferromagnetic resonance to obtain nondestructive readout in thin permalloy film memories. A study has been made by the authors to determine how this technique could best be utilized in medium and large sized computer memories. The study culminated in the construction of a 32-word, 24-bit film plane tester utilizing absorption resonance readout which served to provide data on the resonant behavior of various films and to lend practical experience in the design of a resonance memory.
{"title":"A thin magnetic film computer memory using a resonant absorption nondestructive readout technique","authors":"M. May, W. W. Powell, J. Armstrong","doi":"10.1145/1463891.1463978","DOIUrl":"https://doi.org/10.1145/1463891.1463978","url":null,"abstract":"H. D. Toombs and T. E. Hasty have described a technique utilizing ferromagnetic resonance to obtain nondestructive readout in thin permalloy film memories. A study has been made by the authors to determine how this technique could best be utilized in medium and large sized computer memories. The study culminated in the construction of a 32-word, 24-bit film plane tester utilizing absorption resonance readout which served to provide data on the resonant behavior of various films and to lend practical experience in the design of a resonance memory.","PeriodicalId":143723,"journal":{"name":"AFIPS '65 (Fall, part I)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1965-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129504577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
As computers become larger and more complex, the need for a high-speed scratchpad type memory becomes greater. Furthermore, the size and speed requirements increase. An early memory, suitable for use as a scratchpad, was described by H. Amemiya, R. L. Pryor, and T. R. Mayhew. This memory used two ferrite cores per bit and had a read/regenerate cycle time of 200 nanoseconds. More recently, a 64-word by 20-bit thin magnetic film memory was described by G. J. Ammon and C. Neitzert. This memory had a read/regenerate cycle time of 125 nanoseconds and its speed was limited primarily by the electronic circuitry. A number of other memories and memory designs, suitable for use as scratchpads, have been reported in the literature. Future need for a 256 to 1,024 word memory having a cycle time of 50 nanoseconds has been indicated. A project was therefore initiated to study the feasibility of such a system.
随着计算机变得越来越大、越来越复杂，对高速刮刮板式存储器的需求也越来越大。此外，尺寸和速度要求增加。H. Amemiya, R. L. Pryor和T. R. Mayhew描述了一种早期记忆，适合用作刮擦板。该存储器每比特使用两个铁氧体核，读取/再生周期时间为200纳秒。最近，G. J. amon和C. Neitzert描述了64字乘20位的薄磁薄膜存储器。这种存储器的读取/再生周期为125纳秒，其速度主要受到电子电路的限制。文献中已经报道了许多其他适合用作刮擦板的存储器和存储器设计。未来需要256到1024个字的存储器，周期时间为50纳秒。因此，开始了一个项目来研究这种制度的可行性。
{"title":"An experimental 65-nanosecond thin film scratchpad memory system","authors":"G. Ammon, C. Neitzert","doi":"10.1145/1463891.1463962","DOIUrl":"https://doi.org/10.1145/1463891.1463962","url":null,"abstract":"As computers become larger and more complex, the need for a high-speed scratchpad type memory becomes greater. Furthermore, the size and speed requirements increase. An early memory, suitable for use as a scratchpad, was described by H. Amemiya, R. L. Pryor, and T. R. Mayhew. This memory used two ferrite cores per bit and had a read/regenerate cycle time of 200 nanoseconds. More recently, a 64-word by 20-bit thin magnetic film memory was described by G. J. Ammon and C. Neitzert. This memory had a read/regenerate cycle time of 125 nanoseconds and its speed was limited primarily by the electronic circuitry. A number of other memories and memory designs, suitable for use as scratchpads, have been reported in the literature. Future need for a 256 to 1,024 word memory having a cycle time of 50 nanoseconds has been indicated. A project was therefore initiated to study the feasibility of such a system.","PeriodicalId":143723,"journal":{"name":"AFIPS '65 (Fall, part I)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1965-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"120884894","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The B8500 system is designed to deal with the following situation. A large number of active programs requiring various services are present in the system and their current status and required service are recorded. When some component of the system becomes available, e.g., processor, memory space, peripheral device, it is assigned to the active job of highest priority that requires this service. The important concept is that no component of the system belongs to any program but rather provides a service and then goes on to service another program. The main function of the executive scheduling program is to keep track of the services required by programs and to schedule the services when equipment becomes available.
{"title":"A design for a multiple user multiprocessing system","authors":"J. Mccullough, Kermith H. Speierman, F. Zurcher","doi":"10.1145/1463891.1463957","DOIUrl":"https://doi.org/10.1145/1463891.1463957","url":null,"abstract":"The B8500 system is designed to deal with the following situation. A large number of active programs requiring various services are present in the system and their current status and required service are recorded. When some component of the system becomes available, e.g., processor, memory space, peripheral device, it is assigned to the active job of highest priority that requires this service. The important concept is that no component of the system belongs to any program but rather provides a service and then goes on to service another program. The main function of the executive scheduling program is to keep track of the services required by programs and to schedule the services when equipment becomes available.","PeriodicalId":143723,"journal":{"name":"AFIPS '65 (Fall, part I)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1965-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126798763","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
In conjunction with studies of mechanizations for a 30-bit digital computer arithmetic unit, an investigation of techniques for checking arithmetic unit operations was conducted. The objectives were to provide maximum protection against undetected errors, while holding the cost of checking to a minimum. In addition, no loss of arithmetic unit speed should result. Finally, the checking process should give protection against memory-unit-induced errors.
{"title":"A checking arithmetic unit","authors":"Richard A. Davis","doi":"10.1145/1463891.1463969","DOIUrl":"https://doi.org/10.1145/1463891.1463969","url":null,"abstract":"In conjunction with studies of mechanizations for a 30-bit digital computer arithmetic unit, an investigation of techniques for checking arithmetic unit operations was conducted. The objectives were to provide maximum protection against undetected errors, while holding the cost of checking to a minimum. In addition, no loss of arithmetic unit speed should result. Finally, the checking process should give protection against memory-unit-induced errors.","PeriodicalId":143723,"journal":{"name":"AFIPS '65 (Fall, part I)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1965-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126823957","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Consider the problem of the design of a combinational circuit with A inputs and B outputs, where each of the output variables is given as a Boolean function of the input variables. Such a circuit might be part of the control unit of a digital computer, where the A inputs are the operation code of an instruction, and the B outputs are the signals which directly control the opening and closing of gates throughout the machine to effect an execution of that instruction. The circuit might be a code converter, where the A inputs are an input code (for example, the machine-code of an alphanumeric character); and the B outputs are an output code (for example, the pattern of signals required for a display of that character). The circuit might be a table look-up device, where, for example, the input variables are a code for the numeric value of a given argument, and the output variables are a code for the value of some function of that argument. Finally, the circuit might be considered as a memory, with fixed information stored, where the A input bits are an address, and the B output bits are the word stored at that address. It is called a "read-only" or "fixed" memory if the information stored is not alterable at electronic speeds.
{"title":"A survey of read-only memories","authors":"M. Lewin","doi":"10.1145/1463891.1463976","DOIUrl":"https://doi.org/10.1145/1463891.1463976","url":null,"abstract":"Consider the problem of the design of a combinational circuit with A inputs and B outputs, where each of the output variables is given as a Boolean function of the input variables. Such a circuit might be part of the control unit of a digital computer, where the A inputs are the operation code of an instruction, and the B outputs are the signals which directly control the opening and closing of gates throughout the machine to effect an execution of that instruction. The circuit might be a code converter, where the A inputs are an input code (for example, the machine-code of an alphanumeric character); and the B outputs are an output code (for example, the pattern of signals required for a display of that character). The circuit might be a table look-up device, where, for example, the input variables are a code for the numeric value of a given argument, and the output variables are a code for the value of some function of that argument. Finally, the circuit might be considered as a memory, with fixed information stored, where the A input bits are an address, and the B output bits are the word stored at that address. It is called a \"read-only\" or \"fixed\" memory if the information stored is not alterable at electronic speeds.","PeriodicalId":143723,"journal":{"name":"AFIPS '65 (Fall, part I)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1965-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126598001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
It is well known that given a suitable Boolean function, a large number of "gates" or "elements," each producing this function, can be interconnected in a regular structure, or "array," to realize any given Boolean function. Furthermore, the structure of the array can be invariant to the function being realized.
{"title":"Two-dimensional iterative logic","authors":"Rudd H. Canaday","doi":"10.1145/1463891.1463931","DOIUrl":"https://doi.org/10.1145/1463891.1463931","url":null,"abstract":"It is well known that given a suitable Boolean function, a large number of \"gates\" or \"elements,\" each producing this function, can be interconnected in a regular structure, or \"array,\" to realize any given Boolean function. Furthermore, the structure of the array can be invariant to the function being realized.","PeriodicalId":143723,"journal":{"name":"AFIPS '65 (Fall, part I)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1965-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121550906","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Of the many thousands of businesses in the United States today, it is probable that no two use identical office and accounting procedures. Yet in general it would be safe to say that in any business incoming data are processed, with reference to a file, using established procedures, to yield six broad types of results: 1. Updated file records. 2. Operational documents, such as invoices, purchase orders, pay checks, and the like. 3. Exception notices, status reports, and responses to inquiries regarding the standing of such items as accounts receivable, inventory or personnel records. 4. Historical documentation required by custom, law, auditors, tax officials or boards of directors, whether in the form of printed reports, microfilm or magnetic tape. 5. Reports required by management in addition to, or preferably in place of, the historical documentation mentioned above, consisting primarily of a listing of situations which vary substantially from established norms (that is, exception reports intended for executive policy-making as opposed to those needed by operating personnel). 6. Analytical results, such as sales forecasts and answers (obtained through simulation) to the question "What would happen if ... ?" so frequently asked by management and important to effective policy decisions.
{"title":"Responsive time-shared computing in business its significance and implications","authors":"C. W. Adams","doi":"10.1145/1463891.1463943","DOIUrl":"https://doi.org/10.1145/1463891.1463943","url":null,"abstract":"Of the many thousands of businesses in the United States today, it is probable that no two use identical office and accounting procedures. Yet in general it would be safe to say that in any business incoming data are processed, with reference to a file, using established procedures, to yield six broad types of results:\u0000 1. Updated file records.\u0000 2. Operational documents, such as invoices, purchase orders, pay checks, and the like.\u0000 3. Exception notices, status reports, and responses to inquiries regarding the standing of such items as accounts receivable, inventory or personnel records.\u0000 4. Historical documentation required by custom, law, auditors, tax officials or boards of directors, whether in the form of printed reports, microfilm or magnetic tape.\u0000 5. Reports required by management in addition to, or preferably in place of, the historical documentation mentioned above, consisting primarily of a listing of situations which vary substantially from established norms (that is, exception reports intended for executive policy-making as opposed to those needed by operating personnel).\u0000 6. Analytical results, such as sales forecasts and answers (obtained through simulation) to the question \"What would happen if ... ?\" so frequently asked by management and important to effective policy decisions.","PeriodicalId":143723,"journal":{"name":"AFIPS '65 (Fall, part I)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"1965-11-30","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121194007","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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