Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131563
Vivek Shivaram, S. H, Niranjan Hegde, Shubha B, Yogesh Pai, Venkatraj M
Semiconductor materials in power electronics are transitioning from silicon to Wide Band-Gap (WBG) semiconductors such as Silicon Carbide (SiC) and Gallium Nitride (GaN) due to their superior performance at higher power levels in automotive and industrial applications. The SiC MOSFET is a promising candidate for next generation power devices since it works at higher voltages, with higher switching speeds and higher thermal conductivity than conventional silicon (Si) devices. The preferred test method to measure the switching parameters of WBG is performed using the Double Pulse Test (DPT) method. Each oscilloscope probe has its own characteristic propagation delay contributing to varying delay in simultaneous acquisition of current and voltage during DPT. It is difficult to remove skew at high dynamic range because of the limitations of present de-skew fixtures. This paper proposes an algorithm to model drain to source voltage using current and to remove WBG waveform skew mathematically post waveform acquisition. This algorithm is demonstrated using WBG-DPT circuit with oscilloscopes analyzing switching loss. Also, the paper demonstrates the modelling of effective power loop inductance at WBG device transitions using drain to source voltage and drain current. The paper includes automation and optimization techniques to model effective power loop inductance in fewer iterations.
{"title":"A method to de-skew probes and estimate power loop inductance of WBG-DPT circuits","authors":"Vivek Shivaram, S. H, Niranjan Hegde, Shubha B, Yogesh Pai, Venkatraj M","doi":"10.1109/APEC43580.2023.10131563","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131563","url":null,"abstract":"Semiconductor materials in power electronics are transitioning from silicon to Wide Band-Gap (WBG) semiconductors such as Silicon Carbide (SiC) and Gallium Nitride (GaN) due to their superior performance at higher power levels in automotive and industrial applications. The SiC MOSFET is a promising candidate for next generation power devices since it works at higher voltages, with higher switching speeds and higher thermal conductivity than conventional silicon (Si) devices. The preferred test method to measure the switching parameters of WBG is performed using the Double Pulse Test (DPT) method. Each oscilloscope probe has its own characteristic propagation delay contributing to varying delay in simultaneous acquisition of current and voltage during DPT. It is difficult to remove skew at high dynamic range because of the limitations of present de-skew fixtures. This paper proposes an algorithm to model drain to source voltage using current and to remove WBG waveform skew mathematically post waveform acquisition. This algorithm is demonstrated using WBG-DPT circuit with oscilloscopes analyzing switching loss. Also, the paper demonstrates the modelling of effective power loop inductance at WBG device transitions using drain to source voltage and drain current. The paper includes automation and optimization techniques to model effective power loop inductance in fewer iterations.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126796505","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131484
Aditya P, Venkata Raghavendra, Satish Naik Banavath, Xiaoqing Song, A. Lidozzi, L. Piegari
The increasing population and improved human quality of life bring new challenges to the aircraft industry in terms of increased greenhouse gas emissions as a result of increased air travel. To bring down the carbon footprint of the aviation sector, it is high time to advance toward electrifying air transportation. Consequently, electrification instigates the complex electric power systems (EPS), that adopt low-voltage dc architecture at higher currents to handle high power demands. As the aircraft EPS results in hybrid microgrid demands for a faster protection system for fault interruptions. Among the three main classifications of dc circuit breakers (DCCB), solid-state circuit breakers (SSCB) provide faster fault isolation. SSCBs can aid in achieving less weight and small form factor flight-weight electric components that are competent with high power requirements. This article proposes a modified O-Z-source DCCB (MOZSCB) topology containing a thyristor as the main fault interrupting switch and a coupled inductor helping the commutation of the thyristor. The proposed topology is engaged with fewer components owing to lessening the weight/volume of the aircraft system and can interrupt the fault within 400µs. Also, the proposed topology is designed to overcome the drawbacks of previously reported conventional O-Z-source DCCB, such as negative current flow through the load during reclosing and unwanted power flow while it's commissioning. The proposed topology also mitigates the issues of high current stress on the thyristor while reclosing. To validate the performance of the proposed MOZSCB, a laboratory prototype has been built with a system rating of 270V/10A.
{"title":"Modified O-Z-Source DC Circuit Breaker for Electrical Power System Protection of Future Aircrafts","authors":"Aditya P, Venkata Raghavendra, Satish Naik Banavath, Xiaoqing Song, A. Lidozzi, L. Piegari","doi":"10.1109/APEC43580.2023.10131484","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131484","url":null,"abstract":"The increasing population and improved human quality of life bring new challenges to the aircraft industry in terms of increased greenhouse gas emissions as a result of increased air travel. To bring down the carbon footprint of the aviation sector, it is high time to advance toward electrifying air transportation. Consequently, electrification instigates the complex electric power systems (EPS), that adopt low-voltage dc architecture at higher currents to handle high power demands. As the aircraft EPS results in hybrid microgrid demands for a faster protection system for fault interruptions. Among the three main classifications of dc circuit breakers (DCCB), solid-state circuit breakers (SSCB) provide faster fault isolation. SSCBs can aid in achieving less weight and small form factor flight-weight electric components that are competent with high power requirements. This article proposes a modified O-Z-source DCCB (MOZSCB) topology containing a thyristor as the main fault interrupting switch and a coupled inductor helping the commutation of the thyristor. The proposed topology is engaged with fewer components owing to lessening the weight/volume of the aircraft system and can interrupt the fault within 400µs. Also, the proposed topology is designed to overcome the drawbacks of previously reported conventional O-Z-source DCCB, such as negative current flow through the load during reclosing and unwanted power flow while it's commissioning. The proposed topology also mitigates the issues of high current stress on the thyristor while reclosing. To validate the performance of the proposed MOZSCB, a laboratory prototype has been built with a system rating of 270V/10A.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126975604","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131388
Morteza Tadbiri Nooshabadi, J. Schanen, S. Farhangi, H. Iman‐Eini
This paper presents an EMC model in the frequency domain for grid connected three-phase photovoltaic inverters using the conventional Boost-Inverter topology. The aim is to estimate the EMC noises on both DC and AC sides, in order to design for instance EMI filters, or for any sensitivity analysis or optimization process. The model is developed and validated on an experimental prototype setup. The results are discussed, focusing on the contribution of each converter to the noise produced, both on the DC and AC sides by considering the impedance path of noises.
{"title":"Frequency Model for EMI Study of Three-Phase Grid Connected Photovoltaic Inverter on Both DC and AC Sides","authors":"Morteza Tadbiri Nooshabadi, J. Schanen, S. Farhangi, H. Iman‐Eini","doi":"10.1109/APEC43580.2023.10131388","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131388","url":null,"abstract":"This paper presents an EMC model in the frequency domain for grid connected three-phase photovoltaic inverters using the conventional Boost-Inverter topology. The aim is to estimate the EMC noises on both DC and AC sides, in order to design for instance EMI filters, or for any sensitivity analysis or optimization process. The model is developed and validated on an experimental prototype setup. The results are discussed, focusing on the contribution of each converter to the noise produced, both on the DC and AC sides by considering the impedance path of noises.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121383846","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131220
Jefferson Rafael Pereira de Assis, Juan Pereira Silva, Paulo Gabriel Martins Leandro, Darlan Alexandria Fernandes, M. Beltrao de Rossiter Correa, Fabiano Fragoso Costa, Alfeu Joãozinho Sguarezi Filho, Edison Roberto Cabral da Silva
In this work, it is presented an approach capable of improving an integrated power insertion and voltage compensation system via a nine-switch inverter (NSI). This inverter is set to correct asymmetrical faults in one of its operating modes. An instantaneous decomposition into sequence components (IDSC) method is used as a control part during the occurrence of asymmetrical faults in the grid. This is a feature added to this type of system so that it can work under asymmetry conditions. A real-time simulation system is carried out to corroborate the proposal. From the results obtained, it is concluded that the proposed additional functionality is promising, being able to add more robustness to the integrated system via NSI.
{"title":"Asymmetrical Faults Correction Capability in a Power Insertion and Voltage Compensation System","authors":"Jefferson Rafael Pereira de Assis, Juan Pereira Silva, Paulo Gabriel Martins Leandro, Darlan Alexandria Fernandes, M. Beltrao de Rossiter Correa, Fabiano Fragoso Costa, Alfeu Joãozinho Sguarezi Filho, Edison Roberto Cabral da Silva","doi":"10.1109/APEC43580.2023.10131220","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131220","url":null,"abstract":"In this work, it is presented an approach capable of improving an integrated power insertion and voltage compensation system via a nine-switch inverter (NSI). This inverter is set to correct asymmetrical faults in one of its operating modes. An instantaneous decomposition into sequence components (IDSC) method is used as a control part during the occurrence of asymmetrical faults in the grid. This is a feature added to this type of system so that it can work under asymmetry conditions. A real-time simulation system is carried out to corroborate the proposal. From the results obtained, it is concluded that the proposed additional functionality is promising, being able to add more robustness to the integrated system via NSI.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116337893","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131256
Nameer Khan, Katherine Liang, Tristan Robitaille, Gerard Villar Pique, J. Pigott, H. Bergveld, O. Trescases
Advancements in autonomous vehicles have led to a proliferation of onboard electronics, frequently making use of high-performance automotive-grade processors. To satisfy the resulting stringent operating requirements, the dc-dc Power Management Unit (PMU) of the processor must maintain strict voltage regulation, which is typically achieved with large and costly decoupling capacitors. This work proposes an auxiliary-assisted 4-to-1 Dual-Inductor-Hybrid (DIH) converter for fast transient response in 48V-1V applications. The auxiliary converter operates by tapping one of the flying capacitors of the DIH converter and regulates the output voltage using a capacitor-current-based Constant-On-Time control scheme. The 4-to-1 DIH converter acts as the main stage and delivers dc power from the 48V bus by regulating the auxiliary inductor current to avoid drawing dc power through the auxiliary stage. The auxiliary capacitance requirements are relaxed by leveraging the flying capacitor of the DIH converter as an energy reservoir. In simulation, the proposed system operates with a low auxiliary capacitance of 4.7 μF, which creates a 1V deviation on the auxiliary voltage during 20A load transients. A 40W experimental prototype demonstrates the feasibility of the proposed system, achieving a peak efficiency of 93.8%. The prototype regulates the output voltage of 1 V within ±60 mV with an output capacitor of only 650 μF while experiencing load transients up to 12.5 A.
{"title":"A 40W Dual-Inductor Hybrid Converter with Flying-Capacitor-Tapped Auxiliary Stage for Fast Transient Response in 48V PoL Automotive Applications","authors":"Nameer Khan, Katherine Liang, Tristan Robitaille, Gerard Villar Pique, J. Pigott, H. Bergveld, O. Trescases","doi":"10.1109/APEC43580.2023.10131256","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131256","url":null,"abstract":"Advancements in autonomous vehicles have led to a proliferation of onboard electronics, frequently making use of high-performance automotive-grade processors. To satisfy the resulting stringent operating requirements, the dc-dc Power Management Unit (PMU) of the processor must maintain strict voltage regulation, which is typically achieved with large and costly decoupling capacitors. This work proposes an auxiliary-assisted 4-to-1 Dual-Inductor-Hybrid (DIH) converter for fast transient response in 48V-1V applications. The auxiliary converter operates by tapping one of the flying capacitors of the DIH converter and regulates the output voltage using a capacitor-current-based Constant-On-Time control scheme. The 4-to-1 DIH converter acts as the main stage and delivers dc power from the 48V bus by regulating the auxiliary inductor current to avoid drawing dc power through the auxiliary stage. The auxiliary capacitance requirements are relaxed by leveraging the flying capacitor of the DIH converter as an energy reservoir. In simulation, the proposed system operates with a low auxiliary capacitance of 4.7 μF, which creates a 1V deviation on the auxiliary voltage during 20A load transients. A 40W experimental prototype demonstrates the feasibility of the proposed system, achieving a peak efficiency of 93.8%. The prototype regulates the output voltage of 1 V within ±60 mV with an output capacitor of only 650 μF while experiencing load transients up to 12.5 A.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121596839","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131155
Hsaio-Hsuan Chen, Chieh-Ju Tsai, Ching-Jan Chen
In this paper a 2uA quiescent current, passive-ramp (PSR) extended-Ton controlled buck converter IC is proposed for modern mobile silicon-on-chip (SoC) for a longer battery lifetime. From the small signal analysis, the proposed modulation scheme only needs a simple integrator error amplifier for regulation. With so, the trans conduction Gm of type-I integrator can be scaled with the output integrating capacitor and the operating current. Conversely, reducing the quiescent current of the error amplifier sacrifices the transient response especially for the dynamic voltage scaling, which is highly related to the slew rate of the error amplifier. A dynamic biased operational transconductance amplifier with unlimited output current is adopted to solve this issue and halves the settling time. The chip prototype is designed using a TSMC O.18um CMOS process. The post-layout simulation results show a 4MHz switching frequency, 2uA quiescent current, and a loading range from 30uA to 1.5A with > 85% efficiency. The load transient shows an 110m V undershoot voltages with a 1.5A/I00ns current step.
本文提出了一种2uA静态电流，无源斜坡(PSR)扩展吨控制降压转换器集成电路，用于现代移动硅片(SoC)，以延长电池寿命。从小信号分析来看，所提出的调制方案只需要一个简单的积分器误差放大器进行调节。这样，i型积分器的反导通Gm就可以随输出积分器电容和工作电流进行缩放。相反，减小误差放大器的静态电流会牺牲瞬态响应，特别是动态电压缩放，这与误差放大器的摆幅率高度相关。采用无限输出电流的动态偏置运算跨导放大器解决了这一问题，使建立时间缩短了一半。该芯片原型采用台积电0.18 um CMOS工艺设计。布局后仿真结果表明，开关频率为4MHz，静态电流为2uA，负载范围为30uA ~ 1.5A，效率> 85%。负载瞬态显示110m V欠冲电压，电流步进为1.5A/I00ns。
{"title":"A Monolithic 30uA – 1.5A > 85%-Efficiency, Passive-Ramp-Extended-Ton Controlled Buck Converter For Mobile SoC Fast DVS","authors":"Hsaio-Hsuan Chen, Chieh-Ju Tsai, Ching-Jan Chen","doi":"10.1109/APEC43580.2023.10131155","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131155","url":null,"abstract":"In this paper a 2uA quiescent current, passive-ramp (PSR) extended-Ton controlled buck converter IC is proposed for modern mobile silicon-on-chip (SoC) for a longer battery lifetime. From the small signal analysis, the proposed modulation scheme only needs a simple integrator error amplifier for regulation. With so, the trans conduction Gm of type-I integrator can be scaled with the output integrating capacitor and the operating current. Conversely, reducing the quiescent current of the error amplifier sacrifices the transient response especially for the dynamic voltage scaling, which is highly related to the slew rate of the error amplifier. A dynamic biased operational transconductance amplifier with unlimited output current is adopted to solve this issue and halves the settling time. The chip prototype is designed using a TSMC O.18um CMOS process. The post-layout simulation results show a 4MHz switching frequency, 2uA quiescent current, and a loading range from 30uA to 1.5A with > 85% efficiency. The load transient shows an 110m V undershoot voltages with a 1.5A/I00ns current step.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114771460","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131261
Shan He, Frede Blaabjerg
Capacitor current active damping can effectively enhance dissipativity of current control for grid-connected voltage source converters. However, the dissipative characteristic of converter output admittance can easily be jeopardized by capacitor voltage feedforward and passive filter parameter deviation. To fill this gap, a design-oriented control scheme is proposed in this paper. First, a moving-average-filter-based filter is inserted in the capacitor voltage feedforward path to achieve the dissipativity near the switching frequency. Then, the capacitor current damping coefficient is designed based on the required passive filter parameter deviation. Finally, the effectiveness of the proposed scheme is verified through the experiments.
{"title":"Design-Oriented Dissipativity Robustness Enhancement for Current Control of LCL- Filtered Grid-Following VSCs","authors":"Shan He, Frede Blaabjerg","doi":"10.1109/APEC43580.2023.10131261","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131261","url":null,"abstract":"Capacitor current active damping can effectively enhance dissipativity of current control for grid-connected voltage source converters. However, the dissipative characteristic of converter output admittance can easily be jeopardized by capacitor voltage feedforward and passive filter parameter deviation. To fill this gap, a design-oriented control scheme is proposed in this paper. First, a moving-average-filter-based filter is inserted in the capacitor voltage feedforward path to achieve the dissipativity near the switching frequency. Then, the capacitor current damping coefficient is designed based on the required passive filter parameter deviation. Finally, the effectiveness of the proposed scheme is verified through the experiments.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127642517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131607
G. Mondal, M. Finkenzeller, Hauke Nannen
Common Mode (CM) noise produced by modern high-frequency PWM converters needs special attention to handle. The problem with the CM noise is that it flows through the parasitic elements, which makes the design of the CM filter more challenging, without accurate knowledge of the parasitic components. This paper presents a passive filter topology, which improves the motor terminal voltage without using a dedicated CM choke. The topology minimizes the effect of parasitic capacitance up to several MHz and allows the reduction of the CM inductor. Additionally, it is also shown that with detailed mathematical modeling, the design of the passive filter can be done with the aid of a computer program. Wide Band Gap (WBG) device technology will allow higher switching frequencies for the converter to help reduction of the passive filter volume and cost. The switching frequency need to be part of the optimization routine which will result in customized passive filter for converters with different applications. The passive filter design needs to be automatic, to obtain quick results for a new design effortlessly. A detailed analysis and hardware verification of the proposed filter and the modeling method are presented in this paper. NPC 3 level, SiC (Silicon Carbide) MOSFET modules from Microsemi are used in the converter construction and the chosen switching frequency is 48 kHz. An RL load is used in place of the motor for simplicity.
{"title":"Improvement of Motor side converter voltage using Common Mode filter at the grid side converter in a grid connected Motor Drive system","authors":"G. Mondal, M. Finkenzeller, Hauke Nannen","doi":"10.1109/APEC43580.2023.10131607","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131607","url":null,"abstract":"Common Mode (CM) noise produced by modern high-frequency PWM converters needs special attention to handle. The problem with the CM noise is that it flows through the parasitic elements, which makes the design of the CM filter more challenging, without accurate knowledge of the parasitic components. This paper presents a passive filter topology, which improves the motor terminal voltage without using a dedicated CM choke. The topology minimizes the effect of parasitic capacitance up to several MHz and allows the reduction of the CM inductor. Additionally, it is also shown that with detailed mathematical modeling, the design of the passive filter can be done with the aid of a computer program. Wide Band Gap (WBG) device technology will allow higher switching frequencies for the converter to help reduction of the passive filter volume and cost. The switching frequency need to be part of the optimization routine which will result in customized passive filter for converters with different applications. The passive filter design needs to be automatic, to obtain quick results for a new design effortlessly. A detailed analysis and hardware verification of the proposed filter and the modeling method are presented in this paper. NPC 3 level, SiC (Silicon Carbide) MOSFET modules from Microsemi are used in the converter construction and the chosen switching frequency is 48 kHz. An RL load is used in place of the motor for simplicity.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127792059","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131615
Shiyi Liu, Heng Wu, Liang Zhao, Xiongfei Wang, T. Bosma, J. van der Burgt, G. Sauba
This paper builds the small-signal model and analyzes the dc impedance of machine-side converter (MSC) for grid-forming permanent synchronous generator (GFM-PMSG) wind turbines. It is revealed that MSC has little impact on the ac impedance model of GFM-PMSG wind turbines. This finding implies that the grid-side converter dynamics, which is equipped with the GFM control, plays a critical role in the dynamic interactions between GFM-PMSG wind turbines and the power grid. The nonlinear time-domain simulations are carried out to corroborate the theoretical analysis. Finally, experimental tests are carried out to corroborate the theoretical findings.
{"title":"Impact of Machine-Side Converter Dynamics on AC Impedance of Grid-Forming PMSG Wind Turbines","authors":"Shiyi Liu, Heng Wu, Liang Zhao, Xiongfei Wang, T. Bosma, J. van der Burgt, G. Sauba","doi":"10.1109/APEC43580.2023.10131615","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131615","url":null,"abstract":"This paper builds the small-signal model and analyzes the dc impedance of machine-side converter (MSC) for grid-forming permanent synchronous generator (GFM-PMSG) wind turbines. It is revealed that MSC has little impact on the ac impedance model of GFM-PMSG wind turbines. This finding implies that the grid-side converter dynamics, which is equipped with the GFM control, plays a critical role in the dynamic interactions between GFM-PMSG wind turbines and the power grid. The nonlinear time-domain simulations are carried out to corroborate the theoretical analysis. Finally, experimental tests are carried out to corroborate the theoretical findings.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128047350","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131564
Fabio Cacciotto, C. Adragna
This paper presents the feasibility study of a novel robust current-mode (CM) control method to regulate the output voltage of a Flyback converter operating in Quasi-resonant (QR) mode or Discontinuous Conduction Mode (DCM). Unlike the traditional CM technique, in the proposed solution the control variable of the loop is proportional to the dc output current. Therefore, the dc output current can be monitored from the primary side without current-sensing components or dedicated circuitry, and with a precision that is little affected by the tolerance of the parameters of the power stage. Also, unlike average current mode (ACM) control schemes used to regulate the output current, in which the averaging slows down the dynamics of the converter, this new method still provides the same excellent dynamic response as the traditional CM. In this paper a theoretical analysis of the new method is provided, showing the operating principle, the steady-state equations, and the small-signal analysis. The main nonidealities are discussed too. Finally, the simulation results will demonstrate feasibility and benefits of the method.
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