Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131424
Dehao Qin, Zheyu Zhang, S. K. Dam, Ching-Hsiang Yang, Zhou Dong, Ruirui Chen, Hua Bai, Fred Wang
To increase the current interrupting capability for the DC solid-state circuit breaker (DC-SSCB), power semiconductors need to possess a higher pulse current. Moreover, for the power electronics protection system, it is also important to enable the system with a fault current limitation capability. Accordingly, this paper aims to design an intelligent gate drive for DC-SSCB, which can operate in cryogenic conditions to increase interrupting capability of the SSCB. Meanwhile, the proposed intelligent gate drive also enables the SSCB to operate in the current limitation mode to limit the overcurrent in the aviation system. The current limitation mode can help the aviation system limit the inrush current during startup and realize fault ride-through for the healthy part when the fault occurs. Finally, test results based on a 200V/150A SSCB with the current limitation mode prototype verify the proposed intelligent gate drive design for SSCB with cryogenic cooling.
{"title":"Intelligent Gate Drive for Cryogenic Solid-state Circuit Breaker with Current Limitation Capability for Aviation Application","authors":"Dehao Qin, Zheyu Zhang, S. K. Dam, Ching-Hsiang Yang, Zhou Dong, Ruirui Chen, Hua Bai, Fred Wang","doi":"10.1109/APEC43580.2023.10131424","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131424","url":null,"abstract":"To increase the current interrupting capability for the DC solid-state circuit breaker (DC-SSCB), power semiconductors need to possess a higher pulse current. Moreover, for the power electronics protection system, it is also important to enable the system with a fault current limitation capability. Accordingly, this paper aims to design an intelligent gate drive for DC-SSCB, which can operate in cryogenic conditions to increase interrupting capability of the SSCB. Meanwhile, the proposed intelligent gate drive also enables the SSCB to operate in the current limitation mode to limit the overcurrent in the aviation system. The current limitation mode can help the aviation system limit the inrush current during startup and realize fault ride-through for the healthy part when the fault occurs. Finally, test results based on a 200V/150A SSCB with the current limitation mode prototype verify the proposed intelligent gate drive design for SSCB with cryogenic cooling.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128799362","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131486
Reza Rezaii, Sumana Ghosh, Md. Safayatullah, I. Batarseh
A five-port LLC converter for photovoltaic (PV) application is proposed in this paper. In this topology, a single LLC resonant tank is utilized to transfer the energy from four PV panels to the output. The PWM generation of all these switches depends on switching frequency and three phase shifts. Maximum power point tracking (MPPT) for all PV panels is achieved by adopting Perturb and Observe (P&O) based control method. A 500W prototype has been built and tested to verify the operation of the converter. The experimental results verify that the converter can achieve MPPT for each PV panel. The achieved peak efficiency of the converter is 94.3% when all four PV panels track their maximum power point (MPP) individually.
{"title":"Design and Implementation of a Five-Port LLC Converter for PV Applications","authors":"Reza Rezaii, Sumana Ghosh, Md. Safayatullah, I. Batarseh","doi":"10.1109/APEC43580.2023.10131486","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131486","url":null,"abstract":"A five-port LLC converter for photovoltaic (PV) application is proposed in this paper. In this topology, a single LLC resonant tank is utilized to transfer the energy from four PV panels to the output. The PWM generation of all these switches depends on switching frequency and three phase shifts. Maximum power point tracking (MPPT) for all PV panels is achieved by adopting Perturb and Observe (P&O) based control method. A 500W prototype has been built and tested to verify the operation of the converter. The experimental results verify that the converter can achieve MPPT for each PV panel. The achieved peak efficiency of the converter is 94.3% when all four PV panels track their maximum power point (MPP) individually.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128573841","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131278
Haoyuan Jin, Xiaobo Dong, Junduo Wen, Hang Kong, Y. Pei, Laili Wang
The dual active bridge (DAB) converter has been widely used as a dc transformer in high-power applications. The starting-up process of the DAB may induce a large inductor current and endanger the safe operation of the system. In addition, the parameters of the controller during the starting-up process should also be considered. This paper provides a novel starting-up method for DAB if the input voltage rises gradually. Using the given method, the starting-up process can be divided into three stages, including the input capacitor charging stage, open-loop control stage, and closed-loop control stage. The computer assistant simulation is used to determine the parameters of the controller. An experimental prototype is built to verify the effectiveness of the proposed method. The theoretical analysis, simulation result, and experiment result match well. The inductor's inrush current can be reduced effectively using the given method. Compared with other methods, the proposed method is easy to implement in some special cases.
{"title":"A Novel Starting-up Method for Dual Active Bridge Converter Based on Computer Assistant Simulation","authors":"Haoyuan Jin, Xiaobo Dong, Junduo Wen, Hang Kong, Y. Pei, Laili Wang","doi":"10.1109/APEC43580.2023.10131278","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131278","url":null,"abstract":"The dual active bridge (DAB) converter has been widely used as a dc transformer in high-power applications. The starting-up process of the DAB may induce a large inductor current and endanger the safe operation of the system. In addition, the parameters of the controller during the starting-up process should also be considered. This paper provides a novel starting-up method for DAB if the input voltage rises gradually. Using the given method, the starting-up process can be divided into three stages, including the input capacitor charging stage, open-loop control stage, and closed-loop control stage. The computer assistant simulation is used to determine the parameters of the controller. An experimental prototype is built to verify the effectiveness of the proposed method. The theoretical analysis, simulation result, and experiment result match well. The inductor's inrush current can be reduced effectively using the given method. Compared with other methods, the proposed method is easy to implement in some special cases.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128968993","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131281
A. Mahar, Ayesha Hassan, R. Murphree, Asif Faruque, Jeffrey De La Rosa Garcia, B. Parkhideh, H. Mantooth
A readout interface of a hybrid current sensor is implemented on an application specific integrated circuit to achieve wide bandwidth and higher resolution. The readout interface is implemented in the XFAB 180 nm SOI process. It amplifies the outputs from a low and a high frequency sensor and aggregates their response in an appropriate proportion in the frequency domain to achieve a flat wideband response. The system bandwidth of DC - 42.8 MHz is achieved. The amplifiers are compensated using the feedforward technique, which does not compromise bandwidth for stability. The output step response of 2.51 V amplitude is achieved with 19.84 ns of rise time in response to sensed step current of 10 A amplitude and 5 ns rise time. Hence, the measured sensitivity of the hybrid sensor with an on-chip readout interface is 251 mV/A. In comparison to the on-board readout implementation using commercial components, system bandwidth has increased by a factor of 4.25 in a similar test setup.
{"title":"An On-chip DC to 42.8 MHz Bandwidth Readout Interface for Hybrid Current Sensor","authors":"A. Mahar, Ayesha Hassan, R. Murphree, Asif Faruque, Jeffrey De La Rosa Garcia, B. Parkhideh, H. Mantooth","doi":"10.1109/APEC43580.2023.10131281","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131281","url":null,"abstract":"A readout interface of a hybrid current sensor is implemented on an application specific integrated circuit to achieve wide bandwidth and higher resolution. The readout interface is implemented in the XFAB 180 nm SOI process. It amplifies the outputs from a low and a high frequency sensor and aggregates their response in an appropriate proportion in the frequency domain to achieve a flat wideband response. The system bandwidth of DC - 42.8 MHz is achieved. The amplifiers are compensated using the feedforward technique, which does not compromise bandwidth for stability. The output step response of 2.51 V amplitude is achieved with 19.84 ns of rise time in response to sensed step current of 10 A amplitude and 5 ns rise time. Hence, the measured sensitivity of the hybrid sensor with an on-chip readout interface is 251 mV/A. In comparison to the on-board readout implementation using commercial components, system bandwidth has increased by a factor of 4.25 in a similar test setup.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129012360","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131656
Erick I. Pool-Mazun, Kevin Kim, P. Enjeti
This paper proposes a high current direct three-phase AC-DC rectifier with high-frequency transformer isolation configured as open-delta. The three-phase input voltages are modulated by two AC to AC converters to generate a high-frequency link at 20 kHz. The high-frequency link is then interfaced to two three phase rectifiers configured in 12-pulse by means of a high-frequency open-delta transformer arrangement. With the transformer core operating at high frequency operation, it is shown that the proposed configuration operates as a conventional line-frequency 12-pulse, resulting in high quality input currents with low THD. Furthermore, a phase shifted modulation is introduced to achieve zero voltage switching and to regulate the output DC voltage. An added benefit of the approach is the ability to regulate the output DC voltage/current by means of a simple duty cycle control of the high frequency (20kHz) modulating signal. The overall three-phase input currents are of high quality and near unity power factor due to the cancellation of 5th and 7th harmonics. The proposed approach substitutes the bulky line-frequency transformer with a high-frequency transformer, thereby achieving higher power density. Derivation of a small signal model of the converter is discussed for the design of DC closed loop. A 208 V 3-phase laboratory prototype demonstrates the validity of the concept.
{"title":"Direct Three-Phase AC-DC Rectifier with High-Frequency Open-Delta Transformer and Closed Loop Output Voltage Regulation","authors":"Erick I. Pool-Mazun, Kevin Kim, P. Enjeti","doi":"10.1109/APEC43580.2023.10131656","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131656","url":null,"abstract":"This paper proposes a high current direct three-phase AC-DC rectifier with high-frequency transformer isolation configured as open-delta. The three-phase input voltages are modulated by two AC to AC converters to generate a high-frequency link at 20 kHz. The high-frequency link is then interfaced to two three phase rectifiers configured in 12-pulse by means of a high-frequency open-delta transformer arrangement. With the transformer core operating at high frequency operation, it is shown that the proposed configuration operates as a conventional line-frequency 12-pulse, resulting in high quality input currents with low THD. Furthermore, a phase shifted modulation is introduced to achieve zero voltage switching and to regulate the output DC voltage. An added benefit of the approach is the ability to regulate the output DC voltage/current by means of a simple duty cycle control of the high frequency (20kHz) modulating signal. The overall three-phase input currents are of high quality and near unity power factor due to the cancellation of 5th and 7th harmonics. The proposed approach substitutes the bulky line-frequency transformer with a high-frequency transformer, thereby achieving higher power density. Derivation of a small signal model of the converter is discussed for the design of DC closed loop. A 208 V 3-phase laboratory prototype demonstrates the validity of the concept.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129024577","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131355
Bar Halivni, M. Peretz
This paper introduces a current controlled transmitter for WPT based on a differential Class E inverter with dual symmetrical LCL resonant networks for the transmitter and the receiver. The current control loop is implemented using a digital controller that maintains constant transmitter circulating current by adjusting the inverter input voltage using a pre-regulation stage. High frequency accurate current measurement has been carried out by a non-invasive, PCB integrated Rogowski current sensor. Sensor optimization procedure, and design considerations for the PCB integrated current sensor has been demonstrated via ANSYS MAXWELL simulation and verified experimentally. The differential Class E inverter operates in real-time ZVS operation using dedicated high frequency ZVS sensors with only few nano-second delay. The current controlled transmitter operation has been tested on a 12MHz 100W experimental prototype with all the required peripherals and sensing circuitry, alongside a capacitive medium emulator. The experimental prototype achieves peak efficiency of 83% and superior thermal performance.
{"title":"Current Controlled Transmitter for High Frequency WPT utilizing Non-Invasive PCB Integrated Rogowski Current Sensor","authors":"Bar Halivni, M. Peretz","doi":"10.1109/APEC43580.2023.10131355","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131355","url":null,"abstract":"This paper introduces a current controlled transmitter for WPT based on a differential Class E inverter with dual symmetrical LCL resonant networks for the transmitter and the receiver. The current control loop is implemented using a digital controller that maintains constant transmitter circulating current by adjusting the inverter input voltage using a pre-regulation stage. High frequency accurate current measurement has been carried out by a non-invasive, PCB integrated Rogowski current sensor. Sensor optimization procedure, and design considerations for the PCB integrated current sensor has been demonstrated via ANSYS MAXWELL simulation and verified experimentally. The differential Class E inverter operates in real-time ZVS operation using dedicated high frequency ZVS sensors with only few nano-second delay. The current controlled transmitter operation has been tested on a 12MHz 100W experimental prototype with all the required peripherals and sensing circuitry, alongside a capacitive medium emulator. The experimental prototype achieves peak efficiency of 83% and superior thermal performance.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124596861","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131542
Shubhangi Gurudiwan, Rees Hatch, Mahmoud Mansour, Hongjie Wang, R. Zane
This paper proposes a high-performance Unfolder-based single-stage ac-dc converter for electric vehicle battery charging applications. The dc-dc converter utilizes a T-type bridge structure to process the soft dc-link voltage generated from an Unfolder. The converter is designed to operate efficiently over a wide range of variations in the output and input voltages. A leading-edge aligned modulation technique is used to increase the soft switching range of the primary bridge switching devices. Coupling between two input ports of the dc-dc converter due to the unique modulation technique is discussed and a decoupling control strategy is introduced to achieve the two control objectives of power factor control and output current control. The proposed 18 kW module serves as a scalable building block for a modular extreme fast charging system. Hardware results from an 18 kW module are presented with 96.3% ac-dc and 97.3% dc-dc efficiency for rated operating conditions.
{"title":"An 18 kW Battery Charger Module for Extreme Fast Charging Applications Using an Unfolding-Based AC-DC Topology","authors":"Shubhangi Gurudiwan, Rees Hatch, Mahmoud Mansour, Hongjie Wang, R. Zane","doi":"10.1109/APEC43580.2023.10131542","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131542","url":null,"abstract":"This paper proposes a high-performance Unfolder-based single-stage ac-dc converter for electric vehicle battery charging applications. The dc-dc converter utilizes a T-type bridge structure to process the soft dc-link voltage generated from an Unfolder. The converter is designed to operate efficiently over a wide range of variations in the output and input voltages. A leading-edge aligned modulation technique is used to increase the soft switching range of the primary bridge switching devices. Coupling between two input ports of the dc-dc converter due to the unique modulation technique is discussed and a decoupling control strategy is introduced to achieve the two control objectives of power factor control and output current control. The proposed 18 kW module serves as a scalable building block for a modular extreme fast charging system. Hardware results from an 18 kW module are presented with 96.3% ac-dc and 97.3% dc-dc efficiency for rated operating conditions.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124600743","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131204
Ning Yan, Xiang Lin, D. Dong, R. Burgos
Due to the high voltage blocking capability and simple control method, the super-cascode topology can be implemented to develop a high-voltage switch. This paper presents a SiC MOSFET -based super-cascode switch used in the capacitor discharge circuit for medium voltage systems. Different design challenges including gate oscillations and gate discharge are mainly discussed. The solutions to overcome each issue are also provided with circuit modifications. Finally, a 22 kV super-cascode switch using ten SiC MOSFETs is developed in hardware for a 22 kV discharge circuit. The test results of the solid-state super-cascode switch as well as the discharge circuit are presented for performance verification.
{"title":"Design Challenges of the 22 kV Solid-State Switch for Capacitor Discharge Application Based on 3.3 kV SiC MOSFET Super-Cascode","authors":"Ning Yan, Xiang Lin, D. Dong, R. Burgos","doi":"10.1109/APEC43580.2023.10131204","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131204","url":null,"abstract":"Due to the high voltage blocking capability and simple control method, the super-cascode topology can be implemented to develop a high-voltage switch. This paper presents a SiC MOSFET -based super-cascode switch used in the capacitor discharge circuit for medium voltage systems. Different design challenges including gate oscillations and gate discharge are mainly discussed. The solutions to overcome each issue are also provided with circuit modifications. Finally, a 22 kV super-cascode switch using ten SiC MOSFETs is developed in hardware for a 22 kV discharge circuit. The test results of the solid-state super-cascode switch as well as the discharge circuit are presented for performance verification.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124662654","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131206
Feng Sun, Williem Agnihotri, Sumedh Dhale, S. Pradhan, Wesam Taha, B. Nahid-Mobarakeh
This paper presents a digital sliding-mode-based current regulator for the suppression of the undesirable circulating currents in a dual three-phase (DTP) permanent magnet synchronous machine (PMSM) drive. Due to their high frequency variation in synchronous reference frame and non-linear inductance variation, the suppression of the circulating currents is a challenging task. Following the principles of digital sliding-mode control, the proposed controller is capable of effectively suppressing the circulating currents. The performance evaluation of the proposed controller is performed in two modes, viz, equivalent control law based and equivalent control law with disturbance compensation. The former ignores the effect of inherent disturbances while the latter uses a simple unit time-steps delayed disturbance approximation. In this paper,the performance of both methods is compared to a conventional PI regulator in MATLAB/Simulink, and simulation results are verified experimentally. It is proved that the two proposed methods have better performances compared with PI controller.
{"title":"Digital Sliding-Mode-Based xy-Current Suppression in Dual Three-Phase PMSM Drives","authors":"Feng Sun, Williem Agnihotri, Sumedh Dhale, S. Pradhan, Wesam Taha, B. Nahid-Mobarakeh","doi":"10.1109/APEC43580.2023.10131206","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131206","url":null,"abstract":"This paper presents a digital sliding-mode-based current regulator for the suppression of the undesirable circulating currents in a dual three-phase (DTP) permanent magnet synchronous machine (PMSM) drive. Due to their high frequency variation in synchronous reference frame and non-linear inductance variation, the suppression of the circulating currents is a challenging task. Following the principles of digital sliding-mode control, the proposed controller is capable of effectively suppressing the circulating currents. The performance evaluation of the proposed controller is performed in two modes, viz, equivalent control law based and equivalent control law with disturbance compensation. The former ignores the effect of inherent disturbances while the latter uses a simple unit time-steps delayed disturbance approximation. In this paper,the performance of both methods is compared to a conventional PI regulator in MATLAB/Simulink, and simulation results are verified experimentally. It is proved that the two proposed methods have better performances compared with PI controller.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129453335","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131398
Plinio Bau, Sebastian Gavira-Duque, F. Rothan, Cédric Reymond, D. Bergogne
This work describes two designed and fabricated circuits for power device integration in 650 V e-mode GaN-on-Si technology and gives their main measured characteristics. The first circuit is a voltage reference designed to compensate process, voltage and temperature (PVT). The advantage of this circuit over state-of-the-art circuits is its performance of regulation, low current consumption and surface required (only 100 µm x 60 µm in the first prototype built). The second circuit is a zero-crossing current detector that is also designed to be insensitive to process variations. It exhibits stable static characteristics and bandwidth observed in simulation of more than 10 MHz. The convenience of this circuit is its simplicity because no differential amplifier is used to make a comparison. Both circuits are designed to be integrated with power transistors in GaN technology to be used in ACF or other topologies capable of switching at 650 V.
本文描述了两种设计和制造的功率器件集成电路，并给出了它们的主要测量特性。第一个电路是一个电压基准电路，用于补偿过程、电压和温度(PVT)。与最先进的电路相比，该电路的优势在于其调节性能，低电流消耗和表面要求(在第一个原型中仅为100 μ m x 60 μ m)。第二个电路是一个过零电流检测器，它也被设计成对工艺变化不敏感。它具有稳定的静态特性，在模拟中观察到的带宽大于10 MHz。这种电路的方便之处在于它的简单，因为不需要用差分放大器进行比较。这两种电路都被设计成与GaN技术中的功率晶体管集成，用于ACF或其他能够在650 V下切换的拓扑结构。
{"title":"Voltage Reference and Zero Current Detector Monolithically Integrated on p-GaN Technology Designed for Process Corners Compensation","authors":"Plinio Bau, Sebastian Gavira-Duque, F. Rothan, Cédric Reymond, D. Bergogne","doi":"10.1109/APEC43580.2023.10131398","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131398","url":null,"abstract":"This work describes two designed and fabricated circuits for power device integration in 650 V e-mode GaN-on-Si technology and gives their main measured characteristics. The first circuit is a voltage reference designed to compensate process, voltage and temperature (PVT). The advantage of this circuit over state-of-the-art circuits is its performance of regulation, low current consumption and surface required (only 100 µm x 60 µm in the first prototype built). The second circuit is a zero-crossing current detector that is also designed to be insensitive to process variations. It exhibits stable static characteristics and bandwidth observed in simulation of more than 10 MHz. The convenience of this circuit is its simplicity because no differential amplifier is used to make a comparison. Both circuits are designed to be integrated with power transistors in GaN technology to be used in ACF or other topologies capable of switching at 650 V.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129468461","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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