Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131525
Justin D. Johnston, M. Porter, K. Corzine, T. Weatherford
This paper demonstrates the closed-loop control of a buck converter circuit using EL signals generated in a GaN PN diode, used as the freewheeling diode. A method of calibration of the EL signal based on utilizing the known duty cycle of the current drive waveform and the current amplitude is introduced to predict the rea- time current. A double-PI control architecture is used to implement closed-loop output voltage control with the EL signal. The closed-loop response shows good agreement and stable control with less than 6% error in steady-state. During step responses in load and setpoint, large settling times are observed and explained by limitations in the hardware used for signal detection and current estimation via the EL signal. A discussion is presented for improving the response time and accuracy of EL based current estimation for better converter control performance.
{"title":"Closed-Loop Current Control of a Buck Converter via Sensing of Optical Emission from a GaN PN Freewheeling Diode","authors":"Justin D. Johnston, M. Porter, K. Corzine, T. Weatherford","doi":"10.1109/APEC43580.2023.10131525","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131525","url":null,"abstract":"This paper demonstrates the closed-loop control of a buck converter circuit using EL signals generated in a GaN PN diode, used as the freewheeling diode. A method of calibration of the EL signal based on utilizing the known duty cycle of the current drive waveform and the current amplitude is introduced to predict the rea- time current. A double-PI control architecture is used to implement closed-loop output voltage control with the EL signal. The closed-loop response shows good agreement and stable control with less than 6% error in steady-state. During step responses in load and setpoint, large settling times are observed and explained by limitations in the hardware used for signal detection and current estimation via the EL signal. A discussion is presented for improving the response time and accuracy of EL based current estimation for better converter control performance.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122298395","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131533
Vikas Kumar Rathore, M. Evzelman, M. Peretz
A coupled inductor based non-isolated boost extender with high conversion ratio is presented. The topology features higher power density due to the lower physical inductor cores count, with similar efficiency and component stresses as a conventional boost extender. Topology analysis, and its suitability for multiple extension inductor coupling is shown, coupling coefficient impact on the converter performance, and a short design guide is presented. An analysis and design of coupled inductor is demonstrated, and experimental prototype of 200W is developed and tested in the laboratory. The experimental prototype operated at maximum efficiency of 94.4% providing step up conversion ratio of 10.5, employing a coupled inductor the size of a single inductor of the conventional boost extender converter. The theoretical predictions were found to be in a good agreement with experimental results.
{"title":"Coupled Inductor Based Non-Isolated High Conversion Ratio Boost Extender","authors":"Vikas Kumar Rathore, M. Evzelman, M. Peretz","doi":"10.1109/APEC43580.2023.10131533","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131533","url":null,"abstract":"A coupled inductor based non-isolated boost extender with high conversion ratio is presented. The topology features higher power density due to the lower physical inductor cores count, with similar efficiency and component stresses as a conventional boost extender. Topology analysis, and its suitability for multiple extension inductor coupling is shown, coupling coefficient impact on the converter performance, and a short design guide is presented. An analysis and design of coupled inductor is demonstrated, and experimental prototype of 200W is developed and tested in the laboratory. The experimental prototype operated at maximum efficiency of 94.4% providing step up conversion ratio of 10.5, employing a coupled inductor the size of a single inductor of the conventional boost extender converter. The theoretical predictions were found to be in a good agreement with experimental results.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122674759","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131534
Yunhong Che, D. Stroe, Xin Sui, Sϕren Byg Vilsen, Xiaosong Hu, R. Teodorescu
Studying and analyzing battery aging behavior is crucial in battery health prognostic and management. This paper conducts novel and comprehensive experiments to evaluate battery aging under variable external stresses, including different dynamic load profiles and variable environmental temperatures. Respond analysis in the time and frequency domain is performed to account for the different aging rates under different current loadings, where the statistic calculation and fast Fourier transform are used for the analysis. The empirical model is used to fit the fade curve for the comparisons between constant and variable temperatures. The capacity decrease and internal resistance increase are extracted to evaluate capacity and power fade, respectively. The experimental results show that the urban dynamic operating conditions help to prolong the service life compared to the constant current aging case. In contrast, the aging under the highway profile accelerates the aging process. Although the average temperature is the same as under constant temperature conditions, variable temperature conditions accelerate battery aging.
{"title":"Battery Aging Behavior Evaluation Under Variable and Constant Temperatures with Real Loading Profiles","authors":"Yunhong Che, D. Stroe, Xin Sui, Sϕren Byg Vilsen, Xiaosong Hu, R. Teodorescu","doi":"10.1109/APEC43580.2023.10131534","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131534","url":null,"abstract":"Studying and analyzing battery aging behavior is crucial in battery health prognostic and management. This paper conducts novel and comprehensive experiments to evaluate battery aging under variable external stresses, including different dynamic load profiles and variable environmental temperatures. Respond analysis in the time and frequency domain is performed to account for the different aging rates under different current loadings, where the statistic calculation and fast Fourier transform are used for the analysis. The empirical model is used to fit the fade curve for the comparisons between constant and variable temperatures. The capacity decrease and internal resistance increase are extracted to evaluate capacity and power fade, respectively. The experimental results show that the urban dynamic operating conditions help to prolong the service life compared to the constant current aging case. In contrast, the aging under the highway profile accelerates the aging process. Although the average temperature is the same as under constant temperature conditions, variable temperature conditions accelerate battery aging.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122797041","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131498
Branko Majmunović, Yucheng Gao, Inder Kumar Vedula, S. Khandelwal, D. Maksimović
This paper presents a transformer-isolated high step-down dc-dc converter based on a stacked active bridge (SAB) configuration. The isolated SAB (iSAB) converter consists of series-stacked inverter modules and parallel-connected rectifier modules. To achieve galvanic isolation, transformers are inserted between the inverter and rectifier bridges. The nominal step-down conversion ratio is determined by the number of inverter modules and the turns ratio of the transformer. In order to reduce the footprint of the magnetic components, the transformers are coupled on a single core, and the series inductances are realized as controllable leakage inductances within the same magnetic structure using a novel custom core and planar winding arrangement, a solution unique to the iSAB configuration. The approach is verified by experimental results on a 400-to-48 V, 3kW, 400kHz iSAB prototype using low-voltage GaN devices and having 96.7% peak efficiency.
{"title":"400V-to-48V Transformer-Isolated Stacked Active Bridge Converter with Integrated Magnetics","authors":"Branko Majmunović, Yucheng Gao, Inder Kumar Vedula, S. Khandelwal, D. Maksimović","doi":"10.1109/APEC43580.2023.10131498","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131498","url":null,"abstract":"This paper presents a transformer-isolated high step-down dc-dc converter based on a stacked active bridge (SAB) configuration. The isolated SAB (iSAB) converter consists of series-stacked inverter modules and parallel-connected rectifier modules. To achieve galvanic isolation, transformers are inserted between the inverter and rectifier bridges. The nominal step-down conversion ratio is determined by the number of inverter modules and the turns ratio of the transformer. In order to reduce the footprint of the magnetic components, the transformers are coupled on a single core, and the series inductances are realized as controllable leakage inductances within the same magnetic structure using a novel custom core and planar winding arrangement, a solution unique to the iSAB configuration. The approach is verified by experimental results on a 400-to-48 V, 3kW, 400kHz iSAB prototype using low-voltage GaN devices and having 96.7% peak efficiency.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114187731","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131229
Yichi Zhang, Yi Zhang, Shuai Zhao, Bo Yao, Huai Wang
This paper proposes an analytical model to fit degradation data of insulated gate bipolar transistor (IGBT), based on physics understandings. Different from the empirical and data-driven modeling, the revealed failure mechanism, crack propagation and metallization reconstruction leading to the smaller bond contact area and the increased resistivity respectively, have been fully considered. With the help of elaborate geometry equivalence for topside interconnection, an analytical equation is established to quantify the contact resistance, and its variation corresponds to the change of on-state voltage. Consequently, the equation build the bridge between these directly degradation-related indicators (crack, resistivity) and accessible data (on-state voltage, current). Moreover, a concise equation is formulated to analyze the crack propagation while fully considering the existing fracture mechanics theory. And another flexible equation is tailored to quantify the influence of the evolution of metallization reconstruction on resistivity. Finally, power cycling testings are conducted with different test conditions, these data verify the improved performance of the proposed model compared to the existing ones.
{"title":"Physics-based Modeling of Packaging-related Degradation of IGBT Modules","authors":"Yichi Zhang, Yi Zhang, Shuai Zhao, Bo Yao, Huai Wang","doi":"10.1109/APEC43580.2023.10131229","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131229","url":null,"abstract":"This paper proposes an analytical model to fit degradation data of insulated gate bipolar transistor (IGBT), based on physics understandings. Different from the empirical and data-driven modeling, the revealed failure mechanism, crack propagation and metallization reconstruction leading to the smaller bond contact area and the increased resistivity respectively, have been fully considered. With the help of elaborate geometry equivalence for topside interconnection, an analytical equation is established to quantify the contact resistance, and its variation corresponds to the change of on-state voltage. Consequently, the equation build the bridge between these directly degradation-related indicators (crack, resistivity) and accessible data (on-state voltage, current). Moreover, a concise equation is formulated to analyze the crack propagation while fully considering the existing fracture mechanics theory. And another flexible equation is tailored to quantify the influence of the evolution of metallization reconstruction on resistivity. Finally, power cycling testings are conducted with different test conditions, these data verify the improved performance of the proposed model compared to the existing ones.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121876760","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131298
Thabet Alzahrani, M. Odavic, S. Thakur, K. Atallah
This paper develops a new analytical solution to the harmonic spectrum of the Full-Bridge Modular Multilevel Converter (FBMMC) dc-side based on phase-shifted carrier pulse width modulation and considering varying dc-link voltage operation. The harmonic distribution of the FBMMC dc-side voltage is analyzed through using double Fourier series analysis. Through the analysis, proper selection of the modulation indexes, carrier displacement angle, and the number of SMs can ensure a significant reduction in the dc-link switching-ripple voltage. Thus, the related filter can be removed or significantly reduced. The developed model is validated through simulation tests of a Grid-Tied FBMMC with a front-end three-phase diode rectifier without passive components in the dc-link,
{"title":"Analytical Modelling and Optimization of DC-Link Voltage Harmonic Spectra of Full-Bridge Modular Multilevel Converters for Buck and Boost Operation","authors":"Thabet Alzahrani, M. Odavic, S. Thakur, K. Atallah","doi":"10.1109/APEC43580.2023.10131298","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131298","url":null,"abstract":"This paper develops a new analytical solution to the harmonic spectrum of the Full-Bridge Modular Multilevel Converter (FBMMC) dc-side based on phase-shifted carrier pulse width modulation and considering varying dc-link voltage operation. The harmonic distribution of the FBMMC dc-side voltage is analyzed through using double Fourier series analysis. Through the analysis, proper selection of the modulation indexes, carrier displacement angle, and the number of SMs can ensure a significant reduction in the dc-link switching-ripple voltage. Thus, the related filter can be removed or significantly reduced. The developed model is validated through simulation tests of a Grid-Tied FBMMC with a front-end three-phase diode rectifier without passive components in the dc-link,","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121888182","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131222
Yilong Yao, Hong Zhang, Fengtao Yang, Hang Kong, Yan Wang, Xiaobo Dong, Laili Wang, Kangping Wang
Short switching time of gallium nitride high electrons mobility transistors (GaN HEMTs) cause much more challenge for their package and integration. This article1proposes a hybrid packaging method based on bonding wire technology. This interconnection method inevitably increases the parasitic inductance of drive loop, leading to crosstalk and gate oscillation. A driving strategy to suppress these phenomena is applied in the gate loop. Finally, a hybrid packaging intelligent power module combined with print circuit board and direct bonding ceramic is fabricated. The power loop stray inductance of GaN HEMT half bridge is reduced to 1.94nH according to the experiment result. Based on the GaN half bridge of designed module, a 2.14kW boost converter has been built in this paper and its peak efficiency reaches 98.28%.
{"title":"A Gallium Nitride Intelligent Power Module Based on Bonding Wire Interconnection","authors":"Yilong Yao, Hong Zhang, Fengtao Yang, Hang Kong, Yan Wang, Xiaobo Dong, Laili Wang, Kangping Wang","doi":"10.1109/APEC43580.2023.10131222","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131222","url":null,"abstract":"Short switching time of gallium nitride high electrons mobility transistors (GaN HEMTs) cause much more challenge for their package and integration. This article1proposes a hybrid packaging method based on bonding wire technology. This interconnection method inevitably increases the parasitic inductance of drive loop, leading to crosstalk and gate oscillation. A driving strategy to suppress these phenomena is applied in the gate loop. Finally, a hybrid packaging intelligent power module combined with print circuit board and direct bonding ceramic is fabricated. The power loop stray inductance of GaN HEMT half bridge is reduced to 1.94nH according to the experiment result. Based on the GaN half bridge of designed module, a 2.14kW boost converter has been built in this paper and its peak efficiency reaches 98.28%.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117043559","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131209
Kaichen Zhang, F. Iannuzzo
The power cycling withstand capability of power semiconductors is of great interest in determining the component's qualification and reliability performance. Compared to the traditional DC Power cycling test, the AC power cycling test can accelerate the component to fail under more realistic operating conditions. The wear process in the AC power cycling test depends on many parameters, among which the maximum junction temperature $T_{J}$, and temperature swing $Delta T_{j}$ are crucial to be determined. The traditional way in DC power cycling test is to measure the $T_{j}$ indirectly using the temperature-sensitive electrical parameter (TSEP) method, which is not very applicable during the AC power cycling test as it will increase the circuit complicity and may interrupt the PWM operation. The purpose of this paper is to evaluate a direct junction temperature measurement in an IGBT power module through silicone gel using optical fibers, which enables a fast and accurate $T_{j}$ determination during AC power cycling. For this purpose, junction temperatures have been measured for both gel-filled modules and gel-removed modules under different experimental conditions. The experimental results presented concern about: the presence of silicone gel's impact on the $T_{J}$ measurement accuracy, the temperature difference inside the silicone gel while the optical fiber is being instrumented at different positions, and the spatial temperature distributions of the IGBT chip. Future work will also include the comparison of the $T_{J}$ measurements of a gel-filled power module between using the optical fibers and the well-established TSEP method.
{"title":"Thermal Mapping of Power Modules Using Optical Fibers during AC Power Cycling Tests","authors":"Kaichen Zhang, F. Iannuzzo","doi":"10.1109/APEC43580.2023.10131209","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131209","url":null,"abstract":"The power cycling withstand capability of power semiconductors is of great interest in determining the component's qualification and reliability performance. Compared to the traditional DC Power cycling test, the AC power cycling test can accelerate the component to fail under more realistic operating conditions. The wear process in the AC power cycling test depends on many parameters, among which the maximum junction temperature $T_{J}$, and temperature swing $Delta T_{j}$ are crucial to be determined. The traditional way in DC power cycling test is to measure the $T_{j}$ indirectly using the temperature-sensitive electrical parameter (TSEP) method, which is not very applicable during the AC power cycling test as it will increase the circuit complicity and may interrupt the PWM operation. The purpose of this paper is to evaluate a direct junction temperature measurement in an IGBT power module through silicone gel using optical fibers, which enables a fast and accurate $T_{j}$ determination during AC power cycling. For this purpose, junction temperatures have been measured for both gel-filled modules and gel-removed modules under different experimental conditions. The experimental results presented concern about: the presence of silicone gel's impact on the $T_{J}$ measurement accuracy, the temperature difference inside the silicone gel while the optical fiber is being instrumented at different positions, and the spatial temperature distributions of the IGBT chip. Future work will also include the comparison of the $T_{J}$ measurements of a gel-filled power module between using the optical fibers and the well-established TSEP method.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128756389","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131167
Anik Chowdhury, Ashraf Siddiquee, Partha P. Mishra, M. Haque, Mithat J. Kisacikoglu, Alastair P. Thurlbeck, Edward Watt, Mohammad Arifur Rahman, Y. Sozer, Jeff Holt
Battery management systems (BMS) are essential for a battery pack's safe operation and longevity. This paper presents an active balancing method-based BMS for different cell chemistry structures to be used in behind-the-meter storage (BTMS) applications. The proposed system utilizes modular isolated dual active bridge (DAB) DC/DC converters to actively balance the battery pack through a low voltage (LV) bus. A supervisory controller monitors all the cell voltage, current, and state of charge (SOC) values. Based on the estimation of the SOCs, reference currents for the DAB converters are generated by the supervisory controller. Detailed modeling and the control approach of the modular DAB converters are presented in the paper. Moreover, the control strategy of the supervisory control is also analyzed. The proposed method and structure can be extended to any combination of the number of cells to design the battery pack. Simulation results are provided for a system consisting of three cells in parallel to form a cell block and three cell blocks in series to form the battery module. Experimental results are provided for three modular DAB converters operating with a LiFeMnPO4 prismatic cell with 3.2V, 20Ah rated values.
{"title":"Design of a Multi-Chemistry Battery Pack System for Behind-the-meter Storage Applications","authors":"Anik Chowdhury, Ashraf Siddiquee, Partha P. Mishra, M. Haque, Mithat J. Kisacikoglu, Alastair P. Thurlbeck, Edward Watt, Mohammad Arifur Rahman, Y. Sozer, Jeff Holt","doi":"10.1109/APEC43580.2023.10131167","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131167","url":null,"abstract":"Battery management systems (BMS) are essential for a battery pack's safe operation and longevity. This paper presents an active balancing method-based BMS for different cell chemistry structures to be used in behind-the-meter storage (BTMS) applications. The proposed system utilizes modular isolated dual active bridge (DAB) DC/DC converters to actively balance the battery pack through a low voltage (LV) bus. A supervisory controller monitors all the cell voltage, current, and state of charge (SOC) values. Based on the estimation of the SOCs, reference currents for the DAB converters are generated by the supervisory controller. Detailed modeling and the control approach of the modular DAB converters are presented in the paper. Moreover, the control strategy of the supervisory control is also analyzed. The proposed method and structure can be extended to any combination of the number of cells to design the battery pack. Simulation results are provided for a system consisting of three cells in parallel to form a cell block and three cell blocks in series to form the battery module. Experimental results are provided for three modular DAB converters operating with a LiFeMnPO4 prismatic cell with 3.2V, 20Ah rated values.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128791142","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2023-03-19DOI: 10.1109/APEC43580.2023.10131201
Jin Woong Kwak, D. Ma
In the search for high-density and high-efficiency large step-down DC-DC power converters, numerous hybrid converter topologies are reported recently, in which distinct power stages are merged in series to achieve a high step-down voltage conversion ratio. However, these topologies face immediate performance challenges due to the method of series topology combination, which not only increases power device count but also requires well-orchestrated timing control between these devices. To overcome such challenges, this paper presents a new quadratic step-down converter using an unorthodox method of topology superimposition. The resulting superimposed quadratic buck (SQB) converter requires the lowest power device count compared to prior arts. Thanks to the quadratic conversion ratio, the ON-time of the converter is substantially relaxed. It delivers power in parallel paths with minimized RMS current for high efficiency. Meanwhile, the output voltage ripples are largely reduced owing to the inherent inductor current ripple cancellation and the proposed inductor sizing scheme. An experimental prototype of this design achieves direct 48V-to-1V power conversion with a maximum load of 20A and a peak efficiency of 94.5%.
{"title":"Superimposed Quadratic Buck Converter for High-Efficiency Direct 48V/1V Applications","authors":"Jin Woong Kwak, D. Ma","doi":"10.1109/APEC43580.2023.10131201","DOIUrl":"https://doi.org/10.1109/APEC43580.2023.10131201","url":null,"abstract":"In the search for high-density and high-efficiency large step-down DC-DC power converters, numerous hybrid converter topologies are reported recently, in which distinct power stages are merged in series to achieve a high step-down voltage conversion ratio. However, these topologies face immediate performance challenges due to the method of series topology combination, which not only increases power device count but also requires well-orchestrated timing control between these devices. To overcome such challenges, this paper presents a new quadratic step-down converter using an unorthodox method of topology superimposition. The resulting superimposed quadratic buck (SQB) converter requires the lowest power device count compared to prior arts. Thanks to the quadratic conversion ratio, the ON-time of the converter is substantially relaxed. It delivers power in parallel paths with minimized RMS current for high efficiency. Meanwhile, the output voltage ripples are largely reduced owing to the inherent inductor current ripple cancellation and the proposed inductor sizing scheme. An experimental prototype of this design achieves direct 48V-to-1V power conversion with a maximum load of 20A and a peak efficiency of 94.5%.","PeriodicalId":151216,"journal":{"name":"2023 IEEE Applied Power Electronics Conference and Exposition (APEC)","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2023-03-19","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128793751","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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