Pub Date : 1994-03-29DOI: 10.1109/SOUTHC.1994.498126
H. Bahr
Event and process driven simulation techniques are developed to assess loading and throughput in a multiprocessor-based distributed data collection system. Aspects of both simulation techniques are utilized to facilitate rapid model development while retaining flexible selection of configuration parameters. Statistics obtained for expansion capability and latency times for normal and priority players indicate bus traffic itself is not a limiting parameter unless process size exceeds local memory capacity. However, channel loading can cause significant delays unless properly balanced.
{"title":"Combined event & process simulation model of a distributed data collection system","authors":"H. Bahr","doi":"10.1109/SOUTHC.1994.498126","DOIUrl":"https://doi.org/10.1109/SOUTHC.1994.498126","url":null,"abstract":"Event and process driven simulation techniques are developed to assess loading and throughput in a multiprocessor-based distributed data collection system. Aspects of both simulation techniques are utilized to facilitate rapid model development while retaining flexible selection of configuration parameters. Statistics obtained for expansion capability and latency times for normal and priority players indicate bus traffic itself is not a limiting parameter unless process size exceeds local memory capacity. However, channel loading can cause significant delays unless properly balanced.","PeriodicalId":164672,"journal":{"name":"Conference Record Southcon","volume":"42 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121768959","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-29DOI: 10.1109/SOUTHC.1994.498107
P. Neelakanta, J.C. Park
'Soft materials' refer to a class of electromagnetic composites consisting of shaped dielectric particles dispersed in a dielectric fluid subjected to an external applied field. It is known that for spherical suspensions, application of an external electric field of sufficient magnitude will produce chain-like agglomerations of particles in the complex fluid parallel to the applied field. This macroscopic characteristic of anisotropic particle-chain formation is a consequence of mutual dielectrophoresis of the particles via particle polarization. When there exists a dielectric mismatch between the particles and the suspension fluid, distortion of the field in the vicinity of the particle results. Interparticle interactions may also contribute to the local field anisotropicity. Existing studies have been directed at the theoretical description of such interparticle interactions pertinent to fluids containing spherical particles, however research on complex fluids having the inclusion of nonspherical particles are rather sparse. The authors consider the theoretical aspects of complex fluids or soft materials containing a suspension of non-spherical particles in order to evaluate the local electric field distributions and interparticle interaction forces when the fluid is subjected to an external electric field.
{"title":"Multipole expansion of the electric field potential in a soft electromagnetic composite","authors":"P. Neelakanta, J.C. Park","doi":"10.1109/SOUTHC.1994.498107","DOIUrl":"https://doi.org/10.1109/SOUTHC.1994.498107","url":null,"abstract":"'Soft materials' refer to a class of electromagnetic composites consisting of shaped dielectric particles dispersed in a dielectric fluid subjected to an external applied field. It is known that for spherical suspensions, application of an external electric field of sufficient magnitude will produce chain-like agglomerations of particles in the complex fluid parallel to the applied field. This macroscopic characteristic of anisotropic particle-chain formation is a consequence of mutual dielectrophoresis of the particles via particle polarization. When there exists a dielectric mismatch between the particles and the suspension fluid, distortion of the field in the vicinity of the particle results. Interparticle interactions may also contribute to the local field anisotropicity. Existing studies have been directed at the theoretical description of such interparticle interactions pertinent to fluids containing spherical particles, however research on complex fluids having the inclusion of nonspherical particles are rather sparse. The authors consider the theoretical aspects of complex fluids or soft materials containing a suspension of non-spherical particles in order to evaluate the local electric field distributions and interparticle interaction forces when the fluid is subjected to an external electric field.","PeriodicalId":164672,"journal":{"name":"Conference Record Southcon","volume":"11 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127727334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-29DOI: 10.1109/SOUTHC.1994.498146
W.H. Shaw, J. Ball, L. Martin-Vega, H.K. Brown
This paper describes the use of multimedia technology to deliver the results of a study to investigate whether investments in R&D could have significant impact in either reducing the cost and/or enhancing the effectiveness of manufacturing assembly. The electronics assembly area is specifically considered and opportunities for R&D investment are presented. We use extensive graphics, sound, and animation in a multimedia software system to explain the findings of this research to audiences with widely varied backgrounds. We describe how this approach to research documentation is effectively used to convey complex, interrelated concepts that are uncovered during a research effort by concurrently building the delivery system with the ongoing research. We envision the use of this technology as an improvement on the conventional technical report and describe our experience with the technology.
{"title":"Multimedia-based delivery of research findings","authors":"W.H. Shaw, J. Ball, L. Martin-Vega, H.K. Brown","doi":"10.1109/SOUTHC.1994.498146","DOIUrl":"https://doi.org/10.1109/SOUTHC.1994.498146","url":null,"abstract":"This paper describes the use of multimedia technology to deliver the results of a study to investigate whether investments in R&D could have significant impact in either reducing the cost and/or enhancing the effectiveness of manufacturing assembly. The electronics assembly area is specifically considered and opportunities for R&D investment are presented. We use extensive graphics, sound, and animation in a multimedia software system to explain the findings of this research to audiences with widely varied backgrounds. We describe how this approach to research documentation is effectively used to convey complex, interrelated concepts that are uncovered during a research effort by concurrently building the delivery system with the ongoing research. We envision the use of this technology as an improvement on the conventional technical report and describe our experience with the technology.","PeriodicalId":164672,"journal":{"name":"Conference Record Southcon","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134156855","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-29DOI: 10.1109/SOUTHC.1994.498166
J. Qian, I. Batarseh
In this paper, we review the development of power factor correction circuits (PFCC) and present the requirements for PFCCs. A high power factor correction topology proposed with a single stage is analyzed and evaluated. The two outputs of the converter can be controlled independently using different control techniques. Because this power factor circuit handles only partial power delivered to the load and can operate at zero-voltage-switching (ZVS), it has relative high efficiency compared with conventional converters. It is shown that high power factor can be achieved even without active control based on the natural characteristics of resonant converter. The Pspice simulation results verified the theoretical approach.
{"title":"Analysis and Pspice simulation of family of resonant power factor correction circuits","authors":"J. Qian, I. Batarseh","doi":"10.1109/SOUTHC.1994.498166","DOIUrl":"https://doi.org/10.1109/SOUTHC.1994.498166","url":null,"abstract":"In this paper, we review the development of power factor correction circuits (PFCC) and present the requirements for PFCCs. A high power factor correction topology proposed with a single stage is analyzed and evaluated. The two outputs of the converter can be controlled independently using different control techniques. Because this power factor circuit handles only partial power delivered to the load and can operate at zero-voltage-switching (ZVS), it has relative high efficiency compared with conventional converters. It is shown that high power factor can be achieved even without active control based on the natural characteristics of resonant converter. The Pspice simulation results verified the theoretical approach.","PeriodicalId":164672,"journal":{"name":"Conference Record Southcon","volume":"24 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134584361","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-29DOI: 10.1109/SOUTHC.1994.498171
D. Verma
Very large scale integrated circuits (VLSI) are growing in size, complexity, and circuit density at a very fast pace. There is no limit in the foreseeable future to the amount of intelligence architects would like to see on a single piece of silicon. Technology is keeping good pace with the growing demand of complete "systems" by increasing density. A few million transistors on one chip are already becoming common-place. The development of the architecture of such chips is, however, hampered by the lack of tools. This paper focuses on a very crucial issue, one of confidence in the internal architecture of a VLSI circuit before committing the design to silicon. The SES/Workbench by Scientific and Engineering Software has proven to be a useful tool in early architectural analysis of complex VLSI circuits. The circuit's system level architecture can be modelled fairly quickly to yield results that can save time, money, and resources to design optimum circuits with well understood performance characteristics, without taking recourse to fabricating the chip prototypes. The simulations on the resulting model "run" in reasonable time (million clocks/hr) to provide "on-line" feedback for fine tuning the design.
{"title":"Very large scale integrated circuit architecture performance evaluation using SES modelling tools","authors":"D. Verma","doi":"10.1109/SOUTHC.1994.498171","DOIUrl":"https://doi.org/10.1109/SOUTHC.1994.498171","url":null,"abstract":"Very large scale integrated circuits (VLSI) are growing in size, complexity, and circuit density at a very fast pace. There is no limit in the foreseeable future to the amount of intelligence architects would like to see on a single piece of silicon. Technology is keeping good pace with the growing demand of complete \"systems\" by increasing density. A few million transistors on one chip are already becoming common-place. The development of the architecture of such chips is, however, hampered by the lack of tools. This paper focuses on a very crucial issue, one of confidence in the internal architecture of a VLSI circuit before committing the design to silicon. The SES/Workbench by Scientific and Engineering Software has proven to be a useful tool in early architectural analysis of complex VLSI circuits. The circuit's system level architecture can be modelled fairly quickly to yield results that can save time, money, and resources to design optimum circuits with well understood performance characteristics, without taking recourse to fabricating the chip prototypes. The simulations on the resulting model \"run\" in reasonable time (million clocks/hr) to provide \"on-line\" feedback for fine tuning the design.","PeriodicalId":164672,"journal":{"name":"Conference Record Southcon","volume":"27 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114515100","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-29DOI: 10.1109/SOUTHC.1994.498131
F. Pavuza
Sine signals are fundamental test signals used in electronic test procedures for industrial measurements, digital audio or communication equipment, to mention a few applications. Computer controlled test systems suggest the use of digitally generated test signals. The sine signal as the basic test signal (and the starting point for the compilation of more complex periodic signals) can be calculated by many different algorithms depending on the requirements, particularly calculation speed and accuracy. After a survey of hardware based solutions, the paper derives the mathematical basis for software algorithms suitable for generating a sine signal. Properties of some mathematical series and other comparable mathematical calculation schemes are examined, the effects of truncation and rounding with respect to the word-length of the memory or the signal processor are investigated.
{"title":"Calculation and implementation of digital sine signals for test and measurement","authors":"F. Pavuza","doi":"10.1109/SOUTHC.1994.498131","DOIUrl":"https://doi.org/10.1109/SOUTHC.1994.498131","url":null,"abstract":"Sine signals are fundamental test signals used in electronic test procedures for industrial measurements, digital audio or communication equipment, to mention a few applications. Computer controlled test systems suggest the use of digitally generated test signals. The sine signal as the basic test signal (and the starting point for the compilation of more complex periodic signals) can be calculated by many different algorithms depending on the requirements, particularly calculation speed and accuracy. After a survey of hardware based solutions, the paper derives the mathematical basis for software algorithms suitable for generating a sine signal. Properties of some mathematical series and other comparable mathematical calculation schemes are examined, the effects of truncation and rounding with respect to the word-length of the memory or the signal processor are investigated.","PeriodicalId":164672,"journal":{"name":"Conference Record Southcon","volume":"95 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115890048","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-29DOI: 10.1109/SOUTHC.1994.498144
R. Kalathur, M. Bassiouni
Conventional data reliability techniques such as retransmission-based error recovery schemes can result in intolerable storage requirements and data delay when used in high bandwidth delay-product networks. In this case forward error correction (FEC) can be used. FEC allows the destination to reconstruct missing data packets by using redundant parity packets that the source adds to each block of data packets. This pager uses simulation to study the loss behaviour of an output buffered cell multiplexer for different traffic scenarios. We add intelligence to various space priority buffer algorithms in order to disperse missing packets among many blocks, thereby reducing the block loss rate and the required coding complexity. We then investigate the effectiveness of FEC schemes together with buffer management algorithms for different traffic scenarios.
{"title":"Forward error correction with buffer management in multimedia ATM networks","authors":"R. Kalathur, M. Bassiouni","doi":"10.1109/SOUTHC.1994.498144","DOIUrl":"https://doi.org/10.1109/SOUTHC.1994.498144","url":null,"abstract":"Conventional data reliability techniques such as retransmission-based error recovery schemes can result in intolerable storage requirements and data delay when used in high bandwidth delay-product networks. In this case forward error correction (FEC) can be used. FEC allows the destination to reconstruct missing data packets by using redundant parity packets that the source adds to each block of data packets. This pager uses simulation to study the loss behaviour of an output buffered cell multiplexer for different traffic scenarios. We add intelligence to various space priority buffer algorithms in order to disperse missing packets among many blocks, thereby reducing the block loss rate and the required coding complexity. We then investigate the effectiveness of FEC schemes together with buffer management algorithms for different traffic scenarios.","PeriodicalId":164672,"journal":{"name":"Conference Record Southcon","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117077787","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-29DOI: 10.1109/SOUTHC.1994.498135
T. Grebe
Power quality is a growing concern on electric power systems. Customers are requiring a higher quality of service as a result of more sensitive electronic and computer-controlled loads. Capacitor switching events and voltage sags associated with remote faults that never caused problems in the past now cause equipment tripping and even failures within customer facilities. Also, customer loads are generating increasing amounts of harmonic currents that can be magnified on the distribution system due to resonance conditions. This paper presents an overview of three important power quality concerns: harmonics; transients; and voltage sags.
{"title":"Power quality and the utility/customer interface","authors":"T. Grebe","doi":"10.1109/SOUTHC.1994.498135","DOIUrl":"https://doi.org/10.1109/SOUTHC.1994.498135","url":null,"abstract":"Power quality is a growing concern on electric power systems. Customers are requiring a higher quality of service as a result of more sensitive electronic and computer-controlled loads. Capacitor switching events and voltage sags associated with remote faults that never caused problems in the past now cause equipment tripping and even failures within customer facilities. Also, customer loads are generating increasing amounts of harmonic currents that can be magnified on the distribution system due to resonance conditions. This paper presents an overview of three important power quality concerns: harmonics; transients; and voltage sags.","PeriodicalId":164672,"journal":{"name":"Conference Record Southcon","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114619374","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-29DOI: 10.1109/SOUTHC.1994.498139
A. Sundaram, H. Mehta, V. Tahiliani
Industrial and commercial customers are adding computer controlled and microprocessor-based equipment at an ever increasing rate. Although these sophisticated devices enhance the productivity of these customers, they are not without their own set of unique power requirements. One of these requirements is the need of high quality power containing minimal voltage variations. Line voltage sags and surges, momentary outages, transients and harmonic distortion, although brief, can adversely affect the performance of these sophisticated devices. These customers are not able to cope with the short interruptions caused by faults and involving breaker reclosing or feeder switching actions. CUSTOM POWER technology integrates modern power electronics-based controllers with distribution automation, integrated utility communications and lightning research to produce high quality power. This CUSTOM POWER provides the electric utility industry with a technology option to meet the power quality needs of customers who have sensitive microprocessor loads. In addition to receiving quality power customers can avoid the significant electrical losses that often occur from customer-installed power conditioning equipment such as uninterruptible power supplies.
{"title":"CUSTOM POWER - EPRI's response to power quality issues","authors":"A. Sundaram, H. Mehta, V. Tahiliani","doi":"10.1109/SOUTHC.1994.498139","DOIUrl":"https://doi.org/10.1109/SOUTHC.1994.498139","url":null,"abstract":"Industrial and commercial customers are adding computer controlled and microprocessor-based equipment at an ever increasing rate. Although these sophisticated devices enhance the productivity of these customers, they are not without their own set of unique power requirements. One of these requirements is the need of high quality power containing minimal voltage variations. Line voltage sags and surges, momentary outages, transients and harmonic distortion, although brief, can adversely affect the performance of these sophisticated devices. These customers are not able to cope with the short interruptions caused by faults and involving breaker reclosing or feeder switching actions. CUSTOM POWER technology integrates modern power electronics-based controllers with distribution automation, integrated utility communications and lightning research to produce high quality power. This CUSTOM POWER provides the electric utility industry with a technology option to meet the power quality needs of customers who have sensitive microprocessor loads. In addition to receiving quality power customers can avoid the significant electrical losses that often occur from customer-installed power conditioning equipment such as uninterruptible power supplies.","PeriodicalId":164672,"journal":{"name":"Conference Record Southcon","volume":"56 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129057405","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1994-03-29DOI: 10.1109/SOUTHC.1994.498175
M. Muegge, D. Chenoweth
Speciality memories, such as FIFO devices, derive their high performance from their architecture as well as their underlying technology. The need for higher speed in FIFO devices has resulted in the introduction of faster and faster devices, with access times as low as 10 ns, such as the QS7204-10. Nevertheless, traditional FIFO interfaces, even at the 10 ns access time level, fall short of meeting today's leading edge CPU performance requirements. Clocked interfaces allow better utilization of the memory bandwidth and can provide data rates of 66 MHz and beyond in real world system environments. High speed, 36 bit wide FIFO devices, packaged in the fine pitch TQFP package, enable high performance, high density system designs. This paper focuses on three aspects of FIFO devices: speed, word depth, and additional value added features to show how these enhancements can boost system performance and board efficiency.
{"title":"36 bit wide FIFO for deep, bus oriented applications","authors":"M. Muegge, D. Chenoweth","doi":"10.1109/SOUTHC.1994.498175","DOIUrl":"https://doi.org/10.1109/SOUTHC.1994.498175","url":null,"abstract":"Speciality memories, such as FIFO devices, derive their high performance from their architecture as well as their underlying technology. The need for higher speed in FIFO devices has resulted in the introduction of faster and faster devices, with access times as low as 10 ns, such as the QS7204-10. Nevertheless, traditional FIFO interfaces, even at the 10 ns access time level, fall short of meeting today's leading edge CPU performance requirements. Clocked interfaces allow better utilization of the memory bandwidth and can provide data rates of 66 MHz and beyond in real world system environments. High speed, 36 bit wide FIFO devices, packaged in the fine pitch TQFP package, enable high performance, high density system designs. This paper focuses on three aspects of FIFO devices: speed, word depth, and additional value added features to show how these enhancements can boost system performance and board efficiency.","PeriodicalId":164672,"journal":{"name":"Conference Record Southcon","volume":"49 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1994-03-29","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127146603","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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