Pub Date : 1980-09-01DOI: 10.1109/ESSCIRC.1980.5468813
P. Saul
This paper describes 8- and 10-bit successive approximation analogue to digital converters operating at video speeds.
本文介绍了以视频速度工作的8位和10位连续近似模拟数字转换器。
{"title":"Successive Approximation Analogue to Digital Conversion at Video Rates","authors":"P. Saul","doi":"10.1109/ESSCIRC.1980.5468813","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468813","url":null,"abstract":"This paper describes 8- and 10-bit successive approximation analogue to digital converters operating at video speeds.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"102 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124202287","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1980-09-01DOI: 10.1109/ESSCIRC.1980.5468809
A. Astier
This CCD consists of two identical, independent 512-element registers, and uses buried N-channel polysilicon technology. Designed for analog signal processing at audio to video frequencies, it features easy operation.
{"title":"CCD Analog Delay Line with 2 × 512 Multiplexed Elements","authors":"A. Astier","doi":"10.1109/ESSCIRC.1980.5468809","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468809","url":null,"abstract":"This CCD consists of two identical, independent 512-element registers, and uses buried N-channel polysilicon technology. Designed for analog signal processing at audio to video frequencies, it features easy operation.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"79 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122180217","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1980-09-01DOI: 10.1109/ESSCIRC.1980.5468812
H. Fiedler, B. Hoefflinger, W. Demmer, P. Draheim
This paper presents a monolithic, fully parallel 5-bit NMOS A/D converter. The chip is fabricated using a standard metal-gate enhancement/depletion technology with 7 μm minimum features. It contains 31 strobed comparators, latches, combinational logic, a 5 by 31 ROM, TTL buffers and a 4-bit DAC. This makes it a building block for two-step 8-bit converters. The chip was fully characterised at 20 megasamples per seconds. The dc linearity was better than 1/4 LSB for 80 mV step size.
本文提出了一种单片全并行5位NMOS a /D转换器。该芯片采用最小特征为7 μm的标准金属栅增强/耗尽技术制造。它包含31个频闪比较器、锁存器、组合逻辑、一个5 × 31 ROM、TTL缓冲器和一个4位DAC。这使它成为两步8位转换器的构建块。该芯片以每秒20兆样本的速度被完全表征。当步长为80 mV时,直流线性度优于1/4 LSB。
{"title":"A 5-Bit Building Block for 20 MHz NMOS A/D Converters","authors":"H. Fiedler, B. Hoefflinger, W. Demmer, P. Draheim","doi":"10.1109/ESSCIRC.1980.5468812","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468812","url":null,"abstract":"This paper presents a monolithic, fully parallel 5-bit NMOS A/D converter. The chip is fabricated using a standard metal-gate enhancement/depletion technology with 7 μm minimum features. It contains 31 strobed comparators, latches, combinational logic, a 5 by 31 ROM, TTL buffers and a 4-bit DAC. This makes it a building block for two-step 8-bit converters. The chip was fully characterised at 20 megasamples per seconds. The dc linearity was better than 1/4 LSB for 80 mV step size.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122218986","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1980-09-01DOI: 10.1109/ESSCIRC.1980.5468789
Philippe Matherat, D. Bouteaud, N. Forget, J. Lebrun, J. Moreau
The first soon available true graphic display processor (G.D.P.) will be presented. It displays an up to 512 × 512 portion of a 4 096 × 4 096 pixel image. Vector drawing speed reaches 560 ns/pixel and 96 variable size and orientation characters are available.
{"title":"A High-Performance Integrated True Graphic Processor","authors":"Philippe Matherat, D. Bouteaud, N. Forget, J. Lebrun, J. Moreau","doi":"10.1109/ESSCIRC.1980.5468789","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468789","url":null,"abstract":"The first soon available true graphic display processor (G.D.P.) will be presented. It displays an up to 512 × 512 portion of a 4 096 × 4 096 pixel image. Vector drawing speed reaches 560 ns/pixel and 96 variable size and orientation characters are available.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"108 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123168886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1980-09-01DOI: 10.1109/ESSCIRC.1980.5468740
B. Prazic, J. Stenton, M. Manley, P. Mole
A complete suite of computer programs is described for custom LSI design with the ULA. The Array is designed in silicon-gate CMOS/SOS and contains 512 cells and 64 bonding pads.
{"title":"Computer-Aided Custom LSI Design with the ULA","authors":"B. Prazic, J. Stenton, M. Manley, P. Mole","doi":"10.1109/ESSCIRC.1980.5468740","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468740","url":null,"abstract":"A complete suite of computer programs is described for custom LSI design with the ULA. The Array is designed in silicon-gate CMOS/SOS and contains 512 cells and 64 bonding pads.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123532797","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1980-09-01DOI: 10.1109/ESSCIRC.1980.5468810
M. Feldmann, J. Henaff
A new fully integrated recursive charge transfer filter is described using the concept of passive recirculation of charges. This is a novel solution for voice channel filters in digital communications.
{"title":"A New Charge Routing Filter","authors":"M. Feldmann, J. Henaff","doi":"10.1109/ESSCIRC.1980.5468810","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468810","url":null,"abstract":"A new fully integrated recursive charge transfer filter is described using the concept of passive recirculation of charges. This is a novel solution for voice channel filters in digital communications.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"1 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131829111","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1980-09-01DOI: 10.1109/ESSCIRC.1980.5468763
G. Meusburger
A new kind of a low power 256x4 bit static RAM manufactured in a low power CMOS-Process, using a single 1.5 Volt supply is presented. A new concept of controlling the circuit permits an 8 pin package.
{"title":"1.5V 1K-CMOS-RAM has only 8 pins","authors":"G. Meusburger","doi":"10.1109/ESSCIRC.1980.5468763","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468763","url":null,"abstract":"A new kind of a low power 256x4 bit static RAM manufactured in a low power CMOS-Process, using a single 1.5 Volt supply is presented. A new concept of controlling the circuit permits an 8 pin package.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"83 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125451568","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1980-09-01DOI: 10.1109/ESSCIRC.1980.5468782
A. El Hennawy, R. Lemaitre, D. Barbier
The current to frequency converter (CIF) is fully integrated in aluminium gate P channel E/D MOS technology. It is designed for measuring low level current (10-8 to 10-13 A). Experimentally the CIF works well in the range from 5 × 10-13 to 5 × 10-8A, but some non linearity problems were observed and explained in this paper.
{"title":"Design of Low Level Current to Frequency Converter (10-8 to 10-13 A)","authors":"A. El Hennawy, R. Lemaitre, D. Barbier","doi":"10.1109/ESSCIRC.1980.5468782","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468782","url":null,"abstract":"The current to frequency converter (CIF) is fully integrated in aluminium gate P channel E/D MOS technology. It is designed for measuring low level current (10<sup>-8</sup> to 10<sup>-13</sup> A). Experimentally the CIF works well in the range from 5 × 10<sup>-13</sup> to 5 × 10<sup>-8</sup>A, but some non linearity problems were observed and explained in this paper.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"34 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"125647343","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1980-09-01DOI: 10.1109/ESSCIRC.1980.5468716
H. Bosma
With a variation of a well-known business adagium "Better have a market than a factory", I would formulate the message of this contribution on the VLSI-impact on electronics as "Better have a product than a process". The challenge for the electronics industry is how to obtain the right products from the microelectronics industry, what are these products and how and where are they conceived. To my opinion conception, design and testing of microelectronics products, the actual circuits, will in forthcoming years be a harder struggle than development and bringing into operation of opto-chemical, photo-lithographical, processes.
{"title":"VLSI Impact on Electronics in the 80's and its Applications","authors":"H. Bosma","doi":"10.1109/ESSCIRC.1980.5468716","DOIUrl":"https://doi.org/10.1109/ESSCIRC.1980.5468716","url":null,"abstract":"With a variation of a well-known business adagium \"Better have a market than a factory\", I would formulate the message of this contribution on the VLSI-impact on electronics as \"Better have a product than a process\". The challenge for the electronics industry is how to obtain the right products from the microelectronics industry, what are these products and how and where are they conceived. To my opinion conception, design and testing of microelectronics products, the actual circuits, will in forthcoming years be a harder struggle than development and bringing into operation of opto-chemical, photo-lithographical, processes.","PeriodicalId":168272,"journal":{"name":"ESSCIRC 80: 6th European Solid State Circuits Conference","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1980-09-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115304634","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}