Pub Date : 1962-08-01DOI: 10.1109/TEC.1962.5219401
C. Y. Lee
{"title":"A Note on the nth Shortest Path Problem","authors":"C. Y. Lee","doi":"10.1109/TEC.1962.5219401","DOIUrl":"https://doi.org/10.1109/TEC.1962.5219401","url":null,"abstract":"","PeriodicalId":177496,"journal":{"name":"IRE Trans. Electron. Comput.","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1962-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133867847","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1962-08-01DOI: 10.1109/TEC.1962.5219383
C. Coates, R. B. Kirchner, P. M. Lewis
A previous paper gives a procedure for the testing and realization of linearly-separable switching functions, i.e., functions which can be realized by a single threshold component. That procedure can be considerably simplified, particularly when the given function is symmetric in sets of two or more variables. The simplifications arise due to a reduction of the number of functions in the function tree in view of the coefficient ordering. Although this procedure was derived with the aim of reducing the amount of computation below that required for straightforward solution of the simultaneous inequalities that define the problem, the resulting method has some interesting relationships to that due to Winder.
{"title":"A Simplified Procedure for the Realization of Linearly-Separable Switching Functions","authors":"C. Coates, R. B. Kirchner, P. M. Lewis","doi":"10.1109/TEC.1962.5219383","DOIUrl":"https://doi.org/10.1109/TEC.1962.5219383","url":null,"abstract":"A previous paper gives a procedure for the testing and realization of linearly-separable switching functions, i.e., functions which can be realized by a single threshold component. That procedure can be considerably simplified, particularly when the given function is symmetric in sets of two or more variables. The simplifications arise due to a reduction of the number of functions in the function tree in view of the coefficient ordering. Although this procedure was derived with the aim of reducing the amount of computation below that required for straightforward solution of the simultaneous inequalities that define the problem, the resulting method has some interesting relationships to that due to Winder.","PeriodicalId":177496,"journal":{"name":"IRE Trans. Electron. Comput.","volume":"32 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1962-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129037092","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1962-08-01DOI: 10.1109/TEC.1962.5219396
L. Fogarty, R. Howe
The three translational and three rotational equilibrium equations for an orbital vehicle subject to aerodynamic and jet reaction forces are derived using a modified flight-path axis system for the translational equations. The dependent variables of the system are horizontal velocity component, vertical velocity component, and flight-path heading angle. Theresulting equations are shown to have advantages for computer mechanization over alternative axis systems for the translational equations. Complete equations for determining vehicle orientation, instantaneous latitude and longitude, angle of attack, angle of sideslip, areodynamic forces and moments, etc., are presented. Modifications in the translational equations which allow direct solution by an analog computer are also given. Analog computer mechanization of these equations in both real and fast time is described, including a novel technique for division which preserves favorable multiplier scaling. Specific machine results are presented which demonstrate accurate solution of close-satellite trajectories, including re-entry from satellite altitudes to sea level. With no change in circuit or scaling the same computer mechanization yields zero-drag orbits which close within several hundred feet of altitude.
{"title":"Flight Simulation of Orbital and Re-Entry Vehicles","authors":"L. Fogarty, R. Howe","doi":"10.1109/TEC.1962.5219396","DOIUrl":"https://doi.org/10.1109/TEC.1962.5219396","url":null,"abstract":"The three translational and three rotational equilibrium equations for an orbital vehicle subject to aerodynamic and jet reaction forces are derived using a modified flight-path axis system for the translational equations. The dependent variables of the system are horizontal velocity component, vertical velocity component, and flight-path heading angle. Theresulting equations are shown to have advantages for computer mechanization over alternative axis systems for the translational equations. Complete equations for determining vehicle orientation, instantaneous latitude and longitude, angle of attack, angle of sideslip, areodynamic forces and moments, etc., are presented. Modifications in the translational equations which allow direct solution by an analog computer are also given. Analog computer mechanization of these equations in both real and fast time is described, including a novel technique for division which preserves favorable multiplier scaling. Specific machine results are presented which demonstrate accurate solution of close-satellite trajectories, including re-entry from satellite altitudes to sea level. With no change in circuit or scaling the same computer mechanization yields zero-drag orbits which close within several hundred feet of altitude.","PeriodicalId":177496,"journal":{"name":"IRE Trans. Electron. Comput.","volume":"38 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1962-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132417524","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1962-08-01DOI: 10.1109/TEC.1962.5219393
J. Farrell
In this paper a circuit is developed which provides a train of uniform pulses logarithmically spaced in time. As applied to computing the system offers new methods for calculating products, quotients, powers, and roots. A pulse-interval error of less than one per cent (rms) was obtained with an experimental circuit.
{"title":"Pulse Generator with Logarithmic Spacing","authors":"J. Farrell","doi":"10.1109/TEC.1962.5219393","DOIUrl":"https://doi.org/10.1109/TEC.1962.5219393","url":null,"abstract":"In this paper a circuit is developed which provides a train of uniform pulses logarithmically spaced in time. As applied to computing the system offers new methods for calculating products, quotients, powers, and roots. A pulse-interval error of less than one per cent (rms) was obtained with an experimental circuit.","PeriodicalId":177496,"journal":{"name":"IRE Trans. Electron. Comput.","volume":"352 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1962-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115981503","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1962-08-01DOI: 10.1109/TEC.1962.5219388
Nicholas S. Szabó
The problem of sign determination in nonredundant residue systems is investigated. A general theorem is derived establishing necessary conditions for sign detection, and the use of this theorem is demonstrated through specific examples. It is shown that for a particular system organization these same conditions are also sufficient for sign detection. An implementation of this last system is presented for four moduli.
{"title":"Sign Detection in Nonredundant Residue Systems","authors":"Nicholas S. Szabó","doi":"10.1109/TEC.1962.5219388","DOIUrl":"https://doi.org/10.1109/TEC.1962.5219388","url":null,"abstract":"The problem of sign determination in nonredundant residue systems is investigated. A general theorem is derived establishing necessary conditions for sign detection, and the use of this theorem is demonstrated through specific examples. It is shown that for a particular system organization these same conditions are also sufficient for sign detection. An implementation of this last system is presented for four moduli.","PeriodicalId":177496,"journal":{"name":"IRE Trans. Electron. Comput.","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1962-08-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122030105","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1962-06-01DOI: 10.1109/IRETELC.1962.5407930
W. Bledsoe, C. L. Bisson
It is shown that a previous version of the n-tuple pattern recognition method can be made more effective by making certain changes in the learning phase. A means of further increasing readability through judicious choice of n-tuples is described.
{"title":"Improved Memory Matrices for the n-Tuple Pattern Recognition Method","authors":"W. Bledsoe, C. L. Bisson","doi":"10.1109/IRETELC.1962.5407930","DOIUrl":"https://doi.org/10.1109/IRETELC.1962.5407930","url":null,"abstract":"It is shown that a previous version of the n-tuple pattern recognition method can be made more effective by making certain changes in the learning phase. A means of further increasing readability through judicious choice of n-tuples is described.","PeriodicalId":177496,"journal":{"name":"IRE Trans. Electron. Comput.","volume":"50 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1962-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124547067","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1962-06-01DOI: 10.1109/IRETELC.1962.5407918
A. Grasselli
Many computer applications require a control structure which can be easily modified to achieve optimum processing time. A program-modifiable control unit of new design is described here.
{"title":"The Design of Program-Modifiable Micro-Programmed Control Units","authors":"A. Grasselli","doi":"10.1109/IRETELC.1962.5407918","DOIUrl":"https://doi.org/10.1109/IRETELC.1962.5407918","url":null,"abstract":"Many computer applications require a control structure which can be easily modified to achieve optimum processing time. A program-modifiable control unit of new design is described here.","PeriodicalId":177496,"journal":{"name":"IRE Trans. Electron. Comput.","volume":"36 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1962-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121273165","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1962-06-01DOI: 10.1109/IRETELC.1962.5407919
O. Bedrij
A large, extremely fast digital adder with sum selection and multiple-radix carry is described. Boolean expressions for the operation are included. The amount of hardware and the logical delay for a 100-bit ripple-carry adder and a carry-select adder are compared. The adder system described increases the speed of the addition process by reducing the carry-propagation time to the minimum commensurate with economical circuit design. The problem of carry-propagation delay is overcome by independently generating multiple-radix carries and using these carries to select between simultaneously generated sums. In this adder system, the addend and augend are divided into subaddend and subaugend sections that are added twice to produce two subsums. One addition is done with a carry digit forced into each section, and the other addition combines the operands without the forced carry digit. The selection of the correct, or true, subsum from each of the adder sections depends upon whether or not there actually is a carry into that adder section.
{"title":"Carry-Select Adder","authors":"O. Bedrij","doi":"10.1109/IRETELC.1962.5407919","DOIUrl":"https://doi.org/10.1109/IRETELC.1962.5407919","url":null,"abstract":"A large, extremely fast digital adder with sum selection and multiple-radix carry is described. Boolean expressions for the operation are included. The amount of hardware and the logical delay for a 100-bit ripple-carry adder and a carry-select adder are compared. The adder system described increases the speed of the addition process by reducing the carry-propagation time to the minimum commensurate with economical circuit design. The problem of carry-propagation delay is overcome by independently generating multiple-radix carries and using these carries to select between simultaneously generated sums. In this adder system, the addend and augend are divided into subaddend and subaugend sections that are added twice to produce two subsums. One addition is done with a carry digit forced into each section, and the other addition combines the operands without the forced carry digit. The selection of the correct, or true, subsum from each of the adder sections depends upon whether or not there actually is a carry into that adder section.","PeriodicalId":177496,"journal":{"name":"IRE Trans. Electron. Comput.","volume":"88 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1962-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126353477","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1962-06-01DOI: 10.1109/IRETELC.1962.5407932
G. W. Taylor
{"title":"A Method of Increasing the Number of Orders in a Digital Computer","authors":"G. W. Taylor","doi":"10.1109/IRETELC.1962.5407932","DOIUrl":"https://doi.org/10.1109/IRETELC.1962.5407932","url":null,"abstract":"","PeriodicalId":177496,"journal":{"name":"IRE Trans. Electron. Comput.","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1962-06-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128510041","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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