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Study on plasma-polymerized 1-(trimethylsilyl)pyrrolidine films deposited by plasma-enhanced chemical vapor deposition for use as a Cu diffusion barrier in multilevel metallization process 等离子体增强化学气相沉积法沉积的等离子体聚合 1-(三甲基硅基)吡咯烷薄膜在多级金属化工艺中用作铜扩散屏障的研究
IF 2.3 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-06-08 DOI: 10.1016/j.mee.2024.112192
Chanyong Seo , Namwuk Baek , Shinwon Kang , Gihoon Park , Jihwan Cha , Taesoon Jang , Seonhee Jang , Donggeun Jung

As integration continues in the modern semiconductor industry, copper (Cu) is used for metal lines and low dielectric constant (low-k) films are used for intermetal dielectrics (IMD) to reduce signal delays occurring in device interconnects. A diffusion barrier is essential between the Cu metal lines and the IMD to prevent Cu diffusion, and silicon carbon-nitride (SiCN) films with relatively low dielectric constants are being widely studied. In this study, SiCN films deposited from 1-(trimethylsilyl)pyrrolidine (TSPD) precursor by plasma-enhanced chemical vapor deposition (PECVD) were investigated for use as a Cu diffusion barrier in multilevel metallization process. This plasma-polymerized TSPD (ppTSPD) monolayer film as SiCN was deposited in plasma powers ranging from 15 to 30 W. The electrical properties of ppTSPD were measured and the chemical properties were analyzed by Fourier-transform infrared spectroscopy (FTIR). The dielectric constant increased with increased plasma power. The lowest dielectric constant of 3.70 and leakage current density at 1 MV/cm of 2.27×10−8 A/cm2 were found for ppTSPD film deposited at 15 W. To verify the Cu diffusion barrier characteristics of the ppTSPD films, a ppTSPD/ppOMCTS bilayer was introduced by using plasma-polymerized octamethylcyclotetrasiloxane (ppOMCTS) as porous low-k SiCOH films. The time-dependent dielectric breakdown (TDDB) characteristic was enhanced around five times than ppOMCTS monolayer used as a reference. The ppTSPD was suggested for fabricating SiCN films for use as a Cu diffusion barrier in multilevel metallization process.

随着现代半导体工业的不断集成,铜(Cu)被用于金属线,低介电常数(low-k)薄膜被用于金属间电介质(IMD),以减少器件互连中出现的信号延迟。在铜金属线和 IMD 之间必须有一个扩散屏障,以防止铜扩散,而具有相对较低介电常数的氮化硅(SiCN)薄膜正被广泛研究。在这项研究中,研究了通过等离子体增强化学气相沉积 (PECVD) 技术将 1-(三甲基硅基) 吡咯烷 (TSPD) 前体沉积为 SiCN 薄膜,在多级金属化工艺中用作铜扩散屏障的情况。这种等离子体聚合的 TSPD(ppTSPD)单层薄膜作为 SiCN,在 15 到 30 W 的等离子体功率下沉积。介电常数随着等离子体功率的增加而增加。为了验证 ppTSPD 薄膜的铜扩散屏障特性,使用等离子体聚合八甲基环四硅氧烷(ppOMCTS)作为多孔低 k SiCOH 薄膜,引入了 ppTSPD/ppOMCTS 双层。与用作参考的 ppOMCTS 单层相比,其随时间变化的介质击穿(TDDB)特性增强了约五倍。建议将 ppTSPD 用于制造 SiCN 薄膜,以便在多级金属化工艺中用作铜扩散屏障。
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引用次数: 0
Fractures of low-k materials in a RF package with integrated passive device based on TGV 基于 TGV 的集成无源器件射频封装中低 k 材料的断裂情况
IF 2.3 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-06-08 DOI: 10.1016/j.mee.2024.112195
Luchao Wu , Lei Wang , Jun Wang

The radio frequency (RF) chips and passive devices integrated on the through-glass-via (TGV) substrate meets the demands of miniaturization, high performance and low losses in the application. The RF chip and integrated passive devices (IPDs) are interconnected electrically by a redistribution layer (RDL) on the TGV substrate with the isolation low-k materials. The low-k materials, however, are susceptible to fracture during the thermal process in packaging due to their weak mechanical properties. In this study, the fractures of the low-k material were studied by experiments and the finite element analysis (FEA) for a RF package with integrated passive device based on TGV. The mechanical properties of the low-k material used in the FEA were tested by fabricating freestanding low-k films using microfabrication techniques. Then the fracture behaviors of the low-k material in the package and its impact factors under thermal loadings were examined. The impact factors, such as the initial defect location, direction and length, were investigated by evaluating the stress intensity factors (SIFs) at the defect tips. The results revealed that the most hazardous location in the low-k material is the region below the micro-joint of RF chip. The vertical defects along thickness in low-k film are more likely to propagate than horizontal ones. The SIF value increases linearly with the defect length both in heating and cooling conditions.

射频(RF)芯片和无源器件集成在穿透玻璃-导孔(TGV)基板上,可满足应用中对微型化、高性能和低损耗的要求。射频芯片和集成无源器件(IPD)通过 TGV 基底面上的再分布层(RDL)与隔离低 k 材料进行电气互连。然而,由于低 k 材料的机械性能较弱,在封装的热处理过程中容易发生断裂。本研究通过实验和有限元分析研究了基于 TGV 的集成无源器件射频封装中低 k 材料的断裂情况。有限元分析中使用的低 k 材料的机械性能是通过使用微加工技术制造独立的低 k 薄膜进行测试的。然后,研究了封装中低 k 材料在热负荷下的断裂行为及其影响因素。通过评估缺陷尖端的应力强度因子(SIF),研究了初始缺陷位置、方向和长度等影响因素。结果表明,低 K 材料中最危险的位置是射频芯片微连接处下方的区域。沿低 K 薄膜厚度方向的垂直缺陷比水平缺陷更容易传播。在加热和冷却条件下,SIF 值都随缺陷长度线性增加。
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引用次数: 0
Chemical structure characteristics of flexible low-k SiCOH thin films etched by inductively coupled plasma-reactive ion etching process using FTIR and XPS spectra analysis 利用傅立叶变换红外光谱和 XPS 光谱分析电感耦合等离子体反应离子蚀刻工艺蚀刻的柔性低 K 值 SiCOH 薄膜的化学结构特征
IF 2.3 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-06-04 DOI: 10.1016/j.mee.2024.112221
Thomas Poche , William Wirth , Seonhee Jang

Flexible low dielectric constant (low-k) SiCOH thin films were fabricated onto flexible indium tin oxide coated polyethylene naphthalate (ITO/PEN) substrates using plasma-enhanced chemical vapor deposition (PECVD) of a tetrakis(trimethylsilyloxy)silane (TTMSS) precursor. RF plasma powers of 20 and 60 W were utilized for the deposition. The k-values of the pristine SiCOH films deposited at 20 and 60 W were 2.46 and 2.00, respectively. Both films showed hydrophobic surfaces. An inductively coupled plasma-reactive ion etching (ICP-RIE) process was then performed on the flexible SiCOH thin films using CF4, CF4 + O2, and CF4 + Ar. The surface wettability of the films increased substantially following etching, with many of the etched films being considered hydrophilic. The Fourier transform infrared (FTIR) spectra of the pristine films identified four prominent absorption bands as CHx stretching, Si-CH3 bending, Si-O-Si stretching, and Si-(CH3)x stretching vibration modes. After the etching process, the peak area ratios of Si-O-Si stretching mode increased and those of Si-(CH3)x stretching mode decreased. The X-ray photoelectron spectroscopy (XPS) spectra analysis determined significant concentration of fluorine on the surface of the film following etching. From the high-resolution XPS scan, it was found that the peak intensity of the C1s and Si2p peaks decreased after etching process and the peak center of the F1s peak shifted depending on etching chemistry. The k-values of the films at 20 W were fairly consistent while those of the films at 60 W increased significantly following the etching process. The increase in k-value after etching for the films at 60 W correlated with surface hydrophilicity, increase in the refractive index, and change in the peak area ratios of Si-O-Si and Si-(CH3)x stretching modes in the FTIR spectra.

利用四(三甲基硅氧基)硅烷(TTMSS)前体的等离子体增强化学气相沉积(PECVD)技术,在柔性氧化铟锡涂层聚萘乙酸乙二醇酯(ITO/PEN)基板上制造出了柔性低介电常数(低 k)SiCOH 薄膜。沉积时使用的射频等离子体功率分别为 20 W 和 60 W。在 20 W 和 60 W 下沉积的原始 SiCOH 薄膜的 k 值分别为 2.46 和 2.00。这两种薄膜的表面都具有疏水性。然后使用 CF4、CF4 + O2 和 CF4 + Ar 对柔性 SiCOH 薄膜进行了电感耦合等离子体反应离子刻蚀(ICP-RIE)处理。薄膜的表面润湿性在蚀刻后大幅提高,许多蚀刻薄膜被认为具有亲水性。原始薄膜的傅立叶变换红外光谱(FTIR)显示出四个明显的吸收带,分别为 CHx 伸展、Si-CH3 弯曲、Si-O-Si 伸展和 Si-(CH3)x 伸展振动模式。蚀刻后,Si-O-Si 拉伸振动模式的峰面积比增大,而 Si-(CH3)x 拉伸振动模式的峰面积比减小。X 射线光电子能谱(XPS)光谱分析确定了蚀刻后薄膜表面氟的显著浓度。从高分辨率 XPS 扫描中发现,蚀刻后 C1s 和 Si2p 峰的峰值强度降低,F1s 峰的峰值中心随蚀刻化学反应而移动。20 W 下薄膜的 k 值相当一致,而 60 W 下薄膜的 k 值在蚀刻过程后显著增加。60 W 下薄膜蚀刻后 k 值的增加与表面亲水性、折射率的增加以及傅立叶变换红外光谱中 Si-O-Si 和 Si-(CH3)x 伸展模式峰面积比的变化有关。
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引用次数: 0
Tuning of interface quality of Al/CeO2/Si device by post-annealing of sol-gel grown high-k CeO2 layers 通过对溶胶-凝胶生长的高k CeO2层进行后退火来调节铝/CeO2/硅器件的界面质量
IF 2.3 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-05-28 DOI: 10.1016/j.mee.2024.112212
G. Hari Priya , S.K. Srivastava , M.V. Shankar , K.M.K. Srivatsa , Amish G. Joshi , Koteswara Rao Peta

A comprehensive study has been done on the influence of post-deposition annealing temperature on high-k cerium oxide (CeO2) layer grown on n-type silicon (Si) substrate and its resultant interface states have been studied for Al/CeO2/Si metal-oxide-semiconductor (MOS) devices. The high-k CeO2 thin films were deposited by spin-coating and sintered at different annealing temperatures (Ta) in the range of 400–900 °C. The parameters such as fixed charge density (Qeff), dielectric constant (k) of the layers, flat-band voltage (VFB), interface defect density (Dit), etc., of the MOS device were evaluated from CV and I-V measurements. A minimum value of flat band shift (∼0.05 V) with lower Qeff (−4.81 × 1011 C/cm2) have been achieved for the Ta of 600 °C. The k and Dit were evaluated to be 22 and 1.29 × 1012 cm−2, respectively at the Ta of 600 °C. In addition, the CV measurements showed a very small hysteresis and very low frequency dispersion for the Ta of 600 °C sample. Energy distribution of defect states was evaluated and it was maximum towards the bottom of the conduction band. This shows that the 600 °C is the optimum annealing temperature, which results in high quality interface, and the electron affinity of the corresponding CeO2 layers was found to be 3.29 eV as evaluated from ultraviolet photoelectron spectroscopy (UPS). Further, a maximum value of minority carrier lifetime (147 μs) has been achieved for the samples annealed at Ta of 400 °C, indicating that the post-annealing temperature plays a significant role on the properties of CeO2 films deposited by sol-gel process. Thus, the present study demonstrates the possibility of sol-gel grown high k-CeO2 layers suitable for MOS like devices.

针对铝/二氧化铈/硅金属氧化物半导体(MOS)器件,我们全面研究了沉积后退火温度对在 n 型硅(Si)衬底上生长的高 K 氧化铈(CeO2)层的影响及其导致的界面状态。高 K CeO2 薄膜通过旋涂法沉积,并在 400-900 °C 的不同退火温度 (Ta) 下烧结。通过 CV 和 I-V 测量评估了 MOS 器件的固定电荷密度 (Qeff)、层的介电常数 (k)、平带电压 (VFB)、界面缺陷密度 (Dit) 等参数。当温度为 600 ℃ 时,平带偏移的最小值(∼0.05 V)和较低的 Qeff(-4.81 × 1011 C/cm2)均已达到。在 600 °C 的 Ta 温度下,k 和 Dit 分别为 22 和 1.29 × 1012 cm-2。此外,CV 测量显示 600 ℃ 的 Ta 样品具有非常小的滞后和非常低的频率色散。对缺陷态的能量分布进行了评估,发现缺陷态在导带底部最大。紫外光电子能谱(UPS)评估发现,相应 CeO2 层的电子亲和力为 3.29 eV。此外,在 400 °C 的 Ta 温度下退火的样品达到了少数载流子寿命的最大值(147 μs),这表明退火后的温度对溶胶-凝胶工艺沉积的 CeO2 薄膜的性能起着重要作用。因此,本研究证明了溶胶-凝胶法生长的高 k-CeO2 层适用于类似 MOS 器件的可能性。
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引用次数: 0
A comparative study of C, N and Xe pre-amorphization implantation processes for improving the thermal stability of NiSi films 用于提高镍硅薄膜热稳定性的 C、N 和 Xe 预变质植入工艺比较研究
IF 2.3 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-05-24 DOI: 10.1016/j.mee.2024.112210
S. Guillemin, L. Lachal, P. Gergaud, A. Grenier, F. Nemouchi, F. Mazen, Ph. Rodriguez

In this paper, a comparative study of C-, N- and Xe-based pre-amorphization implantation (PAI) processes is proposed. The impact of the use of such processes on the agglomeration resistance and physical properties of the final Ni(Pt)Si layer, as well as the formation mechanisms via solid-state reactions and electrical performances via the transfer length measurement (TLM) method, is evaluated. It is shown that although all species are able to increase the agglomeration temperature of Ni(Pt)Si layers (up to more than 100 °C), the underlying mechanisms are different. For C- and N-based PAI processes a strong chemical effect is observed, while for Xe-based processes the amorphization depth plays an important role. Consequently, the beneficial effect of stabilizing Ni(Pt)Si layers at high temperatures using C- and N-based PAI processes has to be balanced with an increased layer resistivity (up to 30%) combined with a strong deterioration of the associated specific contact resistivity (which is multiplied by almost a factor 10). In this sense, Xe-based PAI processes seem to be a better option as they could allow to combine both requirements.

本文对基于 C、N 和 Xe 的预变质植入 (PAI) 工艺进行了比较研究。本文评估了使用这些工艺对最终镍(铂)硅层的抗团聚性和物理性质的影响,以及通过固态反应和转移长度测量(TLM)方法对电性能形成机制的影响。结果表明,尽管所有物种都能提高 Ni(Pt)Si 层的聚结温度(高达 100 ℃ 以上),但其基本机制却各不相同。对于基于 C 和 N 的 PAI 过程,可以观察到强烈的化学效应,而对于基于 Xe 的过程,非晶化深度起着重要作用。因此,使用 C 和 N 基 PAI 工艺在高温下稳定 Ni(Pt)Si 层的有利效果必须与层电阻率的增加(高达 30%)以及相关特定接触电阻率的严重恶化(几乎是 10 倍)相平衡。从这个意义上说,Xe 基 PAI 工艺似乎是一个更好的选择,因为它可以同时满足这两个要求。
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引用次数: 0
Neural networks based on in-sensor computing of optoelectronic memristor 基于光电忆阻器传感内计算的神经网络
IF 2.3 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-05-08 DOI: 10.1016/j.mee.2024.112201
Zhang Zhang , Qifan Wang , Gang Shi , Yongbo Ma , Jianmin Zeng , Gang Liu

The separation band of perception, storage, and computation modules in vision systems based on traditional von Neumann architectures leads to latency and power consumption problems in data transmission, which severely limits the computational power. In recent years, in-sensor computing has gained significance in enhancing the computational performance of machine vision systems. It integrates sensing, storage and computation and is an important way to break out of the Von Neumann architecture. This study introduces an optoelectronic memristor-based image recognition algorithm to improve recognition efficiency by performing image feature extraction in a hardware array. The experimental results show that the network achieves the best accuracy of 93.26% after 30 epochs, and the loss of accuracy after weight quantization is about 1%.

在基于传统冯-诺依曼架构的视觉系统中,感知、存储和计算模块的分离带导致了数据传输的延迟和功耗问题,严重限制了计算能力。近年来,传感器内计算在提高机器视觉系统计算性能方面发挥了重要作用。它集传感、存储和计算于一体,是突破冯-诺依曼架构的重要途径。本研究介绍了一种基于光电忆阻器的图像识别算法,通过在硬件阵列中进行图像特征提取来提高识别效率。实验结果表明,该网络在 30 个 epochs 后达到了 93.26% 的最佳准确率,权重量化后的准确率损失约为 1%。
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引用次数: 0
Critical solder joint in insulated gate bipolar transistors (IGBT) power module for improved mechanical reliability 提高机械可靠性的绝缘栅双极晶体管 (IGBT) 功率模块中的关键焊点
IF 2.3 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-05-04 DOI: 10.1016/j.mee.2024.112200
Sunday E. Nebo, Emeka H. Amalu, David J. Hughes

This investigation identifies the critical solder joint in a typical Insulated Gate Bipolar Transistor (IGBT) module and provided new knowledge on how operating thermal loads degrade IGBT-attach, Diode-attach, and Substrate solder joints in the device. SolidWorks software is used to create three realistic 3-D Finite Element (FE) models of the typical IGBT module used in this investigation. In-service operating power and IEC 60068–2-14 thermal cycles are implemented in ANSYS mechanical package to simulate the response of the three solder joints in the FE models to the load cycles. The solder in the joints is lead-free alloy of 96.5% tin, 3% silver, and 0.5% copper (SAC305) composition. The SAC305 material properties are modelled as time and temperature dependent with Anand's visco-plastic model employed as the constitutive model. Results show that the key degradation mechanism of solder joints in IGBT module are stress, plastic strain, and strain energy magnitudes. Accumulated plastic strain in the joints is found the predominant damage factor. Critical solder joint in the module depends on the load cycle the device experiences. IGBT-attach solder joint is critical in active power load cycle. Substrate solder joint degraded most in passive thermal cum combined passive thermal and active power load cycles.

这项研究确定了典型绝缘栅双极晶体管 (IGBT) 模块中的关键焊点,并提供了有关工作热负荷如何降低器件中 IGBT 连接、二极管连接和基板焊点性能的新知识。本次研究使用 SolidWorks 软件为典型的 IGBT 模块创建了三个逼真的三维有限元 (FE) 模型。在 ANSYS 机械软件包中实现了在役工作功率和 IEC 60068-2-14 热循环,以模拟 FE 模型中三个焊点对负载循环的响应。焊点中的焊料是由 96.5% 锡、3% 银和 0.5% 铜(SAC305)组成的无铅合金。SAC305 的材料特性与时间和温度有关,采用 Anand 的粘弹性模型作为构成模型。结果表明,IGBT 模块中焊点的主要退化机制是应力、塑性应变和应变能大小。焊点中累积的塑性应变是最主要的损坏因素。模块中的临界焊点取决于器件所经历的负载周期。在有功功率负载周期中,IGBT 连接焊点至关重要。基底焊点在被动热循环以及被动热循环和主动功率负载循环中退化最严重。
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引用次数: 0
GaN low noise amplifier MMIC with LPF and HPF noise matching 具有 LPF 和 HPF 噪声匹配功能的 GaN 低噪声放大器 MMIC
IF 2.3 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-05-04 DOI: 10.1016/j.mee.2024.112199
Mohammad Zaid , Purnima Kumari , Mohammad Sajid Nazir , Ahtisham Pampori , Umakant Goyal , Meena Mishra , Yogesh Singh Chauhan

In this paper, we introduce two innovative two-stage low noise amplifiers (LNAs), each with distinct noise-matching networks. The first LNA features a low pass filter (LPF) for noise-matching in both stages, while the second uses a high pass filter (HPF) in a similar capacity. Our research focuses on evaluating the performance differences that arise from using varied matching networks within specific frequency ranges. Highlighting the critical role of appropriate network selection for optimizing gain and noise performance, our approach includes the development of two Monolithic Microwave Integrated Circuits (MMICs) using cutting-edge 0.25μm Gallium Nitride (GaN) technology. The C-band LNA, targeting a frequency range of 4–6 GHz, achieves an impressive average noise fig. (NF) of 1.5 dB and a gain of 17 dB. For the X-band range of 8–10 GHz, the LNA records a commendable average NF of 1.7 dB and a gain of 16 dB, demonstrating the effectiveness of our novel design strategies.

在本文中,我们介绍了两种创新的两级低噪声放大器(LNA),每种放大器都具有不同的噪声匹配网络。第一个低噪声放大器采用低通滤波器(LPF)在两级进行噪声匹配,第二个低噪声放大器采用高通滤波器(HPF)进行类似的噪声匹配。我们的研究重点是评估在特定频率范围内使用不同匹配网络所产生的性能差异。为了突出选择适当的网络对优化增益和噪声性能的关键作用,我们的方法包括利用 0.25μm 氮化镓(GaN)尖端技术开发两个单片微波集成电路(MMIC)。C 波段 LNA 的频率范围为 4-6 GHz,平均噪声系数 (NF) 为 1.5 dB,增益为 17 dB,令人印象深刻。在 8-10 GHz 的 X 波段范围内,该 LNA 的平均 NF 值为 1.7 dB,增益为 16 dB,值得称赞,证明了我们新颖设计策略的有效性。
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引用次数: 0
Laser lift-off technique for applications in III-N microelectronics: A review 应用于 III-N 微电子学的激光升离技术:综述
IF 2.3 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-04-28 DOI: 10.1016/j.mee.2024.112198
Sabuj Chowdhury , Sabrina Alam , Md Didarul Alam , Fahmida Sharmin Jui

The development of flexible electronics, better heat dissipation capabilities, increased LED light extraction efficiency, and the implementation of inverted barrier N-polar high electron mobility transistor (HEMT) for power electronics are all made possible by adopting laser lift-off (LLO), a technology that enables the movement of discrete III-N elements onto any substrates which are otherwise not attainable. In this paper, we focus on evaluating the LLO mechanism, its application for III-N epilayers and devices, and assessing their structural and electronic characteristics to give an overview of the advancement in LLO technology for III-N microelectronics.

通过采用激光升华(LLO)技术,可以将分立的 III-N 元件移动到任何基底上,从而实现柔性电子器件的开发、更好的散热能力、更高的 LED 光提取效率,以及用于功率电子器件的反向势垒 N 极高电子迁移率晶体管(HEMT)的实现。在本文中,我们将重点评估 LLO 机制及其在 III-N 外延层和器件中的应用,并评估其结构和电子特性,从而概述用于 III-N 微电子的 LLO 技术的进展。
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引用次数: 0
A wearable strain sensor based on self-healable MXene/PVA hydrogel for bodily motion detection 基于自修复 MXene/PVA 水凝胶的可穿戴应变传感器,用于身体运动检测
IF 2.3 4区 工程技术 Q2 ENGINEERING, ELECTRICAL & ELECTRONIC Pub Date : 2024-04-23 DOI: 10.1016/j.mee.2024.112197
Yiqiang Zheng , Yilin Li , Lili Wang , Hao Xu , Wei Han

Developing flexible, stretchable, and self-healing wearable electronic devices with skin-like capabilities is highly desirable for healthcare and human-machine interaction. Hydrogels as a promising sensing material with crosslinked polymer networks have received widespread attention for decades. However, sensors based on hydrogels suffer from low sensitivity and stability due to their poor electrical conductivity or the movement of nanofillers in hydrogel networks. Herein, a stable, sensitive, and self-healing strain sensor is fabricated by the Ti3C2Tx MXene nanosheets/polyvinyl alcohol (PVA) hydrogel (T-hydrogel). The introduction of MXene increases the number of H-bonds in the PVA hydrogel network and enhances the conductivity, resulting in high sensitivity, stability, and self-healing character. The self-healing T-hydrogel-based strain sensor has a performance close to that of the original sensor. In addition, the device is capable of detecting bodily motions, indicating the potential application in the field of human health monitoring and human-computer interaction.

开发具有类似皮肤功能的柔性、可拉伸和自愈合的可穿戴电子设备,是医疗保健和人机交互领域的一大愿望。几十年来,水凝胶作为一种具有交联聚合物网络的传感材料一直受到广泛关注。然而,基于水凝胶的传感器由于导电性差或纳米填料在水凝胶网络中的移动而导致灵敏度和稳定性较低。本文利用 Ti3C2Tx MXene 纳米片材/聚乙烯醇(PVA)水凝胶(T-hydrogel)制作了一种稳定、灵敏和自修复的应变传感器。MXene 的引入增加了 PVA 水凝胶网络中 H 键的数量并增强了导电性,从而实现了高灵敏度、高稳定性和自愈合特性。基于 T- 水凝胶的自愈合应变传感器的性能接近原始传感器。此外,该装置还能检测人体运动,这表明它在人体健康监测和人机交互领域具有潜在的应用前景。
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引用次数: 0
期刊
Microelectronic Engineering
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