Pub Date : 2026-01-02Epub Date: 2025-09-02DOI: 10.1016/j.mee.2025.112399
Po-Hsun Chen , Yung-Fang Tan , Yen-Che Huang
In this study, a via-hole type thin-film transistor (TFT) device based on indium–gallium–zinc–oxide (IGZO) material with the drain-connected field plate (DCFP) structure is investigated. Compared to the traditional symmetric source/drain structure, the device with DCFP exhibits unsaturated output drain current properties during operation. Also, according to the electrical measurements and the simulation results, a high electrical field is generated on the etching stop layer (ESL) right underneath the extended field plate, resulting in the effect of drain-induced barrier lowering (DIBL) and the shifts of threshold voltage (Vt). On the other hand, the unsaturated output characteristics are applied as a variable resistor according to the given gate bias (Vg). Therefore, a high pass filter (HPF) circuit is demonstrated based on the TFT device with the DCFP structure, which suggests its potential application for variable resistors based on the gate bias in the future circuit designs.
{"title":"Investigating unsaturated output characteristics and potential applications of amorphous InGaZnO thin-film transistors with drain-connected field plate","authors":"Po-Hsun Chen , Yung-Fang Tan , Yen-Che Huang","doi":"10.1016/j.mee.2025.112399","DOIUrl":"10.1016/j.mee.2025.112399","url":null,"abstract":"<div><div>In this study, a via-hole type thin-film transistor (TFT) device based on indium–gallium–zinc–oxide (IGZO) material with the drain-connected field plate (DCFP) structure is investigated. Compared to the traditional symmetric source/drain structure, the device with DCFP exhibits unsaturated output drain current properties during operation. Also, according to the electrical measurements and the simulation results, a high electrical field is generated on the etching stop layer (ESL) right underneath the extended field plate, resulting in the effect of drain-induced barrier lowering (DIBL) and the shifts of threshold voltage (Vt). On the other hand, the unsaturated output characteristics are applied as a variable resistor according to the given gate bias (Vg). Therefore, a high pass filter (HPF) circuit is demonstrated based on the TFT device with the DCFP structure, which suggests its potential application for variable resistors based on the gate bias in the future circuit designs.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"301 ","pages":"Article 112399"},"PeriodicalIF":3.1,"publicationDate":"2026-01-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144996574","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2026-01-02Epub Date: 2025-09-04DOI: 10.1016/j.mee.2025.112400
Jiayi Zhang , Huaizhi Luo , Haoyan Liu , Fei Zhao , Yongliang Li
In this work, O3 passivation technology for the novel stacked SiGe/Si FinFET input-output (I/O) devices was investigated. First, the O3 passivation technology was validated based on SiGe MOS capacitance (CAP) structure., with results indicating that interface state density (Dit) can be reduced to 5.12 × 1012 eV−1 cm−2. Then, to improve the electrical performance of the stacked SiGe/Si FinFET I/O device, the O3 passivation technology was introduced between the SiGe/Si fin and gate oxide. As a result, the electrical performance for the stacked SiGe/Si FinFET I/O device was significantly improved. For example, SS could be reduced from the 168 mV/dec to 113 mV/dec, and gm could be improved from the 62 μS to 94 μS, which was mainly attributed to the O3 passivation resulting in the reduction of Dit. Furthermore, its reliability assessment was also performed. The result confirmed that threshold voltage (VTH) drift under negative bias temperature instability (NBTI) and hot carrier injection (HCI) stress were improved by 52.1 % and 60.3 %, respectively. Meanwhile, its maximum operating voltage (Vmax) for a 10 years lifetime at a failure rate of 0.01 % could reach to 2.65 V. Therefore, the O3 passivation process is practical for the stacked SiGe/Si I/O FinFET device in advanced GAA platforms.
{"title":"Improving electrical performance and reliability of stacked SiGe/Si FinFETs using O3 passivation for I/O devices","authors":"Jiayi Zhang , Huaizhi Luo , Haoyan Liu , Fei Zhao , Yongliang Li","doi":"10.1016/j.mee.2025.112400","DOIUrl":"10.1016/j.mee.2025.112400","url":null,"abstract":"<div><div>In this work, O<sub>3</sub> passivation technology for the novel stacked SiGe/Si FinFET input-output (I/O) devices was investigated. First, the O<sub>3</sub> passivation technology was validated based on SiGe MOS capacitance (CAP) structure., with results indicating that interface state density (D<sub>it</sub>) can be reduced to 5.12 × 10<sup>12</sup> eV<sup>−1</sup> cm<sup>−2</sup>. Then, to improve the electrical performance of the stacked SiGe/Si FinFET I/O device, the O<sub>3</sub> passivation technology was introduced between the SiGe/Si fin and gate oxide. As a result, the electrical performance for the stacked SiGe/Si FinFET I/O device was significantly improved. For example, SS could be reduced from the 168 mV/dec to 113 mV/dec, and g<sub>m</sub> could be improved from the 62 μS to 94 μS, which was mainly attributed to the O<sub>3</sub> passivation resulting in the reduction of D<sub>it</sub>. Furthermore, its reliability assessment was also performed. The result confirmed that threshold voltage (V<sub>TH</sub>) drift under negative bias temperature instability (NBTI) and hot carrier injection (HCI) stress were improved by 52.1 % and 60.3 %, respectively. Meanwhile, its maximum operating voltage (V<sub>max</sub>) for a 10 years lifetime at a failure rate of 0.01 % could reach to 2.65 V. Therefore, the O<sub>3</sub> passivation process is practical for the stacked SiGe/Si I/O FinFET device in advanced GAA platforms.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"301 ","pages":"Article 112400"},"PeriodicalIF":3.1,"publicationDate":"2026-01-02","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144988600","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-11-15Epub Date: 2025-07-23DOI: 10.1016/j.mee.2025.112384
Kris Vanstreels, Oguzhan Orkut Okudur, Mario Gonzalez, Eric Beyne
This work systematically investigates the influence of metal contact density and pitch size on the adhesion strength of hybrid bonded interfaces using an energy-based nanoindentation methodology to quantify interfacial bond strength. Results show that the presence of metal at the bonding interface enhances adhesion strength of hybrid bonded interfaces, with the effect becoming increasingly pronounced for lower pitch sizes. This enhancement is attributed to the role of metal/metal interfaces as crack-arresting sites during interfacial fracture. The findings in this work provide critical insights for optimizing hybrid bonding designs in advanced interconnect technologies.
{"title":"Quantitative assessment of adhesion strength in hybrid bonded interfaces with varying metal contact density","authors":"Kris Vanstreels, Oguzhan Orkut Okudur, Mario Gonzalez, Eric Beyne","doi":"10.1016/j.mee.2025.112384","DOIUrl":"10.1016/j.mee.2025.112384","url":null,"abstract":"<div><div>This work systematically investigates the influence of metal contact density and pitch size on the adhesion strength of hybrid bonded interfaces using an energy-based nanoindentation methodology to quantify interfacial bond strength. Results show that the presence of metal at the bonding interface enhances adhesion strength of hybrid bonded interfaces, with the effect becoming increasingly pronounced for lower pitch sizes. This enhancement is attributed to the role of metal/metal interfaces as crack-arresting sites during interfacial fracture. The findings in this work provide critical insights for optimizing hybrid bonding designs in advanced interconnect technologies.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"300 ","pages":"Article 112384"},"PeriodicalIF":2.6,"publicationDate":"2025-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144685999","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-11-15Epub Date: 2025-03-31DOI: 10.1016/j.mee.2025.112345
Jon de Vecchy , Jean-Hervé Tortai , Maxime Besacier , Delphine Le Cunff , Bernard Pelissier
To monitor the Ge-rich GeSbTe crystallization process, ellipsometry and Raman spectroscopy were correlated by Machine Learning using a Neural Network approach. Ellipsometry was selected for being a fast, non-destructive, and in-line metrology technique and Raman spectroscopy was selected for its crystallization monitoring potential.
An experimental ellipsometry/Raman spectroscopy dataset was acquired in a 25–410 °C range. Assuming that the crystallization process is germanium-driven, the crystallinity rate was extracted from fitting the Raman germanium-related modes. Neural Network hybridization was performed to predict the crystallinity rate (output) from the raw ellipsometry spectra (input).
Models trained with these experimental data show poor performance, especially in the 390–410 °C crystallization range. The lack of data was identified to be the main issue. To generate data, the experimental data were independently modeled using numeric temperature laws. Ellipsometry spectra were then generated and labeled with crystallinity rates at any given temperature. The synthetic datasets were then used as a training dataset, leading to a better prediction of the crystallization value, dividing the models' mean squared error by more than ten times.
Finally, the synthetic data-trained models were compared to the experimental data-trained models on an experimental test set. Synthetic data-trained models showed better performance in the crystallization range than the experimental data-trained models (∼2 times lower mean squared prediction errors). The proof of concept of this study is thus validated and could lead to promising potential results in fast crystallization rate prediction of phase change material simply using optical experimental raw measurements.
{"title":"Hybrid metrology investigation combining Raman and ellipsometry spectroscopy applied to in line GeSbTe crystallization measurements and deep learning approaches for accurate prediction","authors":"Jon de Vecchy , Jean-Hervé Tortai , Maxime Besacier , Delphine Le Cunff , Bernard Pelissier","doi":"10.1016/j.mee.2025.112345","DOIUrl":"10.1016/j.mee.2025.112345","url":null,"abstract":"<div><div>To monitor the Ge-rich GeSbTe crystallization process, ellipsometry and Raman spectroscopy were correlated by Machine Learning using a Neural Network approach. Ellipsometry was selected for being a fast, non-destructive, and in-line metrology technique and Raman spectroscopy was selected for its crystallization monitoring potential.</div><div>An experimental ellipsometry/Raman spectroscopy dataset was acquired in a 25–410 °C range. Assuming that the crystallization process is germanium-driven, the crystallinity rate was extracted from fitting the Raman germanium-related modes. Neural Network hybridization was performed to predict the crystallinity rate (output) from the raw ellipsometry spectra (input).</div><div>Models trained with these experimental data show poor performance, especially in the 390–410 °C crystallization range. The lack of data was identified to be the main issue. To generate data, the experimental data were independently modeled using numeric temperature laws. Ellipsometry spectra were then generated and labeled with crystallinity rates at any given temperature. The synthetic datasets were then used as a training dataset, leading to a better prediction of the crystallization value, dividing the models' mean squared error by more than ten times.</div><div>Finally, the synthetic data-trained models were compared to the experimental data-trained models on an experimental test set. Synthetic data-trained models showed better performance in the crystallization range than the experimental data-trained models (∼2 times lower mean squared prediction errors). The proof of concept of this study is thus validated and could lead to promising potential results in fast crystallization rate prediction of phase change material simply using optical experimental raw measurements.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"300 ","pages":"Article 112345"},"PeriodicalIF":2.6,"publicationDate":"2025-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144223581","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-11-15Epub Date: 2025-06-06DOI: 10.1016/j.mee.2025.112360
Boshang Lu , Hu Zhao , Jiayu Ma , Jian Wang , Qian Li , Wei Xun , Daixuan Wu
This paper proposes an ice prevention and de-icing flexible microwave sensor array based on electrothermal coupling. The flexible sensor array uses the principle of microwave resonance to detect ice thickness and shape, integrating an electric heating moduleto achieve integrated ice prevention and de-icing functions. Ice detection employs a complementary coupled crack ring resonator (CCSRR) structure sensitive to ice layer thickness, while electric heating de-icing is achieved through a flexible structure of PI(Polyimide) substrate heating wires, combined with NTC(Negative Temperature Coefficient Thermistor) for real-time temperature feedback. Low-power operation mode of electric heating film module endowing the system with certain anti-icing capabilities. Additionally, the sensor array is fully flexible, making it easy to install on areas prone to icing on drones, thus preventing icing from affecting flight safety. The array sensor can perform multi-point measurements to obtain ice shape information. First, a single electrothermal coupling ice prevention and de-icing integrated sensor element was fabricated, and a S21 parameter testing platform was established to verify the ice detection and de-icing capabilities of the sensor array system. The results show that the designed sensor array can distinguish 0.1 mm ice layers. In a-10 °C environment, electrothermal de-icing experiments demonstrated that 4 mm ice layers could be completely melted within 20 s. The heating effect of the sensor array is ideal; preheating can effectively prevent icing, and the degree of de-icing can be simultaneously determined during the de-icing process. The Low-power operation mode of electric heating film module ensures that when icing occurs on the system surfaceThe delay is doubled, and the energy consumption of single electric heating anti-icing is reduced by half. It proves that the ice sensor array has good ice detection and anti-icing ability.
{"title":"Electrothermal-coupled flexible microwave resonant icing sensor Array","authors":"Boshang Lu , Hu Zhao , Jiayu Ma , Jian Wang , Qian Li , Wei Xun , Daixuan Wu","doi":"10.1016/j.mee.2025.112360","DOIUrl":"10.1016/j.mee.2025.112360","url":null,"abstract":"<div><div>This paper proposes an ice prevention and de-icing flexible microwave sensor array based on electrothermal coupling. The flexible sensor array uses the principle of microwave resonance to detect ice thickness and shape, integrating an electric heating moduleto achieve integrated ice prevention and de-icing functions. Ice detection employs a complementary coupled crack ring resonator (CCSRR) structure sensitive to ice layer thickness, while electric heating de-icing is achieved through a flexible structure of PI(Polyimide) substrate heating wires, combined with NTC(Negative Temperature Coefficient Thermistor) for real-time temperature feedback. Low-power operation mode of electric heating film module endowing the system with certain anti-icing capabilities. Additionally, the sensor array is fully flexible, making it easy to install on areas prone to icing on drones, thus preventing icing from affecting flight safety. The array sensor can perform multi-point measurements to obtain ice shape information. First, a single electrothermal coupling ice prevention and de-icing integrated sensor element was fabricated, and a S21 parameter testing platform was established to verify the ice detection and de-icing capabilities of the sensor array system. The results show that the designed sensor array can distinguish 0.1 mm ice layers. In a-10 °C environment, electrothermal de-icing experiments demonstrated that 4 mm ice layers could be completely melted within 20 s. The heating effect of the sensor array is ideal; preheating can effectively prevent icing, and the degree of de-icing can be simultaneously determined during the de-icing process. The Low-power operation mode of electric heating film module ensures that when icing occurs on the system surfaceThe delay is doubled, and the energy consumption of single electric heating anti-icing is reduced by half. It proves that the ice sensor array has good ice detection and anti-icing ability.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"300 ","pages":"Article 112360"},"PeriodicalIF":2.6,"publicationDate":"2025-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144366962","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-11-15Epub Date: 2025-07-17DOI: 10.1016/j.mee.2025.112379
Zhoujie Pan , DingYi Zhang , Yanming Liu , He Tian
This paper introduces a new paradigm of memristor-based in-memory stateful logic computing. Based on multi-level co-optimization. In device level, with the aid of Mirrored RRAM Device (MRD), we develop a scheme to build basic logics by a single device in a reconfigurable manner. Furthermore, we also proposed a method for cascading logic to construct more complex logic. Compared to existing architectures, our MRD based method exhibits robustness against voltage and device variations, and eliminates the need for multiple reference voltages. Our method also support execution of more complex logic operations, such as 1-bit full adders, through a cascaded configuration in just three steps using four MRD devices. SPICE simulations have been conducted to validate the feasibility of our approach. These advancements position the MRD as a promising candidate for scalable and efficient in-memory computing applications.
{"title":"A robust and efficient new paradigm for building in-memory stateful logic system with memristor: Based on multi-level co-optimization","authors":"Zhoujie Pan , DingYi Zhang , Yanming Liu , He Tian","doi":"10.1016/j.mee.2025.112379","DOIUrl":"10.1016/j.mee.2025.112379","url":null,"abstract":"<div><div>This paper introduces a new paradigm of memristor-based in-memory stateful logic computing. Based on multi-level co-optimization. In device level, with the aid of Mirrored RRAM Device (MRD), we develop a scheme to build basic logics by a single device in a reconfigurable manner. Furthermore, we also proposed a method for cascading logic to construct more complex logic. Compared to existing architectures, our MRD based method exhibits robustness against voltage and device variations, and eliminates the need for multiple reference voltages. Our method also support execution of more complex logic operations, such as 1-bit full adders, through a cascaded configuration in just three steps using four MRD devices. SPICE simulations have been conducted to validate the feasibility of our approach. These advancements position the MRD as a promising candidate for scalable and efficient in-memory computing applications.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"300 ","pages":"Article 112379"},"PeriodicalIF":2.6,"publicationDate":"2025-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144653763","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-11-15Epub Date: 2025-07-09DOI: 10.1016/j.mee.2025.112380
A. Revathy , S. Ravi , A. Lakshmi Narayana , K. Nirmala Devi , Raji Pandurangan
GaN High Electron Mobility Transistors represent a breakthrough technology for biosensing applications, offering exceptional sensitivity through their unique two-dimensional electron gas channel positioned close to the sensing surface. This comprehensive review provides the first systematic analysis of the complete GaN HEMT biosensor ecosystem, distinguishing itself from previous reviews through: (i) Comprehensive coverage of emerging architectural innovations including novel heterostructures, dimensional variants, and advanced gate engineering approaches; (ii) Detailed analysis of MOS-HEMT configurations and their superior performance in physiological media; and (iii) Critical assessment of commercialization challenges and practical implementation strategies. The fundamental advantage of GaN HEMTs lies in their ability to detect minute charge variations from biomolecular interactions with detection limits reaching attomolar concentrations, enabled by the 2DEG channel's proximity (20–30 nm) to the sensing surface. The review systematically examines device architectures ranging from conventional AlGaN/GaN structures to advanced MOS-HEMT designs with dielectric layers that provide 2–3× sensitivity enhancement while improving stability in high ionic strength media. Novel heterostructures including InAlN/GaN systems and N-polar configurations offer up to 4× sensitivity improvements compared to conventional designs. Different gate engineering approaches are analyzed, encompassing dual-gate architectures for differential sensing, recessed designs for enhanced control, and extended-gate configurations for harsh environments.
This review uniquely addresses the critical interface between device physics and practical biosensing through comprehensive analysis of surface functionalization strategies, charge screening mitigation techniques, and biocompatibility considerations. Current limitations including signal drift (0.1–2.0 mV/h), selectivity challenges in complex biological matrices, and manufacturing reproducibility (5–15 % coefficient of variation) are critically evaluated alongside emerging solutions involving differential measurements, anti-fouling surface modifications, and machine learning algorithms. Future developments focus on transformative trends not comprehensively covered in previous reviews: self-powered sensors with integrated energy harvesting, multi-modal detection platforms combining optical and electrochemical sensing, IoT-connected monitoring networks for population-level healthcare, and expanding environmental monitoring applications. These advances position GaN HEMT biosensors as enabling technologies for next-generation healthcare diagnostics, environmental monitoring, and smart sensing ecosystems.
{"title":"Advanced gallium nitride high electron mobility transistors for biosensing applications: Progress, challenges, and future perspectives","authors":"A. Revathy , S. Ravi , A. Lakshmi Narayana , K. Nirmala Devi , Raji Pandurangan","doi":"10.1016/j.mee.2025.112380","DOIUrl":"10.1016/j.mee.2025.112380","url":null,"abstract":"<div><div>GaN High Electron Mobility Transistors represent a breakthrough technology for biosensing applications, offering exceptional sensitivity through their unique two-dimensional electron gas channel positioned close to the sensing surface. This comprehensive review provides the first systematic analysis of the complete GaN HEMT biosensor ecosystem, distinguishing itself from previous reviews through: (i) Comprehensive coverage of emerging architectural innovations including novel heterostructures, dimensional variants, and advanced gate engineering approaches; (ii) Detailed analysis of MOS-HEMT configurations and their superior performance in physiological media; and (iii) Critical assessment of commercialization challenges and practical implementation strategies. The fundamental advantage of GaN HEMTs lies in their ability to detect minute charge variations from biomolecular interactions with detection limits reaching attomolar concentrations, enabled by the 2DEG channel's proximity (20–30 nm) to the sensing surface. The review systematically examines device architectures ranging from conventional AlGaN/GaN structures to advanced MOS-HEMT designs with dielectric layers that provide 2–3× sensitivity enhancement while improving stability in high ionic strength media. Novel heterostructures including InAlN/GaN systems and N-polar configurations offer up to 4× sensitivity improvements compared to conventional designs. Different gate engineering approaches are analyzed, encompassing dual-gate architectures for differential sensing, recessed designs for enhanced control, and extended-gate configurations for harsh environments.</div><div>This review uniquely addresses the critical interface between device physics and practical biosensing through comprehensive analysis of surface functionalization strategies, charge screening mitigation techniques, and biocompatibility considerations. Current limitations including signal drift (0.1–2.0 mV/h), selectivity challenges in complex biological matrices, and manufacturing reproducibility (5–15 % coefficient of variation) are critically evaluated alongside emerging solutions involving differential measurements, anti-fouling surface modifications, and machine learning algorithms. Future developments focus on transformative trends not comprehensively covered in previous reviews: self-powered sensors with integrated energy harvesting, multi-modal detection platforms combining optical and electrochemical sensing, IoT-connected monitoring networks for population-level healthcare, and expanding environmental monitoring applications. These advances position GaN HEMT biosensors as enabling technologies for next-generation healthcare diagnostics, environmental monitoring, and smart sensing ecosystems.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"300 ","pages":"Article 112380"},"PeriodicalIF":2.6,"publicationDate":"2025-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144614334","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-11-15Epub Date: 2025-07-03DOI: 10.1016/j.mee.2025.112377
Yixian Song , Hao Cai , Dawei Gao , Kai Xu
Bipolar-CMOS-DMOS (BCD) is the mainstream manufacturing technology for power management integrated circuits (PMIC), with laterally diffused metal-oxide semiconductor (LDMOS) devices serving as the core component. This review provides a comprehensive overview of LDMOS device structures, manufacturing processes, and applications. It discusses the fundamental structure and working principles, encompassing the manufacturing processes, critical technological features, and industry-specific module descriptions. Furthermore, it introduces device optimization strategies
tailored to various application scenarios. By integrating insights from both industry and academia, this review highlights emerging trends and challenges in the field, offering a forward-looking perspective on LDMOS advancements and future research directions.
{"title":"A review on structure and manufacturing optimization of LDMOS devices","authors":"Yixian Song , Hao Cai , Dawei Gao , Kai Xu","doi":"10.1016/j.mee.2025.112377","DOIUrl":"10.1016/j.mee.2025.112377","url":null,"abstract":"<div><div>Bipolar-CMOS-DMOS (BCD) is the mainstream manufacturing technology for power management integrated circuits (PMIC), with laterally diffused metal-oxide semiconductor (LDMOS) devices serving as the core component. This review provides a comprehensive overview of LDMOS device structures, manufacturing processes, and applications. It discusses the fundamental structure and working principles, encompassing the manufacturing processes, critical technological features, and industry-specific module descriptions. Furthermore, it introduces device optimization strategies</div><div>tailored to various application scenarios. By integrating insights from both industry and academia, this review highlights emerging trends and challenges in the field, offering a forward-looking perspective on LDMOS advancements and future research directions.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"300 ","pages":"Article 112377"},"PeriodicalIF":2.6,"publicationDate":"2025-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144570788","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
The development of nanotechnology has had a significant impact on thermoelectric generators (TEGs), which are expected to play a vital role in meeting sustainable energy requirements. In an integrated micro-thermoelectric device, any change in peripheral parts such as metal/semiconductor contacts may affect thermoelectric (TE) power generation. In this study, we evaluated the TE performance of silicon-based micro-TEGs by varying the metal/Silicon contact arrays on the hot and cold side pads to investigate the effect of the contact array in TE devices. The results show that the device's performance has been influenced by a variation of temperature gradient that happened through the silicon-nanowires due to the alternation of contact arrays.
{"title":"Impact of metal/semiconductor contact layout on the performance of an integrated silicon cavity-free micro thermoelectric generator","authors":"Md Mehdee Hasan Mahfuz, Shuhei Arai, Yuma Miyake, Takeo Matsuki, Takanobu Watanabe","doi":"10.1016/j.mee.2025.112365","DOIUrl":"10.1016/j.mee.2025.112365","url":null,"abstract":"<div><div>The development of nanotechnology has had a significant impact on thermoelectric generators (TEGs), which are expected to play a vital role in meeting sustainable energy requirements. In an integrated micro-thermoelectric device, any change in peripheral parts such as metal/semiconductor contacts may affect thermoelectric (TE) power generation. In this study, we evaluated the TE performance of silicon-based micro-TEGs by varying the metal/Silicon contact arrays on the hot and cold side pads to investigate the effect of the contact array in TE devices. The results show that the device's performance has been influenced by a variation of temperature gradient that happened through the silicon-nanowires due to the alternation of contact arrays.</div></div>","PeriodicalId":18557,"journal":{"name":"Microelectronic Engineering","volume":"300 ","pages":"Article 112365"},"PeriodicalIF":2.6,"publicationDate":"2025-11-15","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"144331159","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":4,"RegionCategory":"工程技术","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2025-11-15Epub Date: 2025-06-16DOI: 10.1016/j.mee.2025.112374
Giulio Galderisi , Thomas Mikolajick , Jens Trommer
Assessing the reliability of emerging device technologies is of fundamental importance to facilitate their adoption in larger scale electronic circuits and systems. This is even more true for all those devices whose unique behavior paves the way towards innovative circuit solutions, but also poses new reliability concerns that are not well known as in established technologies such as CMOS. In this paper, we thoroughly discuss the bias temperature instability (BTI) reliability features of three-independent-gate reconfigurable field effect transistors (RFETs). This multi-gate transistor technology is characterized by the unique feature of providing volatile polarity and threshold control within an individual device. While these devices are subjected to positive and negative BTI in alternating fashion during circuit operation, we identified negative BTI to be the worst-case condition with respect to performance degradation of RFETs in terms of threshold voltage shift and sub-threshold slope reduction. In addition we could reveal clear phenomenological differences in the degradation if the stress profiles are applied to the gates that turn on and off the transistors, rather than when they are applied to the ones that program their polarity. Positive BTI generally produces negligible effects on the threshold voltage shifts, while it has a certain impact on the sub-threshold slope degradation of one of the operational modes of the considered transistors.
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