Pub Date : 2012-11-12DOI: 10.1109/ISEMC.2012.6351668
I. Nicolae, P. Nicolae, M. Nicolae
The paper deals with the analysis based on the Discrete Wavelet Transform (DWT) of stationary regimes in three-phase power systems with significant distortions. Firstly one presents the conclusion of preliminary evaluations used to select the most appropriate analysis technique: RMS values were evaluated using different DWT-based methods, analysis of errors, of memory consumptions and respectively of runtimes was done. Afterward data gathered from the excitation of the main generator from a power plant were submitted to a complex analysis. Three DWT-based methods were selected for comparative studies: one relies on the function dwt, provided by Matlab, the other two rely on original functions implementing the so-called “D4 Wavelet Transform” (“dwm” assumes that the analysed signal is periodic, whilst “dwi” performs interpolations, being applicable to non-periodic signals as well). The superiority of dwm and dwi is sustained by smaller errors (results yielded by the Fast Fourier Transform (FFT) were used as reference) and significantly smaller requirements for computational resources (memory and runtime).
{"title":"Improved wavelet-based techniques for power quality evaluation in three-phase systems","authors":"I. Nicolae, P. Nicolae, M. Nicolae","doi":"10.1109/ISEMC.2012.6351668","DOIUrl":"https://doi.org/10.1109/ISEMC.2012.6351668","url":null,"abstract":"The paper deals with the analysis based on the Discrete Wavelet Transform (DWT) of stationary regimes in three-phase power systems with significant distortions. Firstly one presents the conclusion of preliminary evaluations used to select the most appropriate analysis technique: RMS values were evaluated using different DWT-based methods, analysis of errors, of memory consumptions and respectively of runtimes was done. Afterward data gathered from the excitation of the main generator from a power plant were submitted to a complex analysis. Three DWT-based methods were selected for comparative studies: one relies on the function dwt, provided by Matlab, the other two rely on original functions implementing the so-called “D4 Wavelet Transform” (“dwm” assumes that the analysed signal is periodic, whilst “dwi” performs interpolations, being applicable to non-periodic signals as well). The superiority of dwm and dwi is sustained by smaller errors (results yielded by the Fast Fourier Transform (FFT) were used as reference) and significantly smaller requirements for computational resources (memory and runtime).","PeriodicalId":197346,"journal":{"name":"2012 IEEE International Symposium on Electromagnetic Compatibility","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2012-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132275995","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-12DOI: 10.1109/ISEMC.2012.6351774
P. Deschenes, M. Coulombe, R. Paknys, A. Pinchuk
This article describes a method to solve near-field coupling based on Hu's formulation which is applied to a complex navy ship electromagnetic environment where the transmit antenna, receive antenna and obstacles may all be located in the near-field. The method was developed for use with boundary value based computational electromagnetic software packages to overcome their inability of calculating received power when using an aperture illumination antenna model.
{"title":"Near-field coupling method for a complex navy ship environment","authors":"P. Deschenes, M. Coulombe, R. Paknys, A. Pinchuk","doi":"10.1109/ISEMC.2012.6351774","DOIUrl":"https://doi.org/10.1109/ISEMC.2012.6351774","url":null,"abstract":"This article describes a method to solve near-field coupling based on Hu's formulation which is applied to a complex navy ship electromagnetic environment where the transmit antenna, receive antenna and obstacles may all be located in the near-field. The method was developed for use with boundary value based computational electromagnetic software packages to overcome their inability of calculating received power when using an aperture illumination antenna model.","PeriodicalId":197346,"journal":{"name":"2012 IEEE International Symposium on Electromagnetic Compatibility","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2012-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134389881","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-12DOI: 10.1109/ISEMC.2012.6351674
R. Kobayashi, G. Kubo, H. Otsuka, T. Mido, Y. Kobayashi, H. Fujii, T. Sudo
As CMOS LSIs operate at higher clock frequency and at lower supply voltage, power integrity is becoming a critical issue to maintain digital electronic systems more stable. Power supply fluctuation excited by core circuits or I/O circuits induces logic instability and electromagnetic radiation. Therefore, total impedance of power distribution network (PDN) must be taking into consideration in the chip-package-board co-design. Especially, anti-resonance peaks in the PDN due to the parallel combination of on-chip capacitance and package inductance induces the unwanted power supply fluctuation, and results in the degradation of signal integrity and electromagnetic interference (EMI). In this paper, effects of critical damping condition for the total PDN impedance on power supply noise has been studied by designing different on-chip PDN properties. The measured power supply noises for the four test chips successfully showed typical characteristics of 3 different regions. The critical damping condition against the anti-resonance peak has been proved to be effective to suppress the power supply noise on a chip.
{"title":"Effects of critically damped total PDN impedance in chip-package-board co-design","authors":"R. Kobayashi, G. Kubo, H. Otsuka, T. Mido, Y. Kobayashi, H. Fujii, T. Sudo","doi":"10.1109/ISEMC.2012.6351674","DOIUrl":"https://doi.org/10.1109/ISEMC.2012.6351674","url":null,"abstract":"As CMOS LSIs operate at higher clock frequency and at lower supply voltage, power integrity is becoming a critical issue to maintain digital electronic systems more stable. Power supply fluctuation excited by core circuits or I/O circuits induces logic instability and electromagnetic radiation. Therefore, total impedance of power distribution network (PDN) must be taking into consideration in the chip-package-board co-design. Especially, anti-resonance peaks in the PDN due to the parallel combination of on-chip capacitance and package inductance induces the unwanted power supply fluctuation, and results in the degradation of signal integrity and electromagnetic interference (EMI). In this paper, effects of critical damping condition for the total PDN impedance on power supply noise has been studied by designing different on-chip PDN properties. The measured power supply noises for the four test chips successfully showed typical characteristics of 3 different regions. The critical damping condition against the anti-resonance peak has been proved to be effective to suppress the power supply noise on a chip.","PeriodicalId":197346,"journal":{"name":"2012 IEEE International Symposium on Electromagnetic Compatibility","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2012-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"133030671","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-12DOI: 10.1109/ISEMC.2012.6351756
Cong Gao, Ji Chen, Xin Wu, P. Amleshi
The integrated crosstalk noise (ICN) has been proposed in the IEEE 802.3ba standard to measure the crosstalk in the high-speed channel and accepted as a replacement of the ICR (Insertion Crosstalk Ratio) for channel noise estimation. As the PHY options of NRZ, PAM-4 and/or Duobinary are actively explored for higher data rate, a generalized ICN model will be needed for characterizing the channel SI performance. This paper presents the analysis of the integrated crosstalk noise (ICN) model for 10 Gb/s NRZ coding based system and generalizes the ICN model for 25 Gb/s and beyond system adopting the NRZ, PAM-4 or Duobinary coding scheme.
{"title":"The Generalized ICN for 25Gbps+ channel using NRZ, PAM-M or Duobinary coding scheme","authors":"Cong Gao, Ji Chen, Xin Wu, P. Amleshi","doi":"10.1109/ISEMC.2012.6351756","DOIUrl":"https://doi.org/10.1109/ISEMC.2012.6351756","url":null,"abstract":"The integrated crosstalk noise (ICN) has been proposed in the IEEE 802.3ba standard to measure the crosstalk in the high-speed channel and accepted as a replacement of the ICR (Insertion Crosstalk Ratio) for channel noise estimation. As the PHY options of NRZ, PAM-4 and/or Duobinary are actively explored for higher data rate, a generalized ICN model will be needed for characterizing the channel SI performance. This paper presents the analysis of the integrated crosstalk noise (ICN) model for 10 Gb/s NRZ coding based system and generalizes the ICN model for 25 Gb/s and beyond system adopting the NRZ, PAM-4 or Duobinary coding scheme.","PeriodicalId":197346,"journal":{"name":"2012 IEEE International Symposium on Electromagnetic Compatibility","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2012-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124322703","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-12DOI: 10.1109/ISEMC.2012.6351798
K. Armstrong
Where electronic equipment must function so as to maintain very low risk levels for safety, financial, or other reasons, it is not sufficient to only test it for immunity to electromagnetic (EM) disturbances, whatever the test levels used. However, where EM immunity tests are used as a part of such equipment's verification or validation, for their results to be meaningful for the achievement of low risks, it is necessary to increase the test levels significantly above the levels of EM disturbances that could occur in the operational environment(s). This paper describes a number of reasons for increasing immunity test levels, gives some guidance on by how much, and discusses the problems that this approach can encounter.
{"title":"Testing for immunity to simultaneous disturbances and similar issues for risk managing EMC","authors":"K. Armstrong","doi":"10.1109/ISEMC.2012.6351798","DOIUrl":"https://doi.org/10.1109/ISEMC.2012.6351798","url":null,"abstract":"Where electronic equipment must function so as to maintain very low risk levels for safety, financial, or other reasons, it is not sufficient to only test it for immunity to electromagnetic (EM) disturbances, whatever the test levels used. However, where EM immunity tests are used as a part of such equipment's verification or validation, for their results to be meaningful for the achievement of low risks, it is necessary to increase the test levels significantly above the levels of EM disturbances that could occur in the operational environment(s). This paper describes a number of reasons for increasing immunity test levels, gives some guidance on by how much, and discusses the problems that this approach can encounter.","PeriodicalId":197346,"journal":{"name":"2012 IEEE International Symposium on Electromagnetic Compatibility","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2012-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129230006","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-12DOI: 10.1109/ISEMC.2012.6351690
F. Nakamoto, T. Uchida, C. Miyazaki, N. Oka, K. Misu
We studied a CMC model with a one-turn toroidal core, which is easily used in 3D field simulators. The calculation model of a CMC differs from the actual shape, so we need to correct the CMC's characteristics. When we calculated the noise-suppressing effect of the CMC, we used relative permeability, which differs from the actual value, to approximate the actual characteristics of a CMC. From the comparison of calculated results with measurement results, the calculated results were comparable to the measurement results. We confirmed the validity of our model.
{"title":"A simplified model of a common mode choke coil for 3D field simulators","authors":"F. Nakamoto, T. Uchida, C. Miyazaki, N. Oka, K. Misu","doi":"10.1109/ISEMC.2012.6351690","DOIUrl":"https://doi.org/10.1109/ISEMC.2012.6351690","url":null,"abstract":"We studied a CMC model with a one-turn toroidal core, which is easily used in 3D field simulators. The calculation model of a CMC differs from the actual shape, so we need to correct the CMC's characteristics. When we calculated the noise-suppressing effect of the CMC, we used relative permeability, which differs from the actual value, to approximate the actual characteristics of a CMC. From the comparison of calculated results with measurement results, the calculated results were comparable to the measurement results. We confirmed the validity of our model.","PeriodicalId":197346,"journal":{"name":"2012 IEEE International Symposium on Electromagnetic Compatibility","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2012-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"116719826","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-12DOI: 10.1109/ISEMC.2012.6351650
Ji Zhang, Jianmin Zhang, J. Lim, K. Qiu, R. Brooks, B. Chen
In modern high performance networking systems, high-speed channels are among the most concerns due to the channel loss, discontinuities and crosstalk as data rate reaches 15 Gbps (Gigabit per second) and above through backplane. Full-wave modeling and system level simulations are widely used to estimate the performance for high-speed channels. Due to the variations and uncertainties associated with the simulation and manufacturing, correlation between simulation and measurement is often used to gain confidence on the channel performance prediction. In this paper, a high-speed channel including the portion inside a high-end ASIC (Application-Specific Integrated Circuit) package and the portion on a PCB (Printed Circuit Board) are investigated. The FSV (Feature Selection Validation) method is used to correlate the channel simulation and measurement, and quantitative conclusions between modeling and measurement are given for the studied channels.
{"title":"Using FSV in high-speed channel characterization and correlation","authors":"Ji Zhang, Jianmin Zhang, J. Lim, K. Qiu, R. Brooks, B. Chen","doi":"10.1109/ISEMC.2012.6351650","DOIUrl":"https://doi.org/10.1109/ISEMC.2012.6351650","url":null,"abstract":"In modern high performance networking systems, high-speed channels are among the most concerns due to the channel loss, discontinuities and crosstalk as data rate reaches 15 Gbps (Gigabit per second) and above through backplane. Full-wave modeling and system level simulations are widely used to estimate the performance for high-speed channels. Due to the variations and uncertainties associated with the simulation and manufacturing, correlation between simulation and measurement is often used to gain confidence on the channel performance prediction. In this paper, a high-speed channel including the portion inside a high-end ASIC (Application-Specific Integrated Circuit) package and the portion on a PCB (Printed Circuit Board) are investigated. The FSV (Feature Selection Validation) method is used to correlate the channel simulation and measurement, and quantitative conclusions between modeling and measurement are given for the studied channels.","PeriodicalId":197346,"journal":{"name":"2012 IEEE International Symposium on Electromagnetic Compatibility","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2012-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115263827","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-12DOI: 10.1109/ISEMC.2012.6351647
A. Sugiura, M. Alexander, D. Knight, K. Fujii
The International Special Committee on Radio Interference (CISPR) has included in the draft standard CISPR 16-1-6, the equivalent capacitance substitution method (ECSM) for the calibration of monopole antennas below 30 MHz. To provide background information on the ECSM for CISPR 16-1-6 currently discussed, the present paper investigates the principle and uncertainty analysis of the ECSM in detail.
{"title":"Equivalent capacitance substitution method for monopole antenna calibration","authors":"A. Sugiura, M. Alexander, D. Knight, K. Fujii","doi":"10.1109/ISEMC.2012.6351647","DOIUrl":"https://doi.org/10.1109/ISEMC.2012.6351647","url":null,"abstract":"The International Special Committee on Radio Interference (CISPR) has included in the draft standard CISPR 16-1-6, the equivalent capacitance substitution method (ECSM) for the calibration of monopole antennas below 30 MHz. To provide background information on the ECSM for CISPR 16-1-6 currently discussed, the present paper investigates the principle and uncertainty analysis of the ECSM in detail.","PeriodicalId":197346,"journal":{"name":"2012 IEEE International Symposium on Electromagnetic Compatibility","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2012-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115293023","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-12DOI: 10.1109/ISEMC.2012.6351673
C. Hwang, Kiyeong Kim, J. Pak, Joungho Kim
An on-chip electromagnetic bandgap (EBG) structure is applied to protect a delay-locked loop (DLL) from simultaneous switching noise (SSN) coupling. The fabricated on-chip EBG structure has a low cut-off frequency of approximately 1 GHz. An accumulation-mode MOS capacitor is used to achieve a high layout efficiency for the MOS capacitor and therefore a large value of capacitance for the same layout area. The on-chip EBG structure is embedded in the middle of an on-chip power distribution network in which the DLL and an inverter chain acting as a noise source are connected. The measured results showed that the jitter at the DLL clock output is severely increased by the coupled SSN from the inverter chain. However, the operation of the inverter chain did not affect the jitter when the DLL was protected by the on-chip EBG structure.
{"title":"Protection of a delay-locked loop from simultaneous switching noise coupling using an on-chip electromagnetic bandgap structure","authors":"C. Hwang, Kiyeong Kim, J. Pak, Joungho Kim","doi":"10.1109/ISEMC.2012.6351673","DOIUrl":"https://doi.org/10.1109/ISEMC.2012.6351673","url":null,"abstract":"An on-chip electromagnetic bandgap (EBG) structure is applied to protect a delay-locked loop (DLL) from simultaneous switching noise (SSN) coupling. The fabricated on-chip EBG structure has a low cut-off frequency of approximately 1 GHz. An accumulation-mode MOS capacitor is used to achieve a high layout efficiency for the MOS capacitor and therefore a large value of capacitance for the same layout area. The on-chip EBG structure is embedded in the middle of an on-chip power distribution network in which the DLL and an inverter chain acting as a noise source are connected. The measured results showed that the jitter at the DLL clock output is severely increased by the coupled SSN from the inverter chain. However, the operation of the inverter chain did not affect the jitter when the DLL was protected by the on-chip EBG structure.","PeriodicalId":197346,"journal":{"name":"2012 IEEE International Symposium on Electromagnetic Compatibility","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2012-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114929380","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2012-11-12DOI: 10.1109/ISEMC.2012.6351645
V. Khilkevich, D. Pommerenke, Li Gang, Xu Shuai
Measuring common mode currents on differential microstrip transmission lines is a complicated task, because the common mode current, being the parasitic mode, is usually much weaker than the intended differential current. Hence, the measurement technique has to provide sufficient rejection of the differential mode. The probe described in this paper uses a shielded loop probe combined with a metallic screen to enhance the differential mode rejection of the current probe. The proposed techniques were tested on a test board at frequencies up to 6 GHz.
{"title":"An inductive probe for the measurement of common mode currents on differential traces","authors":"V. Khilkevich, D. Pommerenke, Li Gang, Xu Shuai","doi":"10.1109/ISEMC.2012.6351645","DOIUrl":"https://doi.org/10.1109/ISEMC.2012.6351645","url":null,"abstract":"Measuring common mode currents on differential microstrip transmission lines is a complicated task, because the common mode current, being the parasitic mode, is usually much weaker than the intended differential current. Hence, the measurement technique has to provide sufficient rejection of the differential mode. The probe described in this paper uses a shielded loop probe combined with a metallic screen to enhance the differential mode rejection of the current probe. The proposed techniques were tested on a test board at frequencies up to 6 GHz.","PeriodicalId":197346,"journal":{"name":"2012 IEEE International Symposium on Electromagnetic Compatibility","volume":null,"pages":null},"PeriodicalIF":0.0,"publicationDate":"2012-11-12","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127067520","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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