Pub Date : 2009-07-09DOI: 10.1109/ISSCS.2009.5206114
R. Iacob, O. Neagoe, A. Manolescu
Digital potentiometers are extensively used for digitally controlled adjustments in mixed-signal systems. The demand for higher resolution and increased tuning accuracy is driving the research efforts toward developing multistage potentiometer architectures that employ special techniques for achieving high precision with fewer components. This paper describes such architectures and techniques.
{"title":"Multistage architectures for high resolution digital potentiometers","authors":"R. Iacob, O. Neagoe, A. Manolescu","doi":"10.1109/ISSCS.2009.5206114","DOIUrl":"https://doi.org/10.1109/ISSCS.2009.5206114","url":null,"abstract":"Digital potentiometers are extensively used for digitally controlled adjustments in mixed-signal systems. The demand for higher resolution and increased tuning accuracy is driving the research efforts toward developing multistage potentiometer architectures that employ special techniques for achieving high precision with fewer components. This paper describes such architectures and techniques.","PeriodicalId":277587,"journal":{"name":"2009 International Symposium on Signals, Circuits and Systems","volume":"22 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122295001","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-09DOI: 10.1109/ISSCS.2009.5206179
A. A. Kamal, A. Youssef
Since its adoption as a new encryption standard by NIST, the Advanced Encryption Standard (AES) has become the default choice for various applications. On the other hand, a straightforward implementation of the AES is vulnerable to different forms of side channel attacks. In this paper, we explore several countermeasure techniques against power analysis attacks. In particular, we present an area optimized design that combines shuffling, as a hiding countermeasure, with some recently proposed masking techniques. The developed power analysis resistant AES-128 ECB encryption/decryption engine requires 3090 slices of a Xilinx Virtex-II xc2v1000-6-bg575 FPGA, runs at a maximum clock speed of 51.75 MHz and produces a throughput of up to 15.33 Mbps.
{"title":"An area-optimized implementation for AES with hybrid countermeasures against power analysis","authors":"A. A. Kamal, A. Youssef","doi":"10.1109/ISSCS.2009.5206179","DOIUrl":"https://doi.org/10.1109/ISSCS.2009.5206179","url":null,"abstract":"Since its adoption as a new encryption standard by NIST, the Advanced Encryption Standard (AES) has become the default choice for various applications. On the other hand, a straightforward implementation of the AES is vulnerable to different forms of side channel attacks. In this paper, we explore several countermeasure techniques against power analysis attacks. In particular, we present an area optimized design that combines shuffling, as a hiding countermeasure, with some recently proposed masking techniques. The developed power analysis resistant AES-128 ECB encryption/decryption engine requires 3090 slices of a Xilinx Virtex-II xc2v1000-6-bg575 FPGA, runs at a maximum clock speed of 51.75 MHz and produces a throughput of up to 15.33 Mbps.","PeriodicalId":277587,"journal":{"name":"2009 International Symposium on Signals, Circuits and Systems","volume":"33 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"129016416","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-09DOI: 10.1109/ISSCS.2009.5206134
G. Lojewski, N. Militaru, M. Banciu
In this paper a bandpass planar filter, with cross-couplings and with a pair of attenuation poles, is investigated. The equi-ripple in-band response and the location of the poles on the frequency axis can be precisely controlled by using a new technique which combines accurate electromagnetic field simulations and fast linear circuit optimization, allowing the design of bandpass filters with improved performances. To illustrate the procedure, a microstrip bandpass filter was designed, verified by em-field simulation, fabricated and tested. The response of the designed filter is in good agreement with the specification, confirming the possibilities of realizing microwave bandpass filters with rigorously controlled characteristics, with reduced design time and non-prohibitive computational effort.
{"title":"Microwave bandpass filters with multiple couplings, designed using electromagnetic simulations and linear circuit optimization","authors":"G. Lojewski, N. Militaru, M. Banciu","doi":"10.1109/ISSCS.2009.5206134","DOIUrl":"https://doi.org/10.1109/ISSCS.2009.5206134","url":null,"abstract":"In this paper a bandpass planar filter, with cross-couplings and with a pair of attenuation poles, is investigated. The equi-ripple in-band response and the location of the poles on the frequency axis can be precisely controlled by using a new technique which combines accurate electromagnetic field simulations and fast linear circuit optimization, allowing the design of bandpass filters with improved performances. To illustrate the procedure, a microstrip bandpass filter was designed, verified by em-field simulation, fabricated and tested. The response of the designed filter is in good agreement with the specification, confirming the possibilities of realizing microwave bandpass filters with rigorously controlled characteristics, with reduced design time and non-prohibitive computational effort.","PeriodicalId":277587,"journal":{"name":"2009 International Symposium on Signals, Circuits and Systems","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132299164","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-09DOI: 10.1109/ISSCS.2009.5206101
S. Emerich, E. Lupu, A. Apatean
This paper aims to present a multimodal approach in emotion recognition which integrates information from both facial expressions and speech signal. Using two acted databases on different subjects, we were able to emphasize six emotions: sadness, anger, happiness, disgust, fear and neutral state. The models in the system were designed and tested by using a Support Vector Machine classifier. Firstly, the analysis of the strengths and the limitations of the systems based only on facial expressions or speech signal was performed. Data was then fused at the feature level. The results show that in this case the performance and the robustness of the emotion recognition system have been improved.
{"title":"Bimodal approach in emotion recognition using speech and facial expressions","authors":"S. Emerich, E. Lupu, A. Apatean","doi":"10.1109/ISSCS.2009.5206101","DOIUrl":"https://doi.org/10.1109/ISSCS.2009.5206101","url":null,"abstract":"This paper aims to present a multimodal approach in emotion recognition which integrates information from both facial expressions and speech signal. Using two acted databases on different subjects, we were able to emphasize six emotions: sadness, anger, happiness, disgust, fear and neutral state. The models in the system were designed and tested by using a Support Vector Machine classifier. Firstly, the analysis of the strengths and the limitations of the systems based only on facial expressions or speech signal was performed. Data was then fused at the feature level. The results show that in this case the performance and the robustness of the emotion recognition system have been improved.","PeriodicalId":277587,"journal":{"name":"2009 International Symposium on Signals, Circuits and Systems","volume":"397 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"134314126","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-09DOI: 10.1109/ISSCS.2009.5206186
I. Buciu, I. Nafornita
Face recognition task is of primary interest in many computer vision applications, including access control for security systems, forensic or surveillance. Most commercial biometric systems based on face recognition are claimed to perform satisfactory when the enrollment and testing process takes place under controlled environmental conditions such as constant illumination, constant pose scale, non-occluded faces or frontal view. More or less deviation from those conditions might lead to poor recognition performances or even recognition system's failure when a test identity has to be recognized under new modified testing conditions. Three non-negative matrix factorization (NMF) methods, namely, the standard one, the local NMF (LNMF) and the discriminant NMF (DNMF) are employed in this paper where their robustness against extreme lighting variations are tested for the face recognition task. Principal Component Analysis (PCA) method was also chosen as baseline. Experiments revealed that the best recognition performance is obtained with NMF, followed by DNMF and LNMF.
{"title":"Non-negative matrix factorization methods for face recognition under extreme lighting variations","authors":"I. Buciu, I. Nafornita","doi":"10.1109/ISSCS.2009.5206186","DOIUrl":"https://doi.org/10.1109/ISSCS.2009.5206186","url":null,"abstract":"Face recognition task is of primary interest in many computer vision applications, including access control for security systems, forensic or surveillance. Most commercial biometric systems based on face recognition are claimed to perform satisfactory when the enrollment and testing process takes place under controlled environmental conditions such as constant illumination, constant pose scale, non-occluded faces or frontal view. More or less deviation from those conditions might lead to poor recognition performances or even recognition system's failure when a test identity has to be recognized under new modified testing conditions. Three non-negative matrix factorization (NMF) methods, namely, the standard one, the local NMF (LNMF) and the discriminant NMF (DNMF) are employed in this paper where their robustness against extreme lighting variations are tested for the face recognition task. Principal Component Analysis (PCA) method was also chosen as baseline. Experiments revealed that the best recognition performance is obtained with NMF, followed by DNMF and LNMF.","PeriodicalId":277587,"journal":{"name":"2009 International Symposium on Signals, Circuits and Systems","volume":"164 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"123273810","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-09DOI: 10.1109/ISSCS.2009.5206089
Iulian Nita, V. Lazarescu, R. Constantinescu
Our goal in this paper is to simulate the behavior of multiprocessor system on chip. We used an open virtual platform - OVPSim made by Imperas Company, which offers the possibility of programming and running application on the platforms architectures. With this platform we simulated both hardware architectures and running software applications. We used two types of processors - ARM7 IP core and MIPS32 IP core, shared memory, local memory and BUS for interconnections and simulated three systems on chip models and for each architecture we simulated the running of the same applications.
{"title":"A new Hw/Sw co-design method for multiprocessor system on chip applications","authors":"Iulian Nita, V. Lazarescu, R. Constantinescu","doi":"10.1109/ISSCS.2009.5206089","DOIUrl":"https://doi.org/10.1109/ISSCS.2009.5206089","url":null,"abstract":"Our goal in this paper is to simulate the behavior of multiprocessor system on chip. We used an open virtual platform - OVPSim made by Imperas Company, which offers the possibility of programming and running application on the platforms architectures. With this platform we simulated both hardware architectures and running software applications. We used two types of processors - ARM7 IP core and MIPS32 IP core, shared memory, local memory and BUS for interconnections and simulated three systems on chip models and for each architecture we simulated the running of the same applications.","PeriodicalId":277587,"journal":{"name":"2009 International Symposium on Signals, Circuits and Systems","volume":"29 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127131959","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-09DOI: 10.1109/ISSCS.2009.5206084
C. Nafornita, A. Isar
We investigate the choice of the best mother wavelet for perceptual data hiding in the wavelet domain. The watermarked images are submitted to a series of attacks based on normal image processing techniques. Simulations show that regardless of the content of the images (contours, textures, homogeneous zones), the best mother wavelets are the ones used in the JPEG2000 standard.
{"title":"On the choice of the mother wavelet for perceptual data hiding","authors":"C. Nafornita, A. Isar","doi":"10.1109/ISSCS.2009.5206084","DOIUrl":"https://doi.org/10.1109/ISSCS.2009.5206084","url":null,"abstract":"We investigate the choice of the best mother wavelet for perceptual data hiding in the wavelet domain. The watermarked images are submitted to a series of attacks based on normal image processing techniques. Simulations show that regardless of the content of the images (contours, textures, homogeneous zones), the best mother wavelets are the ones used in the JPEG2000 standard.","PeriodicalId":277587,"journal":{"name":"2009 International Symposium on Signals, Circuits and Systems","volume":"343 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"115407886","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-09DOI: 10.1109/ISSCS.2009.5206201
S. Rodriguez, A. Rusu, M. Ismail
This paper presents the design challenges and solutions for 4G nanometer radio receivers for mobile devices. The specifications for the ZERO-IF/LOW-IF 4G receiver architecture are derived. Limitations due to the use of low-voltage nanometer technologies are described and novel circuit techniques, such as wideband noise reduction, inductoreless peaking, passive mixing, and low flicker noise amplification are proposed. Finally, a 1.2-V 90nm CMOS receiver front-end for the proposed WiMAX/LTE receiver is designed employing novel circuit techniques. The front-end covers 700 MHz – 6 GHz, providing a total gain of 34 dB, noise figure of 4 dB, flicker noise corner of 10 kHz, and a third order intercept point of −10dBm/0dBm, while consuming a total power of 10.2 mW.
{"title":"4G CMOS nanometer receivers for mobile systems: Challenges and solutions","authors":"S. Rodriguez, A. Rusu, M. Ismail","doi":"10.1109/ISSCS.2009.5206201","DOIUrl":"https://doi.org/10.1109/ISSCS.2009.5206201","url":null,"abstract":"This paper presents the design challenges and solutions for 4G nanometer radio receivers for mobile devices. The specifications for the ZERO-IF/LOW-IF 4G receiver architecture are derived. Limitations due to the use of low-voltage nanometer technologies are described and novel circuit techniques, such as wideband noise reduction, inductoreless peaking, passive mixing, and low flicker noise amplification are proposed. Finally, a 1.2-V 90nm CMOS receiver front-end for the proposed WiMAX/LTE receiver is designed employing novel circuit techniques. The front-end covers 700 MHz – 6 GHz, providing a total gain of 34 dB, noise figure of 4 dB, flicker noise corner of 10 kHz, and a third order intercept point of −10dBm/0dBm, while consuming a total power of 10.2 mW.","PeriodicalId":277587,"journal":{"name":"2009 International Symposium on Signals, Circuits and Systems","volume":"238 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114605851","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2009-07-09DOI: 10.1109/ISSCS.2009.5206222
B. Chipipop, R. Chaisricharoen, B. Sirinaovakul
A novel structure, based on balanced differential-pair, is proposed to implement the CMOS CCCII with negative intrinsic resistance at port X. HSPICE simulations, based on the AMS's 0.35µ CMOS process, are conducted, which certainly confirm the occurrence of negative resistance. To demonstrate its capability, a two-phase current-mode oscillator is synthesized based on two lossless integrators. As little error in oscillated frequency is observed, the proposed structure earns its place as one of the attractive negative-resistance simulators.
{"title":"A balanced differential-pair CMOS CCCII with negative intrinsic resistance","authors":"B. Chipipop, R. Chaisricharoen, B. Sirinaovakul","doi":"10.1109/ISSCS.2009.5206222","DOIUrl":"https://doi.org/10.1109/ISSCS.2009.5206222","url":null,"abstract":"A novel structure, based on balanced differential-pair, is proposed to implement the CMOS CCCII with negative intrinsic resistance at port X. HSPICE simulations, based on the AMS's 0.35µ CMOS process, are conducted, which certainly confirm the occurrence of negative resistance. To demonstrate its capability, a two-phase current-mode oscillator is synthesized based on two lossless integrators. As little error in oscillated frequency is observed, the proposed structure earns its place as one of the attractive negative-resistance simulators.","PeriodicalId":277587,"journal":{"name":"2009 International Symposium on Signals, Circuits and Systems","volume":"184 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2009-07-09","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114672569","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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