Overall consideration including bonding wire effects is needed because conventional DC-DC boost converter used in energy harvesting systems suffers from large output voltage ripple in steady state and transient response. Thus, this paper proposed the pumping capacitor and wire inductance (PCWI) technique to suppress output voltage ripple to an ultra-low value. Small steady state voltage across the wire inductance (WI) and continuous WI current can be ensured by an additional pumping capacitor (PC). Moreover, even in case of an ultra-low output voltage ripple, the proposed pseudo-inductor current (PIC) technique regenerates the inductor current information to eliminate the instability problem in conventional ripple-based control techniques. Transient recovery time and output voltage variation can be reduced simultaneously. Test chip was fabricated in 0.18-μm 5V/24V CMOS process when input voltage of 1.8–5.5V is converted to 12.8V. Experimental results show the ratio of output voltage ripple and output voltage is reduced to 0.04%. Measured power conversion efficiency is around 92% at 100mA and 96% at 0.1mA.
{"title":"Ultra-low voltage ripple in DC-DC boost converter by the pumping capacitor and wire inductance technique","authors":"Chen-Fan Tang, Ke-Horng Chen, Chinder Wey, Ying-Hsi Lin, Jian-Ru Lin, Tsung-Yen Tsai","doi":"10.1109/ASSCC.2016.7844195","DOIUrl":"https://doi.org/10.1109/ASSCC.2016.7844195","url":null,"abstract":"Overall consideration including bonding wire effects is needed because conventional DC-DC boost converter used in energy harvesting systems suffers from large output voltage ripple in steady state and transient response. Thus, this paper proposed the pumping capacitor and wire inductance (PCWI) technique to suppress output voltage ripple to an ultra-low value. Small steady state voltage across the wire inductance (WI) and continuous WI current can be ensured by an additional pumping capacitor (PC). Moreover, even in case of an ultra-low output voltage ripple, the proposed pseudo-inductor current (PIC) technique regenerates the inductor current information to eliminate the instability problem in conventional ripple-based control techniques. Transient recovery time and output voltage variation can be reduced simultaneously. Test chip was fabricated in 0.18-μm 5V/24V CMOS process when input voltage of 1.8–5.5V is converted to 12.8V. Experimental results show the ratio of output voltage ripple and output voltage is reduced to 0.04%. Measured power conversion efficiency is around 92% at 100mA and 96% at 0.1mA.","PeriodicalId":278002,"journal":{"name":"2016 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"12 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130030382","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 1900-01-01DOI: 10.1109/ASSCC.2016.7844186
Chang-Hung Tsai, Wan-Ju Yu, W. Wong, Chen-Yi Lee
A restricted Boltzmann machine (RBM) processor (RBM-P) supporting on-chip learning and inference is proposed for machine learning applications in this paper. Featuring neural network (NN) model reduction for external memory bandwidth saving, low power neuron binarizer (LPNB) with dynamic clock gating and area-efficient NN-like activation function calculators, user-defined connection map (UDCM) for both computation time and bandwidth saving, and early stopping (ES) mechanism in learning process, the proposed system integrates 32 RBM cores with maximal 4k neurons per layer and 128 candidates per sample for machine learning applications. Implemented in 65nm CMOS technology, the proposed RBM-P chip costs 2.2M gates and 128kB SRAM with 8.8mm2 area. Operated at 1.2V and 210MHz, this chip respectively achieves 114.3x and 3.9x faster processing time than CPU and GPGPU. And the proposed RBM-P chip consumes 41.3pJ and 26.7pJ per neuron weight (NW) for learning and inference, respectively.
{"title":"A 41.3pJ/26.7pJ per neuron weight RBM processor for on-chip learning/inference applications","authors":"Chang-Hung Tsai, Wan-Ju Yu, W. Wong, Chen-Yi Lee","doi":"10.1109/ASSCC.2016.7844186","DOIUrl":"https://doi.org/10.1109/ASSCC.2016.7844186","url":null,"abstract":"A restricted Boltzmann machine (RBM) processor (RBM-P) supporting on-chip learning and inference is proposed for machine learning applications in this paper. Featuring neural network (NN) model reduction for external memory bandwidth saving, low power neuron binarizer (LPNB) with dynamic clock gating and area-efficient NN-like activation function calculators, user-defined connection map (UDCM) for both computation time and bandwidth saving, and early stopping (ES) mechanism in learning process, the proposed system integrates 32 RBM cores with maximal 4k neurons per layer and 128 candidates per sample for machine learning applications. Implemented in 65nm CMOS technology, the proposed RBM-P chip costs 2.2M gates and 128kB SRAM with 8.8mm2 area. Operated at 1.2V and 210MHz, this chip respectively achieves 114.3x and 3.9x faster processing time than CPU and GPGPU. And the proposed RBM-P chip consumes 41.3pJ and 26.7pJ per neuron weight (NW) for learning and inference, respectively.","PeriodicalId":278002,"journal":{"name":"2016 IEEE Asian Solid-State Circuits Conference (A-SSCC)","volume":"7 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"1900-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"130233336","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}