Pub Date : 2019-01-01DOI: 10.1109/ICNTE44896.2019.8946090
Sowmya Gupta, M. Mitra, L. Vachhani, S. Duttagupta
This paper presents single tethered and bi-tethered position control of a solar-powered aerostat. The objective is to station the aerostat at a desired position anywhere into and on a hemisphere of an allocated radius with constraints applied on tether lengths and controller gains. Optimization is performed to find an optimal set of PID controller gains in order to minimize the total error over the entire trajectory. Two schemes for integral error calculation are proposed in this work. The first scheme implements historical values of the error resulting in adding an unnecessary bias to the output. This is overcome by the use of an error history over a finite horizon when calculating the integral error. Improved performance of the controller with faster convergence for position tracking is achieved by the implementation of the second scheme. In the first scheme, a settling time of approximately 72 s is achieved which is improved to approximately 40 s with the implementation of the second scheme. The conditions for position change of the aerostat are discussed. The results depict a three- dimensional space trajectory of the solar-powered aerostat being relocated to a cloudless new position for reliable solar power generation.
{"title":"Position Control of Solar Powered Aerostat for Reliable Power Generation in the Presence of Clouds","authors":"Sowmya Gupta, M. Mitra, L. Vachhani, S. Duttagupta","doi":"10.1109/ICNTE44896.2019.8946090","DOIUrl":"https://doi.org/10.1109/ICNTE44896.2019.8946090","url":null,"abstract":"This paper presents single tethered and bi-tethered position control of a solar-powered aerostat. The objective is to station the aerostat at a desired position anywhere into and on a hemisphere of an allocated radius with constraints applied on tether lengths and controller gains. Optimization is performed to find an optimal set of PID controller gains in order to minimize the total error over the entire trajectory. Two schemes for integral error calculation are proposed in this work. The first scheme implements historical values of the error resulting in adding an unnecessary bias to the output. This is overcome by the use of an error history over a finite horizon when calculating the integral error. Improved performance of the controller with faster convergence for position tracking is achieved by the implementation of the second scheme. In the first scheme, a settling time of approximately 72 s is achieved which is improved to approximately 40 s with the implementation of the second scheme. The conditions for position change of the aerostat are discussed. The results depict a three- dimensional space trajectory of the solar-powered aerostat being relocated to a cloudless new position for reliable solar power generation.","PeriodicalId":292408,"journal":{"name":"2019 International Conference on Nascent Technologies in Engineering (ICNTE)","volume":"54 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126501149","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-01-01DOI: 10.1109/ICNTE44896.2019.8945995
Vedant Chikhale, N. Wankhede, Smita S. Hande
In recent years, many FPGA vendors have come up with high speed transceiver blocks which handle all the physical layer signaling and Media Access layer operations required to achieve robust high speed communication. Also, optical communication is suitable for high bandwidth applications and gaining popularity over any other wired media which are currently used with FPGA implementations. This proposed research work is to focus on achieving optical fiber link with Xilinx Gigabit transceiver block for data rates of over 3.125 Gbps transmitted serially. The optical digital link will be established between two FPGA boards which are Spartan 6 Series SP605 boards which can be coupled to optical transceiver modules known as SFP. The basic GTP MAC wrapper core from Xilinx is being used as base for data transmission and reception. GTP performance is validated with the help of Xilinx bit error test known as IBERT. The results of the IBERT test are observed and calculated using Chip-Scope-Pro analyzer to obtain the faults in connections, defects in medium, bit error ratio and bit error detection during transmission and reception. Various ports in each GTP tile required for clock, reset, encoding, decoding, serialization, deserialization, error correction, polarity control, pattern checking, etc are used to run a code which will enable the actual transmission and reception of information bits with high data rate with very low bit error rate.
{"title":"Development of Optical Communication Framework with Xilinx Gigabit Transceivers","authors":"Vedant Chikhale, N. Wankhede, Smita S. Hande","doi":"10.1109/ICNTE44896.2019.8945995","DOIUrl":"https://doi.org/10.1109/ICNTE44896.2019.8945995","url":null,"abstract":"In recent years, many FPGA vendors have come up with high speed transceiver blocks which handle all the physical layer signaling and Media Access layer operations required to achieve robust high speed communication. Also, optical communication is suitable for high bandwidth applications and gaining popularity over any other wired media which are currently used with FPGA implementations. This proposed research work is to focus on achieving optical fiber link with Xilinx Gigabit transceiver block for data rates of over 3.125 Gbps transmitted serially. The optical digital link will be established between two FPGA boards which are Spartan 6 Series SP605 boards which can be coupled to optical transceiver modules known as SFP. The basic GTP MAC wrapper core from Xilinx is being used as base for data transmission and reception. GTP performance is validated with the help of Xilinx bit error test known as IBERT. The results of the IBERT test are observed and calculated using Chip-Scope-Pro analyzer to obtain the faults in connections, defects in medium, bit error ratio and bit error detection during transmission and reception. Various ports in each GTP tile required for clock, reset, encoding, decoding, serialization, deserialization, error correction, polarity control, pattern checking, etc are used to run a code which will enable the actual transmission and reception of information bits with high data rate with very low bit error rate.","PeriodicalId":292408,"journal":{"name":"2019 International Conference on Nascent Technologies in Engineering (ICNTE)","volume":"2 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126724517","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-01-01DOI: 10.1109/ICNTE44896.2019.8946030
Bilal H. Hungund, A. Shaikh, G. Owais, Aabidi Sayyed Ali, Pratibha R. Dumane
Examination plays a vital role in any education system. It has been observed that most of the activities being managed in any examination cell or by any examination conducting authority are traditionally manually conducted activities. With the availability of computers and internet, it is time that the examination activities are automated. This will not only help in automation of the routinely conducted activities but also help in utilizing the manpower available for enhancing the processes and their skill sets. It will help in efficiently utilizing the resources available for conducting an examination in the organization. The paper focuses on the activities that can be effectively managed in the context of an Examination Cell. An automated system will benefit both students and exam cell coordinators to easily handle the manual processes involved. Automation of the various routine, manual and repetitive activities will help in optimal utilization of the infrastructural resources as well as manpower resources.
{"title":"Automated System for Management of Examination Processes","authors":"Bilal H. Hungund, A. Shaikh, G. Owais, Aabidi Sayyed Ali, Pratibha R. Dumane","doi":"10.1109/ICNTE44896.2019.8946030","DOIUrl":"https://doi.org/10.1109/ICNTE44896.2019.8946030","url":null,"abstract":"Examination plays a vital role in any education system. It has been observed that most of the activities being managed in any examination cell or by any examination conducting authority are traditionally manually conducted activities. With the availability of computers and internet, it is time that the examination activities are automated. This will not only help in automation of the routinely conducted activities but also help in utilizing the manpower available for enhancing the processes and their skill sets. It will help in efficiently utilizing the resources available for conducting an examination in the organization. The paper focuses on the activities that can be effectively managed in the context of an Examination Cell. An automated system will benefit both students and exam cell coordinators to easily handle the manual processes involved. Automation of the various routine, manual and repetitive activities will help in optimal utilization of the infrastructural resources as well as manpower resources.","PeriodicalId":292408,"journal":{"name":"2019 International Conference on Nascent Technologies in Engineering (ICNTE)","volume":"9 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"128512194","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2019-01-01DOI: 10.1109/ICNTE44896.2019.8945834
Varada Kulkarni, P. Kulkarni, R. D. Kulkarni
The paper describes the methodology for precisely generating various conventional waveform using Microcontroller 8051. Several functions e.g. pure sinusoidal, saw-tooth, square, quasi-square and triangular waveforms have been generated over a wide frequency range as per applications. By utilizing the unique architecture and excellent processing capabilities of Microcontroller 8051 including its interfacing with Digital to Analog Converter, the hardware is minimized to a great extent and the desired output wave shapes are digitally controlled to achieve the required waveforms. The control instructions have been written in KEIL software. The Personal Computer based experimental circuit operation has been designed incorporating languages translators via compilation and assembly process. A Microcontroller based system is found to be numerically attractive since it offers increased flexibility, particularly in choosing required frequency among wide range of frequencies. This feature has resulted in reduction of the complex control circuitry, which has been progressively replaced by Microcontroller software. The developed methodology is technically observed feasible to generate wide band frequency waveforms precisely without altering hardware configuration increasing the reliability of software based system design. The hardware implementation has been performed and various types of waveforms have been generated, monitored and presented.
{"title":"Design and Development of Software based Waveform Generation using Microcontroller 8051","authors":"Varada Kulkarni, P. Kulkarni, R. D. Kulkarni","doi":"10.1109/ICNTE44896.2019.8945834","DOIUrl":"https://doi.org/10.1109/ICNTE44896.2019.8945834","url":null,"abstract":"The paper describes the methodology for precisely generating various conventional waveform using Microcontroller 8051. Several functions e.g. pure sinusoidal, saw-tooth, square, quasi-square and triangular waveforms have been generated over a wide frequency range as per applications. By utilizing the unique architecture and excellent processing capabilities of Microcontroller 8051 including its interfacing with Digital to Analog Converter, the hardware is minimized to a great extent and the desired output wave shapes are digitally controlled to achieve the required waveforms. The control instructions have been written in KEIL software. The Personal Computer based experimental circuit operation has been designed incorporating languages translators via compilation and assembly process. A Microcontroller based system is found to be numerically attractive since it offers increased flexibility, particularly in choosing required frequency among wide range of frequencies. This feature has resulted in reduction of the complex control circuitry, which has been progressively replaced by Microcontroller software. The developed methodology is technically observed feasible to generate wide band frequency waveforms precisely without altering hardware configuration increasing the reliability of software based system design. The hardware implementation has been performed and various types of waveforms have been generated, monitored and presented.","PeriodicalId":292408,"journal":{"name":"2019 International Conference on Nascent Technologies in Engineering (ICNTE)","volume":"44 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2019-01-01","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"127351558","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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