Pub Date : 2001-05-22DOI: 10.1109/ISMVL.2001.924571
M. Chechik, S. Easterbrook, B. Devereux
Multi-valued logics support the explicit modeling of uncertainty and disagreement by allowing additional truth values in the logic. Such logics can be used for verification of dynamic properties of systems where complete, agreed upon models of the system are not available. This paper presents a symbolic model checker for multi-valued temporal logics. The model checker works for any multi-valued logic whose truth values form a quasi-boolean lattice. Our models are generalized Kripke structures, where both atomic propositions and transitions between states may take any of the truth values of a given multi-valued logic. Properties to be model checked are expressed in CTL, generalized with a multi-valued semantics. The design of the model checker is based on the use of MDDs, a multi-valued extension of binary decision diagrams.
{"title":"Model checking with multi-valued temporal logics","authors":"M. Chechik, S. Easterbrook, B. Devereux","doi":"10.1109/ISMVL.2001.924571","DOIUrl":"https://doi.org/10.1109/ISMVL.2001.924571","url":null,"abstract":"Multi-valued logics support the explicit modeling of uncertainty and disagreement by allowing additional truth values in the logic. Such logics can be used for verification of dynamic properties of systems where complete, agreed upon models of the system are not available. This paper presents a symbolic model checker for multi-valued temporal logics. The model checker works for any multi-valued logic whose truth values form a quasi-boolean lattice. Our models are generalized Kripke structures, where both atomic propositions and transitions between states may take any of the truth values of a given multi-valued logic. Properties to be model checked are expressed in CTL, generalized with a multi-valued semantics. The design of the model checker is based on the use of MDDs, a multi-valued extension of binary decision diagrams.","PeriodicalId":297353,"journal":{"name":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126690673","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-22DOI: 10.1109/ISMVL.2001.924586
A. Avron
A classical Gentzen-type system is one which employs two-sided sequents, together with structural and logical rules of a certain characteristic form. A decent Gentzen-type system should allow for direct proofs, which means that it should admit some useful forms of cut elimination and the subformula property. In this tutorial we explain the main difficulty in developing classical Gentzen-type systems with these properties for many-valued logics. We then illustrate with numerous examples the various possible ways of overcoming this difficulty. Our examples include practically all 3-valued logics, the most important class of 4-valued logics, as well as central infinite-valued logics (like Godel-Dummett logic, S5 and some substructural logics).
{"title":"Classical Gentzen-type methods in propositional many-valued logics","authors":"A. Avron","doi":"10.1109/ISMVL.2001.924586","DOIUrl":"https://doi.org/10.1109/ISMVL.2001.924586","url":null,"abstract":"A classical Gentzen-type system is one which employs two-sided sequents, together with structural and logical rules of a certain characteristic form. A decent Gentzen-type system should allow for direct proofs, which means that it should admit some useful forms of cut elimination and the subformula property. In this tutorial we explain the main difficulty in developing classical Gentzen-type systems with these properties for many-valued logics. We then illustrate with numerous examples the various possible ways of overcoming this difficulty. Our examples include practically all 3-valued logics, the most important class of 4-valued logics, as well as central infinite-valued logics (like Godel-Dummett logic, S5 and some substructural logics).","PeriodicalId":297353,"journal":{"name":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","volume":"18 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"131955268","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-22DOI: 10.1109/ISMVL.2001.924598
Jun Ma, Jun Liu, Yang Xu
It is well known that uncertainty reasoning is a hot spot in artificial intelligence. In this paper, we focus on how to present and extract information from the rule and apply the information in reasoning. First, we discussed the role and the characteristics of the rule used in uncertainty reasoning and give two principles about reasoning. After that, we gave the definitions of necessary property, information validity. Also we defined the importance and usefulness of properties with respect to the rule. Finally, we presented a method of uncertainty reasoning by using information.
{"title":"A method of uncertainty reasoning by using information","authors":"Jun Ma, Jun Liu, Yang Xu","doi":"10.1109/ISMVL.2001.924598","DOIUrl":"https://doi.org/10.1109/ISMVL.2001.924598","url":null,"abstract":"It is well known that uncertainty reasoning is a hot spot in artificial intelligence. In this paper, we focus on how to present and extract information from the rule and apply the information in reasoning. First, we discussed the role and the characteristics of the rule used in uncertainty reasoning and give two principles about reasoning. After that, we gave the definitions of necessary property, information validity. Also we defined the importance and usefulness of properties with respect to the rule. Finally, we presented a method of uncertainty reasoning by using information.","PeriodicalId":297353,"journal":{"name":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","volume":"15 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"114962211","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-22DOI: 10.1109/ISMVL.2001.924552
Mou Hu
A multiple-valued input two-valued output logic system (MITOL) is proposed as a description language of software functionality for test case generation purpose. Based on the MITOL description of software functionality, test generation algorithms for multiple-valued logic circuits, such as path sensitization, can be used for test case generation for software system functional testing. The resulting minimum complete test set contains the minimum number of test cases to cover all logical stuck-at-faults. Finally, a comparison of this new method with traditional methods is presented.
{"title":"An application of multiple-valued logic to test case generation for software system functional testing","authors":"Mou Hu","doi":"10.1109/ISMVL.2001.924552","DOIUrl":"https://doi.org/10.1109/ISMVL.2001.924552","url":null,"abstract":"A multiple-valued input two-valued output logic system (MITOL) is proposed as a description language of software functionality for test case generation purpose. Based on the MITOL description of software functionality, test generation algorithms for multiple-valued logic circuits, such as path sensitization, can be used for test case generation for software system functional testing. The resulting minimum complete test set contains the minimum number of test cases to cover all logical stuck-at-faults. Finally, a comparison of this new method with traditional methods is presented.","PeriodicalId":297353,"journal":{"name":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","volume":"99 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132485091","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-22DOI: 10.1109/ISMVL.2001.924554
W. Prost, U. Auer, F. Tegude, C. Pacha, K. Goser, R. Duschl, K. Eberl, O. Schmidt
The technology of quantum tunnelling devices, namely III/V double barrier Resonant Tunnelling Diodes (RTD) and Si/SiGe Interband Tunnelling Diodes (ITD), is studied for logic circuit applications. The homogeneity and reproducibility of MBE grown InP-based RTD devices with mesa technology is presented. Si/SiGe ITD have been grown by MBE on high resistivity (n-) Silicon substrates. A novel self-aligned diode is processed using optical lithography and dopant-selective wet chemical etching. Comparing RTD and ITD data the differences are due to the vertical spacing of the doped layers within the device. A nanoelectronic circuit architecture based on an improved MOBILE threshold logic gate is used. SPICE simulations are carried-out in order to evaluate tolerable clock and supply voltage fluctuations in comparison to device fluctuations.
{"title":"Tunnelling diode technology","authors":"W. Prost, U. Auer, F. Tegude, C. Pacha, K. Goser, R. Duschl, K. Eberl, O. Schmidt","doi":"10.1109/ISMVL.2001.924554","DOIUrl":"https://doi.org/10.1109/ISMVL.2001.924554","url":null,"abstract":"The technology of quantum tunnelling devices, namely III/V double barrier Resonant Tunnelling Diodes (RTD) and Si/SiGe Interband Tunnelling Diodes (ITD), is studied for logic circuit applications. The homogeneity and reproducibility of MBE grown InP-based RTD devices with mesa technology is presented. Si/SiGe ITD have been grown by MBE on high resistivity (n-) Silicon substrates. A novel self-aligned diode is processed using optical lithography and dopant-selective wet chemical etching. Comparing RTD and ITD data the differences are due to the vertical spacing of the doped layers within the device. A nanoelectronic circuit architecture based on an improved MOBILE threshold logic gate is used. SPICE simulations are carried-out in order to evaluate tolerable clock and supply voltage fluctuations in comparison to device fluctuations.","PeriodicalId":297353,"journal":{"name":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","volume":"41 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"132003948","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-22DOI: 10.1109/ISMVL.2001.924549
M. Abd-El-Barr, A. Al-Mutawa
In this paper, we introduce a new improved cost-table-based technique for synthesis of 4-valued one-variable functions for implementation using current-mode CMOS (CMCL) circuits. The technique uses a cost-table consisting of 38 positive functions and 10 negative functions as input. The algorithm used to synthesize all 256 4-valued unary functions proceeds as follows. In each step, the algorithm selectively adds two functions from those accumulated so far in the table. If the newly formed function exists in the table at a higher cost, then the function just formed will replace the existing one; otherwise the formed function will be ignored and the process repeats. The obtained results show that the maximum cost of any function is 17 compared to 19 using a previously introduced algorithm. The average cost per function is 9.54 compared to 10.41. Lower cost is achieved in synthesizing 157 (60%) functions using the proposed technique compared to our previously introduced technique.
{"title":"A new improved cost-table-based technique for synthesis of 4-valued unary functions implemented using current-mode CMOS circuits","authors":"M. Abd-El-Barr, A. Al-Mutawa","doi":"10.1109/ISMVL.2001.924549","DOIUrl":"https://doi.org/10.1109/ISMVL.2001.924549","url":null,"abstract":"In this paper, we introduce a new improved cost-table-based technique for synthesis of 4-valued one-variable functions for implementation using current-mode CMOS (CMCL) circuits. The technique uses a cost-table consisting of 38 positive functions and 10 negative functions as input. The algorithm used to synthesize all 256 4-valued unary functions proceeds as follows. In each step, the algorithm selectively adds two functions from those accumulated so far in the table. If the newly formed function exists in the table at a higher cost, then the function just formed will replace the existing one; otherwise the formed function will be ignored and the process repeats. The obtained results show that the maximum cost of any function is 17 compared to 19 using a previously introduced algorithm. The average cost per function is 9.54 compared to 10.41. Lower cost is achieved in synthesizing 157 (60%) functions using the proposed technique compared to our previously introduced technique.","PeriodicalId":297353,"journal":{"name":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","volume":"8 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"121848040","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-22DOI: 10.1109/ISMVL.2001.924574
Tsutomu Sasao
This paper shows a method to represent a multiple output function: Encoded characteristic function for non-zero outputs (ECFN). The ECFN uses (n+u) binary variables to represent an n-input m-output function, where u=[log/sub 2/m]. The size of the sum-of-products expressions (SOPs) depends on the encoding method of the outputs. For some class of functions, the optimal encoding produces SOPs with O(n) products, while the worst encoding produces SOPs with O(2/sup n/) products. We formulate encoding problem and show a heuristic optimization method. Experimental results using standard benchmark functions show the usefulness of the method.
{"title":"Compact SOP representations for multiple-output functions-an encoding method using multiple-valued logic","authors":"Tsutomu Sasao","doi":"10.1109/ISMVL.2001.924574","DOIUrl":"https://doi.org/10.1109/ISMVL.2001.924574","url":null,"abstract":"This paper shows a method to represent a multiple output function: Encoded characteristic function for non-zero outputs (ECFN). The ECFN uses (n+u) binary variables to represent an n-input m-output function, where u=[log/sub 2/m]. The size of the sum-of-products expressions (SOPs) depends on the encoding method of the outputs. For some class of functions, the optimal encoding produces SOPs with O(n) products, while the worst encoding produces SOPs with O(2/sup n/) products. We formulate encoding problem and show a heuristic optimization method. Experimental results using standard benchmark functions show the usefulness of the method.","PeriodicalId":297353,"journal":{"name":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","volume":"28 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"126883266","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-22DOI: 10.1109/ISMVL.2001.924557
A. Radzikowska, E. Kerre
Recently, E. Orlowska (1999) has proposed a many-valued generalization of modal information logics which are logical systems for reasoning from incomplete and many-valued information. Following her ideas, we consider a fuzzy generalization of some information relations. We provide basic properties of these relations and their characterizations formalized by means of fuzzy relational operators. For particular classes of fuzzy information relations the corresponding classes of fuzzy information logics are defined and briefly discussed.
{"title":"On some classes of fuzzy information relations","authors":"A. Radzikowska, E. Kerre","doi":"10.1109/ISMVL.2001.924557","DOIUrl":"https://doi.org/10.1109/ISMVL.2001.924557","url":null,"abstract":"Recently, E. Orlowska (1999) has proposed a many-valued generalization of modal information logics which are logical systems for reasoning from incomplete and many-valued information. Following her ideas, we consider a fuzzy generalization of some information relations. We provide basic properties of these relations and their characterizations formalized by means of fuzzy relational operators. For particular classes of fuzzy information relations the corresponding classes of fuzzy information logics are defined and briefly discussed.","PeriodicalId":297353,"journal":{"name":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","volume":"14 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"122513220","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-22DOI: 10.1109/ISMVL.2001.924582
D. Simovici, S. Jaroszewicz
The aim of this paper is to present an axiomatization of a generalization of Shannon's entropy. The newly proposed axiomatization yields as special cases the Havrada-Charvat entropy, and thus, provides axiomatizations for the Shannon entropy, the Gini index, and for other types of entropy used in classification and data mining.
{"title":"An axiomatization of generalized entropy of partitions","authors":"D. Simovici, S. Jaroszewicz","doi":"10.1109/ISMVL.2001.924582","DOIUrl":"https://doi.org/10.1109/ISMVL.2001.924582","url":null,"abstract":"The aim of this paper is to present an axiomatization of a generalization of Shannon's entropy. The newly proposed axiomatization yields as special cases the Havrada-Charvat entropy, and thus, provides axiomatizations for the Shannon entropy, the Gini index, and for other types of entropy used in classification and data mining.","PeriodicalId":297353,"journal":{"name":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","volume":"31 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"117091708","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
Pub Date : 2001-05-22DOI: 10.1109/ISMVL.2001.924584
J. Pfalzgraf
A brief survey of the basic notions of the concept of logical fiberings is presented. Logical fiberings lead to many-valued systems and, on, the other side, form the basis for a general decomposition method of m-valued operations into (local) connectives defined in a 2-valued subsystem (fiber). A remark on applications to model cooperating agents logically is included.
{"title":"On logical fiberings and decomposition of many-valued operations: a brief survey","authors":"J. Pfalzgraf","doi":"10.1109/ISMVL.2001.924584","DOIUrl":"https://doi.org/10.1109/ISMVL.2001.924584","url":null,"abstract":"A brief survey of the basic notions of the concept of logical fiberings is presented. Logical fiberings lead to many-valued systems and, on, the other side, form the basis for a general decomposition method of m-valued operations into (local) connectives defined in a 2-valued subsystem (fiber). A remark on applications to model cooperating agents logically is included.","PeriodicalId":297353,"journal":{"name":"Proceedings 31st IEEE International Symposium on Multiple-Valued Logic","volume":"389 1","pages":"0"},"PeriodicalIF":0.0,"publicationDate":"2001-05-22","publicationTypes":"Journal Article","fieldsOfStudy":null,"isOpenAccess":false,"openAccessPdf":"","citationCount":null,"resultStr":null,"platform":"Semanticscholar","paperid":"124744080","PeriodicalName":null,"FirstCategoryId":null,"ListUrlMain":null,"RegionNum":0,"RegionCategory":"","ArticlePicture":[],"TitleCN":null,"AbstractTextCN":null,"PMCID":"","EPubDate":null,"PubModel":null,"JCR":null,"JCRName":null,"Score":null,"Total":0}
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